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ruanhaishen
Nodemcu Firmware
Commits
310faf7f
Unverified
Commit
310faf7f
authored
Sep 07, 2019
by
Terry Ellison
Committed by
GitHub
Sep 07, 2019
Browse files
Merge pull request #2886 from nodemcu/dev
Next master drop
parents
68c425c0
a08e74d9
Changes
368
Show whitespace changes
Inline
Side-by-side
app/coap/uri.c
View file @
310faf7f
/* uri.c -- helper functions for URI treatment
*/
#include
"c_
stdio.h
"
#include
"c_
stdlib.h
"
#include
"c_
string.h
"
#include
"c_
ctype.h
"
#include
<
stdio.h
>
#include
<
stdlib.h
>
#include
<
string.h
>
#include
<
ctype.h
>
#include "coap.h"
#include "uri.h"
...
...
@@ -43,7 +43,7 @@ int coap_split_uri(unsigned char *str_var, size_t len, coap_uri_t *uri) {
if
(
!
str_var
||
!
uri
)
return
-
1
;
c_
memset
(
uri
,
0
,
sizeof
(
coap_uri_t
));
memset
(
uri
,
0
,
sizeof
(
coap_uri_t
));
uri
->
port
=
COAP_DEFAULT_PORT
;
/* search for scheme */
...
...
@@ -394,16 +394,16 @@ int coap_split_query(coap_rw_buffer_t *scratch, coap_packet_t *pkt, const unsign
coap_uri_t
*
coap_new_uri
(
const
unsigned
char
*
uri
,
unsigned
int
length
)
{
unsigned
char
*
result
;
result
=
(
unsigned
char
*
)
c_
malloc
(
length
+
1
+
sizeof
(
coap_uri_t
));
result
=
(
unsigned
char
*
)
malloc
(
length
+
1
+
sizeof
(
coap_uri_t
));
if
(
!
result
)
return
NULL
;
c_
memcpy
(
URI_DATA
(
result
),
uri
,
length
);
memcpy
(
URI_DATA
(
result
),
uri
,
length
);
URI_DATA
(
result
)[
length
]
=
'\0'
;
/* make it zero-terminated */
if
(
coap_split_uri
(
URI_DATA
(
result
),
length
,
(
coap_uri_t
*
)
result
)
<
0
)
{
c_
free
(
result
);
free
(
result
);
return
NULL
;
}
return
(
coap_uri_t
*
)
result
;
...
...
app/crypto/Makefile
View file @
310faf7f
...
...
@@ -38,10 +38,6 @@ STD_CFLAGS=-std=gnu11 -Wimplicit
# Required for each makefile to inherit from the parent
#
INCLUDES
:=
$(INCLUDES)
-I
$(PDIR)
include
INCLUDES
+=
-I
./
INCLUDES
+=
-I
../libc
INCLUDES
+=
-I
../platform
PDIR
:=
../
$(PDIR)
sinclude
$(PDIR)Makefile
app/crypto/digests.c
View file @
310faf7f
...
...
@@ -34,7 +34,8 @@
#include "osapi.h"
#include "mem.h"
#include <string.h>
#include <c_errno.h>
#include <strings.h>
#include <errno.h>
#ifdef MD2_ENABLE
#include "ssl/ssl_crypto.h"
...
...
app/crypto/digests.h
View file @
310faf7f
#ifndef _CRYPTO_DIGESTS_H_
#define _CRYPTO_DIGESTS_H_
#include <c_types.h>
#include <stdint.h>
#include <stddef.h>
typedef
void
(
*
create_ctx_fn
)(
void
*
ctx
);
typedef
void
(
*
update_ctx_fn
)(
void
*
ctx
,
const
uint8_t
*
msg
,
int
len
);
typedef
void
(
*
finalize_ctx_fn
)(
uint8_t
*
digest
,
void
*
ctx
);
typedef
s
int32_t
(
*
read_fn
)(
int
fd
,
void
*
ptr
,
size_t
len
);
typedef
int32_t
(
*
read_fn
)(
int
fd
,
void
*
ptr
,
size_t
len
);
/**
* Description of a message digest mechanism.
...
...
app/crypto/mech.c
View file @
310faf7f
...
...
@@ -33,7 +33,8 @@
#include "mech.h"
#include "sdk-aes.h"
#include "c_string.h"
#include <string.h>
#include <strings.h>
/* ----- AES ---------------------------------------------------------- */
...
...
@@ -58,7 +59,7 @@ static bool do_aes (crypto_op_t *co, bool with_cbc)
char
iv
[
AES_BLOCKSIZE
]
=
{
0
};
if
(
with_cbc
&&
co
->
ivlen
)
c_
memcpy
(
iv
,
co
->
iv
,
co
->
ivlen
<
AES_BLOCKSIZE
?
co
->
ivlen
:
AES_BLOCKSIZE
);
memcpy
(
iv
,
co
->
iv
,
co
->
ivlen
<
AES_BLOCKSIZE
?
co
->
ivlen
:
AES_BLOCKSIZE
);
const
char
*
src
=
co
->
data
;
char
*
dst
=
co
->
out
;
...
...
@@ -68,7 +69,7 @@ static bool do_aes (crypto_op_t *co, bool with_cbc)
{
char
block
[
AES_BLOCKSIZE
]
=
{
0
};
size_t
n
=
left
>
AES_BLOCKSIZE
?
AES_BLOCKSIZE
:
left
;
c_
memcpy
(
block
,
src
,
n
);
memcpy
(
block
,
src
,
n
);
if
(
with_cbc
&&
co
->
op
==
OP_ENCRYPT
)
{
...
...
app/crypto/mech.h
View file @
310faf7f
#ifndef _MECH_H_
#define _MECH_H_
#include "c_types.h"
#include <stdint.h>
#include <stddef.h>
#include <stdbool.h>
typedef
struct
{
...
...
app/crypto/sha2.h
View file @
310faf7f
#ifndef __SHA2_H__
#define __SHA2_H__
#include <c_types.h>
#include <stdint.h>
#include <stddef.h>
/**************************************************************************
* SHA256/384/512 declarations
...
...
app/dht/Makefile
View file @
310faf7f
...
...
@@ -37,13 +37,6 @@ endif
# Required for each makefile to inherit from the parent
#
INCLUDES
:=
$(INCLUDES)
-I
$(PDIR)
include
INCLUDES
+=
-I
./
INCLUDES
+=
-I
./include
INCLUDES
+=
-I
../include
INCLUDES
+=
-I
../../include
INCLUDES
+=
-I
../libc
INCLUDES
+=
-I
../platform
PDIR
:=
../
$(PDIR)
sinclude
$(PDIR)Makefile
app/dht/dht.c
View file @
310faf7f
...
...
@@ -29,7 +29,7 @@
#include "user_interface.h"
#include "platform.h"
#include
"c_
stdio.h
"
#include
<
stdio.h
>
#include "dht.h"
#ifndef LOW
...
...
app/dht/dht.h
View file @
310faf7f
...
...
@@ -17,7 +17,7 @@
// #else
// #include <Arduino.h>
// #endif
#include
"c_types
.h
"
#include
<stdint
.h
>
#define DHT_LIB_VERSION "0.1.14"
...
...
app/driver/Makefile
View file @
310faf7f
...
...
@@ -38,9 +38,6 @@ STD_CFLAGS=-std=gnu11 -Wimplicit
# Required for each makefile to inherit from the parent
#
INCLUDES
:=
$(INCLUDES)
-I
$(PDIR)
include
INCLUDES
+=
-I
./
INCLUDES
+=
-I
../platform
PDIR
:=
../
$(PDIR)
sinclude
$(PDIR)Makefile
app/driver/i2c_master.c
View file @
310faf7f
/*
*****************************************************************************
*
Copyright 2013-2014 Espressif Systems (Wuxi)
/*
*
ESPRESSIF MIT License
*
*
FileName: i2c_master.c
*
Copyright (c) 2016 <ESPRESSIF SYSTEMS (SHANGHAI) PTE LTD>
*
* Description: i2c master API
* Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case,
* it is free of charge, to any person obtaining a copy of this software and associated
* documentation files (the "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the Software is furnished
* to do so, subject to the following conditions:
*
* Modification history:
* 2014/3/12, v1.0 create this file.
*******************************************************************************/
* The above copyright notice and this permission notice shall be included in all copies or
* substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
* Rework of original driver: Natalia Sorokina <sonaux@gmail.com>, 2018
*/
#include <stdlib.h>
#include "ets_sys.h"
#include "osapi.h"
#include "gpio.h"
#include "user_interface.h"
#include "cpu_esp8266.h"
#include "pin_map.h"
#include "user_config.h"
#include "driver/i2c_master.h"
#include "pin_map.h"
#ifndef I2C_MASTER_OLD_VERSION
/******************************************************************************
* NEW driver
* Enabled if I2C_MASTER_OLD_VERSION is not defined in user_config.h
*******************************************************************************/
// Supports multiple i2c buses
// I2C speed in range 25kHz - 550kHz (25kHz - 1MHz if CPU at 160MHz)
// If GPIO16 is used as SCL then speed is limited to 25kHz - 400kHz
// Speed is defined for every bus separately
// enable use GPIO16 (D0) pin as SCL line
#ifdef I2C_MASTER_GPIO16_ENABLE
#define IS_PIN16(n) ((n)==16)
// CPU_CYCLES_BETWEEN_DELAYS describes how much cpu cycles code runs
// between i2c_master_setDC() calls if delay is zero and i2c_master_set_DC_delay()
// is not being called. This is not exact value, but proportional with length of code.
// Increasing the value results in less delay and faster i2c clock speed.
#define CPU_CYCLES_BETWEEN_DELAYS 80
// CPU_CYCLES_GPIO16 is added to CPU_CYCLES_BETWEEN_DELAYS,
// as RTC-related IO takes much more time than standard GPIOs.
// Increasing the value results in less delay and faster i2c clock speed for GPIO16.
#define CPU_CYCLES_GPIO16 90
#else
// If GPIO16 support is not enabled, remove GPIO16-related code during compile
// and change timing constants.
#define IS_PIN16(n) (0)
#define CPU_CYCLES_BETWEEN_DELAYS 74
#endif //I2C_MASTER_GPIO16_ENABLE
#define MIN_SPEED 25000
#define MAX_NUMBER_OF_I2C NUM_I2C
typedef
struct
{
uint8
last_SDA
;
uint8
last_SCL
;
uint8
pin_SDA
;
uint8
pin_SCL
;
uint32
pin_SDA_SCL_mask
;
uint32
pin_SDA_mask
;
uint32
pin_SCL_mask
;
uint32
speed
;
sint16
cycles_delay
;
}
i2c_master_state_t
;
static
i2c_master_state_t
*
i2c
[
MAX_NUMBER_OF_I2C
];
/******************************************************************************
* FunctionName : i2c_master_set_DC_delay
* Description : Internal used function - calculate delay for i2c_master_setDC
* Parameters : bus id
* Returns : NONE
*******************************************************************************/
LOCAL
void
ICACHE_FLASH_ATTR
i2c_master_set_DC_delay
(
uint16
id
)
{
// [cpu cycles per half SCL clock period] - [cpu cycles that code takes to run]
i2c
[
id
]
->
cycles_delay
=
system_get_cpu_freq
()
*
500000
/
i2c
[
id
]
->
speed
-
CPU_CYCLES_BETWEEN_DELAYS
;
#ifdef I2C_MASTER_GPIO16_ENABLE
if
(
IS_PIN16
(
i2c
[
id
]
->
pin_SCL
)){
//if GPIO16
i2c
[
id
]
->
cycles_delay
-=
CPU_CYCLES_GPIO16
;
//decrease delay
}
#endif //I2C_MASTER_GPIO16_ENABLE
if
(
i2c
[
id
]
->
cycles_delay
<
0
){
i2c
[
id
]
->
cycles_delay
=
0
;
}
}
/******************************************************************************
* FunctionName : i2c_master_wait_cpu_cycles
* Description : Internal used function - wait for given count of cpu cycles
* Parameters : sint16 cycles_delay
* Returns : NONE
*******************************************************************************/
static
inline
void
i2c_master_wait_cpu_cycles
(
sint16
cycles_delay
)
{
uint32
cycles_start
;
uint32
cycles_curr
;
// uses special 'ccount' register which is increased every CPU cycle
// to make precise delay
asm
volatile
(
"rsr %0, ccount"
:
"=a"
(
cycles_start
));
do
{
asm
volatile
(
"rsr %0, ccount"
:
"=a"
(
cycles_curr
));
}
while
(
cycles_curr
-
cycles_start
<
cycles_delay
);
}
/******************************************************************************
* FunctionName : i2c_master_wait_gpio_SCL_high
* Description : Internal used function - wait until SCL line in a high state
(slave device may hold SCL line low until it is ready to proceed)
* Parameters : bus id
* Returns : NONE
*******************************************************************************/
static
inline
void
i2c_master_wait_gpio_SCL_high
(
uint16
id
)
{
// retrieves bitmask of all GPIOs from memory-mapped gpio register and exits if SCL bit is set
// equivalent, but slow variant:
// while(!(READ_PERI_REG(PERIPHS_GPIO_BASEADDR + GPIO_IN_ADDRESS) & i2c[id]->pin_SCL_mask)) {};
// even slower: while (!(gpio_input_get() & i2c[id]->pin_SCL_mask)) {};
asm
volatile
(
"l_wait:"
"l16ui %0, %[gpio_in_addr], 0;"
//read gpio state into register %0
"memw;"
//wait for read completion
"bnall %0, %[gpio_SCL_mask], l_wait;"
// test if SCL bit not set
::
[
gpio_SCL_mask
]
"r"
(
i2c
[
id
]
->
pin_SCL_mask
),
[
gpio_in_addr
]
"r"
(
PERIPHS_GPIO_BASEADDR
+
GPIO_IN_ADDRESS
)
);
}
/******************************************************************************
* FunctionName : i2c_master_setDC
* Description : Internal used function -
* set i2c SDA and SCL bit value for half clock cycle
* Parameters : bus id, uint8 SDA, uint8 SCL
* Returns : NONE
*******************************************************************************/
LOCAL
void
ICACHE_FLASH_ATTR
i2c_master_setDC
(
uint16
id
,
uint8
SDA
,
uint8
SCL
)
{
uint32
this_SDA_SCL_set_mask
;
uint32
this_SDA_SCL_clear_mask
;
i2c
[
id
]
->
last_SDA
=
SDA
;
i2c
[
id
]
->
last_SCL
=
SCL
;
if
(
i2c
[
id
]
->
cycles_delay
>
0
){
i2c_master_wait_cpu_cycles
(
i2c
[
id
]
->
cycles_delay
);
}
if
(
IS_PIN16
(
i2c
[
id
]
->
pin_SCL
)){
//GPIO16 wired differently, it has it's own register address
WRITE_PERI_REG
(
RTC_GPIO_OUT
,
SCL
);
// write SCL value
if
(
1
==
SDA
){
GPIO_REG_WRITE
(
GPIO_OUT_W1TS_ADDRESS
,
i2c
[
id
]
->
pin_SDA_mask
);
//SDA = 1
}
else
{
GPIO_REG_WRITE
(
GPIO_OUT_W1TC_ADDRESS
,
i2c
[
id
]
->
pin_SDA_mask
);
// SDA = 0
}
if
(
1
==
SCL
){
//clock stretching, GPIO16 version
while
(
!
(
READ_PERI_REG
(
RTC_GPIO_IN_DATA
)
&
1
))
{};
//read SCL value until SCL goes high
}
else
{
// dummy read operation and empty CPU cycles to maintain equal times for low and high state
READ_PERI_REG
(
RTC_GPIO_IN_DATA
)
&
1
;
asm
volatile
(
"nop;nop;nop;nop;"
);
}
}
else
{
this_SDA_SCL_set_mask
=
(
SDA
<<
i2c
[
id
]
->
pin_SDA
)
|
(
SCL
<<
i2c
[
id
]
->
pin_SCL
);
this_SDA_SCL_clear_mask
=
i2c
[
id
]
->
pin_SDA_SCL_mask
^
this_SDA_SCL_set_mask
;
GPIO_REG_WRITE
(
GPIO_OUT_W1TC_ADDRESS
,
this_SDA_SCL_clear_mask
);
GPIO_REG_WRITE
(
GPIO_OUT_W1TS_ADDRESS
,
this_SDA_SCL_set_mask
);
if
(
1
==
SCL
)
{
//clock stretching
i2c_master_wait_gpio_SCL_high
(
id
);
}
else
{
asm
volatile
(
"nop;nop;nop;"
);
// empty CPU cycles to maintain equal times for low and high state
}
}
}
/******************************************************************************
* FunctionName : i2c_master_getDC
* Description : Internal used function -
* get i2c SDA bit value
* Parameters : bus id
* Returns : uint8 - SDA bit value
*******************************************************************************/
static
inline
uint8
ICACHE_FLASH_ATTR
i2c_master_getDC
(
uint16
id
)
{
return
(
READ_PERI_REG
(
PERIPHS_GPIO_BASEADDR
+
GPIO_IN_ADDRESS
)
>>
i2c
[
id
]
->
pin_SDA
)
&
1
;
}
/******************************************************************************
* FunctionName : i2c_master_configured
* Description : checks if i2c bus is configured
* Parameters : bus id
* Returns : boolean value, true if configured
*******************************************************************************/
bool
ICACHE_FLASH_ATTR
i2c_master_configured
(
uint16
id
){
return
!
(
NULL
==
i2c
[
id
]);
}
/******************************************************************************
* FunctionName : i2c_master_init
* Description : initialize I2C bus to enable i2c operations
(reset state of all slave devices)
* Parameters : bus id
* Returns : NONE
*******************************************************************************/
void
ICACHE_FLASH_ATTR
i2c_master_init
(
uint16
id
)
{
uint8
i
;
i2c_master_setDC
(
id
,
1
,
0
);
// when SCL = 0, toggle SDA to clear up
i2c_master_setDC
(
id
,
0
,
0
)
;
i2c_master_setDC
(
id
,
1
,
0
)
;
// set data_cnt to max value
for
(
i
=
0
;
i
<
28
;
i
++
)
{
i2c_master_setDC
(
id
,
1
,
0
);
i2c_master_setDC
(
id
,
1
,
1
);
}
// reset all
i2c_master_stop
(
id
);
return
;
}
/******************************************************************************
* FunctionName : i2c_master_setup
* Description : Initializes and configures the driver on given bus ID
* Parameters : bus id
* Returns : configured speed
*******************************************************************************/
uint32
ICACHE_FLASH_ATTR
i2c_master_setup
(
uint16
id
,
uint8
sda
,
uint8
scl
,
uint32
speed
)
{
if
(
NULL
==
i2c
[
id
]){
i2c
[
id
]
=
(
i2c_master_state_t
*
)
malloc
(
sizeof
(
i2c_master_state_t
));
}
if
(
NULL
==
i2c
[
id
]){
// if malloc failed
return
0
;
}
i2c
[
id
]
->
last_SDA
=
1
;
//default idle state
i2c
[
id
]
->
last_SCL
=
1
;
i2c
[
id
]
->
pin_SDA
=
pin_num
[
sda
];
i2c
[
id
]
->
pin_SCL
=
pin_num
[
scl
];
i2c
[
id
]
->
pin_SDA_mask
=
1
<<
i2c
[
id
]
->
pin_SDA
;
i2c
[
id
]
->
pin_SCL_mask
=
1
<<
i2c
[
id
]
->
pin_SCL
;
i2c
[
id
]
->
pin_SDA_SCL_mask
=
i2c
[
id
]
->
pin_SDA_mask
|
i2c
[
id
]
->
pin_SCL_mask
;
i2c
[
id
]
->
speed
=
speed
;
i2c
[
id
]
->
cycles_delay
=
0
;
if
(
i2c
[
id
]
->
speed
<
MIN_SPEED
){
i2c
[
id
]
->
speed
=
MIN_SPEED
;
}
i2c_master_set_DC_delay
(
id
);
// recalibrate clock
ETS_GPIO_INTR_DISABLE
();
//disable gpio interrupts
if
(
IS_PIN16
(
i2c
[
id
]
->
pin_SCL
)){
//if GPIO16
CLEAR_PERI_REG_MASK
(
PAD_XPD_DCDC_CONF
,
0x43
);
//disable all functions for XPD_DCDC
SET_PERI_REG_MASK
(
PAD_XPD_DCDC_CONF
,
0x1
);
// select function RTC_GPIO0 for pin XPD_DCDC
CLEAR_PERI_REG_MASK
(
RTC_GPIO_CONF
,
0x1
);
//mux configuration for out enable
SET_PERI_REG_MASK
(
RTC_GPIO_ENABLE
,
0x1
);
//out enable
SET_PERI_REG_MASK
(
RTC_GPIO_OUT
,
0x1
);
// set SCL high
}
else
{
PIN_FUNC_SELECT
(
pin_mux
[
scl
],
pin_func
[
scl
]);
SET_PERI_REG_MASK
(
PERIPHS_GPIO_BASEADDR
+
GPIO_PIN_ADDR
(
GPIO_ID_PIN
(
i2c
[
id
]
->
pin_SCL
)),
GPIO_PIN_PAD_DRIVER_SET
(
GPIO_PAD_DRIVER_ENABLE
));
//open drain
gpio_output_set
(
i2c
[
id
]
->
pin_SCL_mask
,
0
,
i2c
[
id
]
->
pin_SCL_mask
,
0
);
//enable and set high
}
PIN_FUNC_SELECT
(
pin_mux
[
sda
],
pin_func
[
sda
]);
SET_PERI_REG_MASK
(
PERIPHS_GPIO_BASEADDR
+
GPIO_PIN_ADDR
(
GPIO_ID_PIN
(
i2c
[
id
]
->
pin_SDA
)),
GPIO_PIN_PAD_DRIVER_SET
(
GPIO_PAD_DRIVER_ENABLE
));
//open drain
gpio_output_set
(
i2c
[
id
]
->
pin_SDA_mask
,
0
,
i2c
[
id
]
->
pin_SDA_mask
,
0
);
//enable and set high
ETS_GPIO_INTR_ENABLE
();
//enable gpio interrupts
if
(
!
(
gpio_input_get
()
^
i2c
[
id
]
->
pin_SCL_mask
)){
//SCL is in low state, bus failure
return
0
;
}
i2c_master_init
(
id
);
if
(
!
(
gpio_input_get
()
^
i2c
[
id
]
->
pin_SDA_mask
)){
//SDA is in low state, bus failure
return
0
;
}
return
i2c
[
id
]
->
speed
;
}
/******************************************************************************
* FunctionName : i2c_master_start
* Description : set i2c to send state
* Parameters : bus id
* Returns : NONE
*******************************************************************************/
void
ICACHE_FLASH_ATTR
i2c_master_start
(
uint16
id
)
{
i2c_master_set_DC_delay
(
id
);
// recalibrate clock
i2c_master_setDC
(
id
,
1
,
i2c
[
id
]
->
last_SCL
);
i2c_master_setDC
(
id
,
1
,
1
);
i2c_master_setDC
(
id
,
0
,
1
);
}
/******************************************************************************
* FunctionName : i2c_master_stop
* Description : set i2c to stop sending state
* Parameters : bus id
* Returns : NONE
*******************************************************************************/
void
ICACHE_FLASH_ATTR
i2c_master_stop
(
uint16
id
)
{
i2c_master_setDC
(
id
,
0
,
i2c
[
id
]
->
last_SCL
);
i2c_master_setDC
(
id
,
0
,
1
);
i2c_master_setDC
(
id
,
1
,
1
);
}
/******************************************************************************
* FunctionName : i2c_master_readByte
* Description : read Byte from i2c bus
* Parameters : bus id
* Returns : uint8 - readed value
*******************************************************************************/
uint8
ICACHE_FLASH_ATTR
i2c_master_readByte
(
uint16
id
,
sint16
ack
)
{
uint8
retVal
=
0
;
uint8
k
;
sint8
i
;
//invert and clamp ACK to 0/1, because ACK == 1 for i2c means SDA in low state
uint8
ackLevel
=
(
ack
?
0
:
1
);
i2c_master_setDC
(
id
,
i2c
[
id
]
->
last_SDA
,
0
);
i2c_master_setDC
(
id
,
1
,
0
);
for
(
i
=
7
;
i
>=
0
;
i
--
)
{
i2c_master_setDC
(
id
,
1
,
1
);
k
=
i2c_master_getDC
(
id
);
i2c_master_setDC
(
id
,
1
,
0
);
// unnecessary in last iteration
k
<<=
i
;
retVal
|=
k
;
}
// set ACK
i2c_master_setDC
(
id
,
ackLevel
,
0
);
i2c_master_setDC
(
id
,
ackLevel
,
1
);
i2c_master_setDC
(
id
,
1
,
0
);
return
retVal
;
}
/******************************************************************************
* FunctionName : i2c_master_writeByte
* Description : write wrdata value(one byte) into i2c
* Parameters : bus id, uint8 wrdata - write value
* Returns : NONE
*******************************************************************************/
uint8
ICACHE_FLASH_ATTR
i2c_master_writeByte
(
uint16
id
,
uint8
wrdata
)
{
uint8
dat
;
sint8
i
;
uint8
retVal
;
i2c_master_setDC
(
id
,
i2c
[
id
]
->
last_SDA
,
0
);
for
(
i
=
7
;
i
>=
0
;
i
--
)
{
dat
=
(
wrdata
>>
i
)
&
1
;
i2c_master_setDC
(
id
,
dat
,
0
);
i2c_master_setDC
(
id
,
dat
,
1
);
}
//get ACK
i2c_master_setDC
(
id
,
1
,
0
);
i2c_master_setDC
(
id
,
1
,
1
);
retVal
=
i2c_master_getDC
(
id
);
i2c_master_setDC
(
id
,
1
,
0
);
return
!
retVal
;
}
#else // if defined I2C_MASTER_OLD_VERSION
/******************************************************************************
* OLD driver
* Enabled when I2C_MASTER_OLD_VERSION is defined in user_config.h
*******************************************************************************/
#define I2C_MASTER_SDA_MUX (pin_mux[sda])
#define I2C_MASTER_SCL_MUX (pin_mux[scl])
#define I2C_MASTER_SDA_GPIO (pinSDA)
#define I2C_MASTER_SCL_GPIO (pinSCL)
#define I2C_MASTER_SDA_FUNC (pin_func[sda])
#define I2C_MASTER_SCL_FUNC (pin_func[scl])
#define I2C_MASTER_SDA_HIGH_SCL_HIGH() \
gpio_output_set(1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0)
#define I2C_MASTER_SDA_HIGH_SCL_LOW() \
gpio_output_set(1<<I2C_MASTER_SDA_GPIO, 1<<I2C_MASTER_SCL_GPIO, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0)
#define I2C_MASTER_SDA_LOW_SCL_HIGH() \
gpio_output_set(1<<I2C_MASTER_SCL_GPIO, 1<<I2C_MASTER_SDA_GPIO, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0)
#define I2C_MASTER_SDA_LOW_SCL_LOW() \
gpio_output_set(0, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0)
#define i2c_master_wait os_delay_us
#define I2C_MASTER_SPEED 100000
#define I2C_MASTER_BUS_ID 0
LOCAL
uint8
m_nLastSDA
;
LOCAL
uint8
m_nLastSCL
;
...
...
@@ -26,8 +427,7 @@ LOCAL uint8 pinSCL = 15;
* FunctionName : i2c_master_setDC
* Description : Internal used function -
* set i2c SDA and SCL bit value for half clk cycle
* Parameters : uint8 SDA
* uint8 SCL
* Parameters : uint8 SDA, uint8 SCL
* Returns : NONE
*******************************************************************************/
LOCAL
void
ICACHE_FLASH_ATTR
...
...
@@ -49,11 +449,13 @@ i2c_master_setDC(uint8 SDA, uint8 SCL)
}
else
{
I2C_MASTER_SDA_HIGH_SCL_HIGH
();
}
if
(
1
==
SCL
)
{
do
{
sclLevel
=
GPIO_INPUT_GET
(
GPIO_ID_PIN
(
I2C_MASTER_SCL_GPIO
));
}
while
(
sclLevel
==
0
);
}
i2c_master_wait
(
5
);
}
/******************************************************************************
...
...
@@ -64,7 +466,7 @@ i2c_master_setDC(uint8 SDA, uint8 SCL)
* Returns : uint8 - SDA bit value
*******************************************************************************/
LOCAL
uint8
ICACHE_FLASH_ATTR
i2c_master_getDC
(
void
)
i2c_master_getDC
()
{
uint8
sda_out
;
sda_out
=
GPIO_INPUT_GET
(
GPIO_ID_PIN
(
I2C_MASTER_SDA_GPIO
));
...
...
@@ -74,53 +476,52 @@ i2c_master_getDC(void)
/******************************************************************************
* FunctionName : i2c_master_init
* Description : initilize I2C bus to enable i2c operations
* Parameters :
NONE
* Parameters :
bus id
* Returns : NONE
*******************************************************************************/
void
ICACHE_FLASH_ATTR
i2c_master_init
(
vo
id
)
i2c_master_init
(
uint16
id
)
{
uint8
i
;
i2c_master_setDC
(
1
,
0
);
i2c_master_wait
(
5
);
// when SCL = 0, toggle SDA to clear up
i2c_master_setDC
(
0
,
0
)
;
i2c_master_wait
(
5
);
i2c_master_setDC
(
1
,
0
)
;
i2c_master_wait
(
5
);
// set data_cnt to max value
for
(
i
=
0
;
i
<
28
;
i
++
)
{
i2c_master_setDC
(
1
,
0
);
i2c_master_wait
(
5
);
// sda 1, scl 0
i2c_master_setDC
(
1
,
1
);
i2c_master_wait
(
5
);
// sda 1, scl 1
}
// reset all
i2c_master_stop
();
i2c_master_stop
(
I2C_MASTER_BUS_ID
);
return
;
}
uint8
i2c_master_get_pinSDA
(){
return
pinSDA
;
}
uint8
i2c_master_get_pinSCL
(){
return
pinSCL
;
/******************************************************************************
* FunctionName : i2c_master_configured
* Description : checks if i2c bus is configured
* Parameters : bus id
* Returns : boolean value, true if configured
*******************************************************************************/
bool
ICACHE_FLASH_ATTR
i2c_master_configured
(
uint16
id
)
{
return
true
;
}
/******************************************************************************
* FunctionName : i2c_master_
gpio_init
* FunctionName : i2c_master_
setup
* Description : config SDA and SCL gpio to open-drain output mode,
* mux and gpio num defined in i2c_master.h
* Parameters :
NONE
* Returns :
NONE
* Parameters :
bus id, uint8 sda, uint8 scl, uint32 speed
* Returns :
configured speed
*******************************************************************************/
void
ICACHE_FLASH_ATTR
i2c_master_
gpio_init
(
uint8
sda
,
uint8
scl
)
uint32
ICACHE_FLASH_ATTR
i2c_master_
setup
(
uint16
id
,
uint8
sda
,
uint8
scl
,
uint32
speed
)
{
pinSDA
=
pin_num
[
sda
];
pinSCL
=
pin_num
[
scl
];
...
...
@@ -141,152 +542,61 @@ i2c_master_gpio_init(uint8 sda, uint8 scl)
ETS_GPIO_INTR_ENABLE
()
;
// ETS_INTR_UNLOCK();
i2c_master_init
();
i2c_master_init
(
I2C_MASTER_BUS_ID
);
return
I2C_MASTER_SPEED
;
}
/******************************************************************************
* FunctionName : i2c_master_start
* Description : set i2c to send state
* Parameters :
NONE
* Parameters :
bus id
* Returns : NONE
*******************************************************************************/
void
ICACHE_FLASH_ATTR
i2c_master_start
(
vo
id
)
i2c_master_start
(
uint16
id
)
{
i2c_master_setDC
(
1
,
m_nLastSCL
);
i2c_master_wait
(
5
);
i2c_master_setDC
(
1
,
1
);
i2c_master_wait
(
5
);
// sda 1, scl 1
i2c_master_setDC
(
0
,
1
);
i2c_master_wait
(
5
);
// sda 0, scl 1
}
/******************************************************************************
* FunctionName : i2c_master_stop
* Description : set i2c to stop sending state
* Parameters :
NONE
* Parameters :
bus id
* Returns : NONE
*******************************************************************************/
void
ICACHE_FLASH_ATTR
i2c_master_stop
(
vo
id
)
i2c_master_stop
(
uint16
id
)
{
i2c_master_wait
(
5
);
i2c_master_setDC
(
0
,
m_nLastSCL
);
i2c_master_wait
(
5
);
// sda 0
i2c_master_setDC
(
0
,
1
);
i2c_master_wait
(
5
);
// sda 0, scl 1
i2c_master_setDC
(
1
,
1
);
i2c_master_wait
(
5
);
// sda 1, scl 1
}
/******************************************************************************
* FunctionName : i2c_master_setAck
* Description : set ack to i2c bus as level value
* Parameters : uint8 level - 0 or 1
* Returns : NONE
*******************************************************************************/
void
ICACHE_FLASH_ATTR
i2c_master_setAck
(
uint8
level
)
{
i2c_master_setDC
(
m_nLastSDA
,
0
);
i2c_master_wait
(
5
);
i2c_master_setDC
(
level
,
0
);
i2c_master_wait
(
5
);
// sda level, scl 0
i2c_master_setDC
(
level
,
1
);
i2c_master_wait
(
8
);
// sda level, scl 1
i2c_master_setDC
(
level
,
0
);
i2c_master_wait
(
5
);
// sda level, scl 0
i2c_master_setDC
(
1
,
0
);
i2c_master_wait
(
5
);
}
/******************************************************************************
* FunctionName : i2c_master_getAck
* Description : confirm if peer send ack
* Parameters : NONE
* Returns : uint8 - ack value, 0 or 1
*******************************************************************************/
uint8
ICACHE_FLASH_ATTR
i2c_master_getAck
(
void
)
{
uint8
retVal
;
i2c_master_setDC
(
m_nLastSDA
,
0
);
i2c_master_wait
(
5
);
i2c_master_setDC
(
1
,
0
);
i2c_master_wait
(
5
);
i2c_master_setDC
(
1
,
1
);
i2c_master_wait
(
5
);
retVal
=
i2c_master_getDC
();
i2c_master_wait
(
5
);
i2c_master_setDC
(
1
,
0
);
i2c_master_wait
(
5
);
return
retVal
;
}
/******************************************************************************
* FunctionName : i2c_master_checkAck
* Description : get dev response
* Parameters : NONE
* Returns : true : get ack ; false : get nack
*******************************************************************************/
bool
ICACHE_FLASH_ATTR
i2c_master_checkAck
(
void
)
{
if
(
i2c_master_getAck
()){
return
FALSE
;
}
else
{
return
TRUE
;
}
}
/******************************************************************************
* FunctionName : i2c_master_send_ack
* Description : response ack
* Parameters : NONE
* Returns : NONE
*******************************************************************************/
void
ICACHE_FLASH_ATTR
i2c_master_send_ack
(
void
)
{
i2c_master_setAck
(
0x0
);
}
/******************************************************************************
* FunctionName : i2c_master_send_nack
* Description : response nack
* Parameters : NONE
* Returns : NONE
*******************************************************************************/
void
ICACHE_FLASH_ATTR
i2c_master_send_nack
(
void
)
{
i2c_master_setAck
(
0x1
);
}
/******************************************************************************
* FunctionName : i2c_master_readByte
* Description : read Byte from i2c bus
* Parameters :
NONE
* Parameters :
bus id
* Returns : uint8 - readed value
*******************************************************************************/
uint8
ICACHE_FLASH_ATTR
i2c_master_readByte
(
void
)
i2c_master_readByte
(
uint16
id
,
sint16
ack
)
{
uint8
retVal
=
0
;
uint8
k
,
i
;
uint8
ackLevel
=
(
ack
?
0
:
1
);
i2c_master_wait
(
5
);
i2c_master_setDC
(
m_nLastSDA
,
0
);
i2c_master_wait
(
5
);
// sda 1, scl 0
for
(
i
=
0
;
i
<
8
;
i
++
)
{
i2c_master_wait
(
5
);
i2c_master_setDC
(
1
,
0
);
i2c_master_wait
(
5
);
// sda 1, scl 0
i2c_master_setDC
(
1
,
1
);
i2c_master_wait
(
5
);
// sda 1, scl 1
k
=
i2c_master_getDC
();
i2c_master_wait
(
5
);
...
...
@@ -300,40 +610,51 @@ i2c_master_readByte(void)
}
i2c_master_setDC
(
1
,
0
);
i2c_master_wait
(
5
);
// sda 1, scl 0
// set ACK
i2c_master_setDC
(
m_nLastSDA
,
0
);
i2c_master_setDC
(
ackLevel
,
0
);
i2c_master_setDC
(
ackLevel
,
1
);
i2c_master_wait
(
3
);
i2c_master_setDC
(
ackLevel
,
0
);
i2c_master_setDC
(
1
,
0
);
return
retVal
;
}
/******************************************************************************
* FunctionName : i2c_master_writeByte
* Description : write wrdata value(one byte) into i2c
* Parameters : uint8 wrdata - write value
* Parameters :
bus id,
uint8 wrdata - write value
* Returns : NONE
*******************************************************************************/
void
ICACHE_FLASH_ATTR
i2c_master_writeByte
(
uint8
wrdata
)
uint8
ICACHE_FLASH_ATTR
i2c_master_writeByte
(
uint16
id
,
uint8
wrdata
)
{
uint8
dat
;
sint8
i
;
uint8
retVal
;
i2c_master_wait
(
5
);
i2c_master_setDC
(
m_nLastSDA
,
0
);
i2c_master_wait
(
5
);
for
(
i
=
7
;
i
>=
0
;
i
--
)
{
dat
=
wrdata
>>
i
;
i2c_master_setDC
(
dat
,
0
);
i2c_master_wait
(
5
);
i2c_master_setDC
(
dat
,
1
);
i2c_master_wait
(
5
);
if
(
i
==
0
)
{
i2c_master_wait
(
3
);
////
}
i2c_master_setDC
(
dat
,
0
);
i2c_master_wait
(
5
);
}
// get ACK
i2c_master_setDC
(
m_nLastSDA
,
0
);
i2c_master_setDC
(
1
,
0
);
i2c_master_setDC
(
1
,
1
);
retVal
=
i2c_master_getDC
();
i2c_master_wait
(
5
);
i2c_master_setDC
(
1
,
0
);
return
!
retVal
;
}
#endif
app/driver/pwm2.c
0 → 100644
View file @
310faf7f
/*
* Software PWM using soft-interrupt timer1.
* Supports higher frequencies compared to Espressif provided one.
*
* Nikolay Fiykov
*/
#include <stddef.h>
#include <stdint.h>
#include "mem.h"
#include "pin_map.h"
#include "platform.h"
#include "hw_timer.h"
#include "driver/pwm2.h"
#define PWM2_TMR_MAGIC_80MHZ 16
#define PWM2_TMR_MAGIC_160MHZ 32
// module vars, lazy initialized, allocated only if pwm2 is being used
static
pwm2_module_data_t
*
moduleData
=
NULL
;
//############################
// tools
static
bool
isPinSetup
(
const
pwm2_module_data_t
*
data
,
const
uint8_t
pin
)
{
return
data
->
setupData
.
pin
[
pin
].
pulseResolutions
>
0
;
}
static
uint32_t
getCPUTicksPerSec
()
{
return
system_get_cpu_freq
()
*
1000000
;
}
static
uint8_t
getCpuTimerTicksDivisor
()
{
return
system_get_cpu_freq
()
==
80
?
PWM2_TMR_MAGIC_80MHZ
:
PWM2_TMR_MAGIC_160MHZ
;
}
static
uint32_t
findGCD
(
uint32_t
n1
,
uint32_t
n2
)
{
uint32_t
n3
;
while
(
n2
!=
0
)
{
n3
=
n1
;
n1
=
n2
;
n2
=
n3
%
n2
;
}
return
n1
;
}
static
uint32_t
findGreatesCommonDividerForTimerTicks
(
uint32_t
newTimerTicks
,
uint32_t
oldTimerTicks
)
{
return
oldTimerTicks
==
0
?
newTimerTicks
:
findGCD
(
newTimerTicks
,
oldTimerTicks
);
}
static
uint16_t
findAllEnabledGpioMask
(
pwm2_module_data_t
*
moduleData
)
{
uint16_t
enableGpioMask
=
0
;
for
(
int
i
=
1
;
i
<
GPIO_PIN_NUM
;
i
++
)
{
if
(
moduleData
->
setupData
.
pin
[
i
].
pulseResolutions
>
0
)
{
enableGpioMask
|=
moduleData
->
interruptData
.
pin
[
i
].
gpioMask
;
}
}
return
enableGpioMask
;
}
static
uint32_t
findCommonCPUTicksDivisor
(
pwm2_module_data_t
*
moduleData
)
{
uint32_t
gcdCPUTicks
=
0
;
for
(
int
i
=
1
;
i
<
GPIO_PIN_NUM
;
i
++
)
{
if
(
moduleData
->
setupData
.
pin
[
i
].
pulseResolutions
>
0
)
{
gcdCPUTicks
=
findGreatesCommonDividerForTimerTicks
(
moduleData
->
setupData
.
pin
[
i
].
resolutionCPUTicks
,
gcdCPUTicks
);
}
}
return
gcdCPUTicks
;
}
static
uint32_t
cpuToTimerTicks
(
uint32_t
cpuTicks
)
{
return
cpuTicks
/
getCpuTimerTicksDivisor
();
}
static
void
updatePinResolutionToInterruptsMultiplier
(
pwm2_pin_setup_t
*
sPin
,
uint32_t
timerCPUTicks
)
{
sPin
->
resolutionInterruptCounterMultiplier
=
sPin
->
resolutionCPUTicks
/
timerCPUTicks
;
}
static
void
updatePinPulseToInterruptsCounter
(
pwm2_pin_interrupt_t
*
iPin
,
pwm2_pin_setup_t
*
sPin
)
{
iPin
->
pulseInterruptCcounter
=
(
sPin
->
pulseResolutions
+
1
)
*
sPin
->
resolutionInterruptCounterMultiplier
;
}
static
uint8_t
getDutyAdjustment
(
const
uint32_t
duty
,
const
uint32_t
pulse
)
{
if
(
duty
==
0
)
{
return
0
;
}
else
if
(
duty
==
pulse
)
{
return
2
;
}
else
{
return
1
;
}
}
static
void
updatePinOffCounter
(
pwm2_pin_interrupt_t
*
iPin
,
pwm2_pin_setup_t
*
sPin
)
{
iPin
->
offInterruptCounter
=
(
sPin
->
duty
+
getDutyAdjustment
(
sPin
->
duty
,
sPin
->
pulseResolutions
))
*
sPin
->
resolutionInterruptCounterMultiplier
;
}
static
void
reCalculateCommonToAllPinsData
(
pwm2_module_data_t
*
moduleData
)
{
moduleData
->
interruptData
.
enabledGpioMask
=
findAllEnabledGpioMask
(
moduleData
);
moduleData
->
setupData
.
interruptTimerCPUTicks
=
findCommonCPUTicksDivisor
(
moduleData
);
moduleData
->
setupData
.
interruptTimerTicks
=
cpuToTimerTicks
(
moduleData
->
setupData
.
interruptTimerCPUTicks
);
for
(
int
i
=
1
;
i
<
GPIO_PIN_NUM
;
i
++
)
{
if
(
isPinSetup
(
moduleData
,
i
))
{
updatePinResolutionToInterruptsMultiplier
(
&
moduleData
->
setupData
.
pin
[
i
],
moduleData
->
setupData
.
interruptTimerCPUTicks
);
updatePinPulseToInterruptsCounter
(
&
moduleData
->
interruptData
.
pin
[
i
],
&
moduleData
->
setupData
.
pin
[
i
]);
updatePinOffCounter
(
&
moduleData
->
interruptData
.
pin
[
i
],
&
moduleData
->
setupData
.
pin
[
i
]);
}
}
}
static
uint64_t
enduserFreqToCPUTicks
(
const
uint64_t
divisableFreq
,
const
uint64_t
freqDivisor
,
const
uint64_t
resolution
)
{
return
(
getCPUTicksPerSec
()
/
(
freqDivisor
*
resolution
))
*
divisableFreq
;
}
static
uint16_t
getPinGpioMask
(
uint8_t
pin
)
{
return
1
<<
GPIO_ID_PIN
(
pin_num
[
pin
]);
}
static
void
set_duty
(
pwm2_module_data_t
*
moduleData
,
const
uint8_t
pin
,
const
uint32_t
duty
)
{
pwm2_pin_setup_t
*
sPin
=
&
moduleData
->
setupData
.
pin
[
pin
];
pwm2_pin_interrupt_t
*
iPin
=
&
moduleData
->
interruptData
.
pin
[
pin
];
sPin
->
duty
=
duty
;
updatePinOffCounter
(
iPin
,
sPin
);
}
static
void
configureAllPinsAsGpioOutput
(
pwm2_module_data_t
*
moduleData
)
{
for
(
int
i
=
1
;
i
<
GPIO_PIN_NUM
;
i
++
)
{
if
(
isPinSetup
(
moduleData
,
i
))
{
PIN_FUNC_SELECT
(
pin_mux
[
i
],
pin_func
[
i
]);
// set pin as gpio
PIN_PULLUP_EN
(
pin_mux
[
i
]);
// set pin pullup on
}
}
}
static
void
resetPinCounters
(
pwm2_module_data_t
*
moduleData
)
{
for
(
int
i
=
1
;
i
<
GPIO_PIN_NUM
;
i
++
)
{
if
(
isPinSetup
(
moduleData
,
i
))
{
moduleData
->
interruptData
.
pin
[
i
].
currentInterruptCounter
=
0
;
}
}
}
//############################
// interrupt handler related
static
inline
void
computeIsPinOn
(
pwm2_pin_interrupt_t
*
pin
,
uint16_t
*
maskOn
)
{
if
(
pin
->
currentInterruptCounter
==
pin
->
pulseInterruptCcounter
)
{
pin
->
currentInterruptCounter
=
1
;
}
else
{
pin
->
currentInterruptCounter
++
;
}
// ets_printf("curr=%u on=%u\n", pin->currentInterruptCounter, (pin->currentInterruptCounter < pin->offInterruptCounter));
if
(
pin
->
currentInterruptCounter
<
pin
->
offInterruptCounter
)
{
*
maskOn
|=
pin
->
gpioMask
;
}
}
static
inline
bool
isPinSetup2
(
const
pwm2_interrupt_handler_data_t
*
data
,
const
uint8_t
pin
)
{
return
data
->
pin
[
pin
].
gpioMask
>
0
;
}
static
inline
uint16_t
findAllPinOns
(
pwm2_interrupt_handler_data_t
*
data
)
{
uint16_t
maskOn
=
0
;
for
(
int
i
=
1
;
i
<
GPIO_PIN_NUM
;
i
++
)
{
if
(
isPinSetup2
(
data
,
i
))
{
computeIsPinOn
(
&
data
->
pin
[
i
],
&
maskOn
);
}
}
return
maskOn
;
}
static
inline
void
setGpioPins
(
const
uint16_t
enabledGpioMask
,
const
register
uint16_t
maskOn
)
{
GPIO_REG_WRITE
(
GPIO_OUT_W1TS_ADDRESS
,
maskOn
);
const
register
uint16_t
maskOff
=
~
maskOn
&
enabledGpioMask
;
GPIO_REG_WRITE
(
GPIO_OUT_W1TC_ADDRESS
,
maskOff
);
}
static
void
ICACHE_RAM_ATTR
timerInterruptHandler
(
os_param_t
arg
)
{
pwm2_interrupt_handler_data_t
*
data
=
(
pwm2_interrupt_handler_data_t
*
)
arg
;
setGpioPins
(
data
->
enabledGpioMask
,
findAllPinOns
(
data
));
}
//############################
// driver's public API
void
pwm2_init
()
{
moduleData
=
os_malloc
(
sizeof
(
pwm2_module_data_t
));
memset
(
moduleData
,
0
,
sizeof
(
*
moduleData
));
}
pwm2_module_data_t
*
pwm2_get_module_data
()
{
return
moduleData
;
}
bool
pwm2_is_pin_setup
(
const
uint8_t
pin
)
{
return
isPinSetup
(
moduleData
,
pin
);
}
void
pwm2_setup_pin
(
const
uint8_t
pin
,
const
uint32_t
divisableFreq
,
const
uint32_t
freqDivisor
,
const
uint32_t
resolution
,
const
uint32_t
initDuty
)
{
moduleData
->
setupData
.
pin
[
pin
].
pulseResolutions
=
resolution
;
moduleData
->
setupData
.
pin
[
pin
].
divisableFrequency
=
divisableFreq
;
moduleData
->
setupData
.
pin
[
pin
].
frequencyDivisor
=
freqDivisor
;
moduleData
->
setupData
.
pin
[
pin
].
resolutionCPUTicks
=
enduserFreqToCPUTicks
(
divisableFreq
,
freqDivisor
,
resolution
);
moduleData
->
interruptData
.
pin
[
pin
].
gpioMask
=
getPinGpioMask
(
pin
);
reCalculateCommonToAllPinsData
(
moduleData
);
set_duty
(
moduleData
,
pin
,
initDuty
);
}
void
pwm2_release_pin
(
const
uint8_t
pin
)
{
moduleData
->
setupData
.
pin
[
pin
].
pulseResolutions
=
0
;
moduleData
->
interruptData
.
pin
[
pin
].
gpioMask
=
0
;
}
void
pwm2_stop
()
{
if
(
!
moduleData
->
setupData
.
isStarted
)
{
return
;
}
platform_hw_timer_close_exclusive
();
GPIO_REG_WRITE
(
GPIO_ENABLE_W1TC_ADDRESS
,
moduleData
->
interruptData
.
enabledGpioMask
);
// clear pins of being gpio output
moduleData
->
setupData
.
isStarted
=
false
;
}
bool
pwm2_start
()
{
if
(
moduleData
->
setupData
.
isStarted
)
{
return
true
;
}
if
(
!
platform_hw_timer_init_exclusive
(
FRC1_SOURCE
,
TRUE
,
timerInterruptHandler
,
(
os_param_t
)
&
moduleData
->
interruptData
,
(
void
(
*
)(
void
))
NULL
))
{
return
false
;
}
configureAllPinsAsGpioOutput
(
moduleData
);
resetPinCounters
(
moduleData
);
GPIO_REG_WRITE
(
GPIO_ENABLE_W1TS_ADDRESS
,
moduleData
->
interruptData
.
enabledGpioMask
);
// set pins as gpio output
moduleData
->
setupData
.
isStarted
=
true
;
platform_hw_timer_arm_ticks_exclusive
(
moduleData
->
setupData
.
interruptTimerTicks
);
return
true
;
}
bool
pwm2_is_started
()
{
return
moduleData
->
setupData
.
isStarted
;
}
void
pwm2_set_duty
(
const
uint8_t
pin
,
const
uint32_t
duty
)
{
set_duty
(
moduleData
,
pin
,
duty
);
}
app/driver/readline.c
View file @
310faf7f
...
...
@@ -2,7 +2,7 @@
#include "os_type.h"
#include "osapi.h"
#include "driver/uart.h"
#include
"c_types
.h
"
#include
<stdint
.h
>
LOCAL
os_timer_t
readline_timer
;
...
...
app/driver/rotary.c
View file @
310faf7f
...
...
@@ -11,9 +11,9 @@
*/
#include "platform.h"
#include
"c_types
.h
"
#include
"../libc/c_
stdlib.h
"
#include
"../libc/c_
stdio.h
"
#include
<stdint
.h
>
#include
<
stdlib.h
>
#include
<
stdio.h
>
#include "driver/rotary.h"
#include "user_interface.h"
#include "task/task.h"
...
...
@@ -87,7 +87,7 @@ int rotary_close(uint32_t channel)
rotary_clear_pin
(
d
->
phase_b_pin
);
rotary_clear_pin
(
d
->
press_pin
);
c_
free
(
d
);
free
(
d
);
set_gpio_bits
();
...
...
@@ -207,7 +207,7 @@ int rotary_setup(uint32_t channel, int phase_a, int phase_b, int press, task_han
}
}
DATA
*
d
=
(
DATA
*
)
c
_z
alloc
(
sizeof
(
DATA
));
DATA
*
d
=
(
DATA
*
)
calloc
(
1
,
sizeof
(
DATA
));
if
(
!
d
)
{
return
-
1
;
}
...
...
app/driver/switec.c
View file @
310faf7f
...
...
@@ -14,9 +14,10 @@
*/
#include "platform.h"
#include "c_types.h"
#include "../libc/c_stdlib.h"
#include "../libc/c_stdio.h"
#include <stdint.h>
#include <stddef.h>
#include <stdlib.h>
#include <stdio.h>
#include "driver/switec.h"
#include "ets_sys.h"
#include "os_type.h"
...
...
@@ -101,7 +102,7 @@ int switec_close(uint32_t channel)
gpio_output_set
(
0
,
0
,
0
,
d
->
mask
);
data
[
channel
]
=
NULL
;
c_
free
(
d
);
free
(
d
);
// See if there are any other channels active
for
(
channel
=
0
;
channel
<
sizeof
(
data
)
/
sizeof
(
data
[
0
]);
channel
++
)
{
...
...
@@ -259,7 +260,7 @@ int switec_setup(uint32_t channel, int *pin, int max_deg_per_sec, task_handle_t
}
}
DATA
*
d
=
(
DATA
*
)
c
_z
alloc
(
sizeof
(
DATA
));
DATA
*
d
=
(
DATA
*
)
calloc
(
1
,
sizeof
(
DATA
));
if
(
!
d
)
{
return
-
1
;
}
...
...
@@ -269,7 +270,7 @@ int switec_setup(uint32_t channel, int *pin, int max_deg_per_sec, task_handle_t
// no autoreload
if
(
!
platform_hw_timer_init
(
TIMER_OWNER
,
FRC1_SOURCE
,
FALSE
))
{
// Failed to get the timer
c_
free
(
d
);
free
(
d
);
return
-
1
;
}
}
...
...
@@ -299,12 +300,12 @@ int switec_setup(uint32_t channel, int *pin, int max_deg_per_sec, task_handle_t
#ifdef SWITEC_DEBUG
for
(
i
=
0
;
i
<
4
;
i
++
)
{
c_
printf
(
"pin[%d]=%d
\n
"
,
i
,
pin
[
i
]);
printf
(
"pin[%d]=%d
\n
"
,
i
,
pin
[
i
]);
}
c_
printf
(
"Mask=0x%x
\n
"
,
d
->
mask
);
printf
(
"Mask=0x%x
\n
"
,
d
->
mask
);
for
(
i
=
0
;
i
<
N_STATES
;
i
++
)
{
c_
printf
(
"pinstate[%d]=0x%x
\n
"
,
i
,
d
->
pinstate
[
i
]);
printf
(
"pinstate[%d]=0x%x
\n
"
,
i
,
d
->
pinstate
[
i
]);
}
#endif
...
...
app/esp-gdbstub/Makefile
View file @
310faf7f
...
...
@@ -37,8 +37,6 @@ endif
# Required for each makefile to inherit from the parent
#
INCLUDES
+=
-I
$(PDIR)
include
INCLUDES
+=
-I
./
INCLUDES
+=
-I
../../include/ets
PDIR
:=
../
$(PDIR)
sinclude
$(PDIR)Makefile
...
...
app/esp-gdbstub/gdbstub.c
View file @
310faf7f
...
...
@@ -10,7 +10,6 @@
#include "gdbstub.h"
#include "ets_sys.h"
#include "eagle_soc.h"
#include "c_types.h"
#include "gpio.h"
#include "xtensa/corebits.h"
#include "driver/uart.h"
...
...
@@ -659,11 +658,22 @@ static void ATTR_GDBFN gdb_semihost_putchar1(char c) {
}
#if !GDBSTUB_FREERTOS
//The OS-less SDK uses the Xtensa HAL to handle exceptions. We can use those functions to catch any
//fatal exceptions and invoke the debugger when this happens.
/* The non-OS SDK uses the Xtensa HAL to handle exceptions, and the SDK now establishes exception
* handlers for EXCCAUSE errors: ILLEGAL, INSTR_ERROR, LOAD_STORE_ERROR, PRIVILEGED, UNALIGNED,
* LOAD_PROHIBITED and STORE_PROHIBITED. These handlers are established in SDK/app_main.c.
* LOAD_STORE_ERROR is handled by SDK/user_exceptions.o:load_non_32_wide_handler() which is a
* fork of our version. The remaining are handled by a static function at
* SDK:app+main.c:offset 0x0348.
*
* Our SDK 2 load_non_32_wide_handler chained into the gdb stub handler if the error was anything
* other than a L8UI, L16SI or L16UI at a flash mapped address. However in this current
* implementation, we have left the Espressif handler in place and handle the other errors with
* the debugger. This means that the debugger will not capture other load store errors. I
* might revise this.
*/
static
void
ATTR_GDBINIT
install_exceptions
()
{
int
i
;
int
exno
[]
=
{
EXCCAUSE_ILLEGAL
,
EXCCAUSE_SYSCALL
,
EXCCAUSE_INSTR_ERROR
,
EXCCAUSE_LOAD_STORE_ERROR
,
const
int
exno
[]
=
{
EXCCAUSE_ILLEGAL
,
EXCCAUSE_SYSCALL
,
EXCCAUSE_INSTR_ERROR
,
/*
EXCCAUSE_LOAD_STORE_ERROR,
*/
EXCCAUSE_DIVIDE_BY_ZERO
,
EXCCAUSE_UNALIGNED
,
EXCCAUSE_INSTR_DATA_ERROR
,
EXCCAUSE_LOAD_STORE_DATA_ERROR
,
EXCCAUSE_INSTR_ADDR_ERROR
,
EXCCAUSE_LOAD_STORE_ADDR_ERROR
,
EXCCAUSE_INSTR_PROHIBITED
,
EXCCAUSE_LOAD_PROHIBITED
,
EXCCAUSE_STORE_PROHIBITED
};
...
...
app/fatfs/Makefile
View file @
310faf7f
...
...
@@ -42,11 +42,6 @@ STD_CFLAGS=-std=gnu11 -Wimplicit -imacros $(FATFS_INC_DIR)fatfs_prefix_lib.h
# Required for each makefile to inherit from the parent
#
INCLUDES
:=
$(INCLUDES)
-I
$(PDIR)
include
INCLUDES
+=
-I
./
INCLUDES
+=
-I
../platform
INCLUDES
+=
-I
../libc
INCLUDES
+=
-I
../lua
PDIR
:=
../
$(PDIR)
sinclude
$(PDIR)Makefile
app/fatfs/myfatfs.c
View file @
310faf7f
#include <c_stdlib.h>
#include <c_string.h>
#include <stdlib.h>
#include <string.h>
#include <stdbool.h>
#include "vfs_int.h"
...
...
@@ -12,37 +13,37 @@ static FRESULT last_result = FR_OK;
static
const
char
*
const
volstr
[
FF_VOLUMES
]
=
{
FF_VOLUME_STRS
};
static
int
is_current_drive
=
FALSE
;
static
int
is_current_drive
=
false
;
// forward declarations
static
s
int32_t
myfatfs_close
(
const
struct
vfs_file
*
fd
);
static
s
int32_t
myfatfs_read
(
const
struct
vfs_file
*
fd
,
void
*
ptr
,
size_t
len
);
static
s
int32_t
myfatfs_write
(
const
struct
vfs_file
*
fd
,
const
void
*
ptr
,
size_t
len
);
static
s
int32_t
myfatfs_lseek
(
const
struct
vfs_file
*
fd
,
s
int32_t
off
,
int
whence
);
static
s
int32_t
myfatfs_eof
(
const
struct
vfs_file
*
fd
);
static
s
int32_t
myfatfs_tell
(
const
struct
vfs_file
*
fd
);
static
s
int32_t
myfatfs_flush
(
const
struct
vfs_file
*
fd
);
static
int32_t
myfatfs_close
(
const
struct
vfs_file
*
fd
);
static
int32_t
myfatfs_read
(
const
struct
vfs_file
*
fd
,
void
*
ptr
,
size_t
len
);
static
int32_t
myfatfs_write
(
const
struct
vfs_file
*
fd
,
const
void
*
ptr
,
size_t
len
);
static
int32_t
myfatfs_lseek
(
const
struct
vfs_file
*
fd
,
int32_t
off
,
int
whence
);
static
int32_t
myfatfs_eof
(
const
struct
vfs_file
*
fd
);
static
int32_t
myfatfs_tell
(
const
struct
vfs_file
*
fd
);
static
int32_t
myfatfs_flush
(
const
struct
vfs_file
*
fd
);
static
uint32_t
myfatfs_fsize
(
const
struct
vfs_file
*
fd
);
static
s
int32_t
myfatfs_ferrno
(
const
struct
vfs_file
*
fd
);
static
int32_t
myfatfs_ferrno
(
const
struct
vfs_file
*
fd
);
static
s
int32_t
myfatfs_closedir
(
const
struct
vfs_dir
*
dd
);
static
s
int32_t
myfatfs_readdir
(
const
struct
vfs_dir
*
dd
,
struct
vfs_stat
*
buf
);
static
int32_t
myfatfs_closedir
(
const
struct
vfs_dir
*
dd
);
static
int32_t
myfatfs_readdir
(
const
struct
vfs_dir
*
dd
,
struct
vfs_stat
*
buf
);
static
vfs_vol
*
myfatfs_mount
(
const
char
*
name
,
int
num
);
static
vfs_file
*
myfatfs_open
(
const
char
*
name
,
const
char
*
mode
);
static
vfs_dir
*
myfatfs_opendir
(
const
char
*
name
);
static
s
int32_t
myfatfs_stat
(
const
char
*
name
,
struct
vfs_stat
*
buf
);
static
s
int32_t
myfatfs_remove
(
const
char
*
name
);
static
s
int32_t
myfatfs_rename
(
const
char
*
oldname
,
const
char
*
newname
);
static
s
int32_t
myfatfs_mkdir
(
const
char
*
name
);
static
s
int32_t
myfatfs_fsinfo
(
uint32_t
*
total
,
uint32_t
*
used
);
static
s
int32_t
myfatfs_chdrive
(
const
char
*
name
);
static
s
int32_t
myfatfs_chdir
(
const
char
*
name
);
static
s
int32_t
myfatfs_errno
(
void
);
static
int32_t
myfatfs_stat
(
const
char
*
name
,
struct
vfs_stat
*
buf
);
static
int32_t
myfatfs_remove
(
const
char
*
name
);
static
int32_t
myfatfs_rename
(
const
char
*
oldname
,
const
char
*
newname
);
static
int32_t
myfatfs_mkdir
(
const
char
*
name
);
static
int32_t
myfatfs_fsinfo
(
uint32_t
*
total
,
uint32_t
*
used
);
static
int32_t
myfatfs_chdrive
(
const
char
*
name
);
static
int32_t
myfatfs_chdir
(
const
char
*
name
);
static
int32_t
myfatfs_errno
(
void
);
static
void
myfatfs_clearerr
(
void
);
static
s
int32_t
myfatfs_umount
(
const
struct
vfs_vol
*
vol
);
static
int32_t
myfatfs_umount
(
const
struct
vfs_vol
*
vol
);
// ---------------------------------------------------------------------------
...
...
@@ -112,12 +113,12 @@ struct myvfs_dir {
//
void
*
ff_memalloc
(
UINT
size
)
{
return
c_
malloc
(
size
);
return
malloc
(
size
);
}
void
ff_memfree
(
void
*
mblock
)
{
c_
free
(
mblock
);
free
(
mblock
);
}
// TODO
...
...
@@ -153,14 +154,14 @@ DWORD get_fattime( void )
const struct myvfs_vol *myvol = (const struct myvfs_vol *)descr; \
FATFS *fs = (FATFS *)&(myvol->fs);
static
s
int32_t
myfatfs_umount
(
const
struct
vfs_vol
*
vol
)
static
int32_t
myfatfs_umount
(
const
struct
vfs_vol
*
vol
)
{
GET_FATFS_FS
(
vol
);
last_result
=
f_mount
(
NULL
,
myvol
->
ldrname
,
0
);
c_
free
(
myvol
->
ldrname
);
c_
free
(
(
void
*
)
vol
);
free
(
myvol
->
ldrname
);
free
(
(
void
*
)
vol
);
return
last_result
==
FR_OK
?
VFS_RES_OK
:
VFS_RES_ERR
;
}
...
...
@@ -173,19 +174,19 @@ static sint32_t myfatfs_umount( const struct vfs_vol *vol )
const struct myvfs_file *myfd = (const struct myvfs_file *)descr; \
FIL *fp = (FIL *)&(myfd->fp);
static
s
int32_t
myfatfs_close
(
const
struct
vfs_file
*
fd
)
static
int32_t
myfatfs_close
(
const
struct
vfs_file
*
fd
)
{
GET_FIL_FP
(
fd
)
last_result
=
f_close
(
fp
);
// free descriptor memory
c_
free
(
(
void
*
)
fd
);
free
(
(
void
*
)
fd
);
return
last_result
==
FR_OK
?
VFS_RES_OK
:
VFS_RES_ERR
;
}
static
s
int32_t
myfatfs_read
(
const
struct
vfs_file
*
fd
,
void
*
ptr
,
size_t
len
)
static
int32_t
myfatfs_read
(
const
struct
vfs_file
*
fd
,
void
*
ptr
,
size_t
len
)
{
GET_FIL_FP
(
fd
);
UINT
act_read
;
...
...
@@ -195,7 +196,7 @@ static sint32_t myfatfs_read( const struct vfs_file *fd, void *ptr, size_t len )
return
last_result
==
FR_OK
?
act_read
:
VFS_RES_ERR
;
}
static
s
int32_t
myfatfs_write
(
const
struct
vfs_file
*
fd
,
const
void
*
ptr
,
size_t
len
)
static
int32_t
myfatfs_write
(
const
struct
vfs_file
*
fd
,
const
void
*
ptr
,
size_t
len
)
{
GET_FIL_FP
(
fd
);
UINT
act_written
;
...
...
@@ -205,7 +206,7 @@ static sint32_t myfatfs_write( const struct vfs_file *fd, const void *ptr, size_
return
last_result
==
FR_OK
?
act_written
:
VFS_RES_ERR
;
}
static
s
int32_t
myfatfs_lseek
(
const
struct
vfs_file
*
fd
,
s
int32_t
off
,
int
whence
)
static
int32_t
myfatfs_lseek
(
const
struct
vfs_file
*
fd
,
int32_t
off
,
int
whence
)
{
GET_FIL_FP
(
fd
);
FSIZE_t
new_pos
;
...
...
@@ -231,7 +232,7 @@ static sint32_t myfatfs_lseek( const struct vfs_file *fd, sint32_t off, int when
return
last_result
==
FR_OK
?
new_pos
:
VFS_RES_ERR
;
}
static
s
int32_t
myfatfs_eof
(
const
struct
vfs_file
*
fd
)
static
int32_t
myfatfs_eof
(
const
struct
vfs_file
*
fd
)
{
GET_FIL_FP
(
fd
);
...
...
@@ -240,7 +241,7 @@ static sint32_t myfatfs_eof( const struct vfs_file *fd )
return
f_eof
(
fp
);
}
static
s
int32_t
myfatfs_tell
(
const
struct
vfs_file
*
fd
)
static
int32_t
myfatfs_tell
(
const
struct
vfs_file
*
fd
)
{
GET_FIL_FP
(
fd
);
...
...
@@ -249,7 +250,7 @@ static sint32_t myfatfs_tell( const struct vfs_file *fd )
return
f_tell
(
fp
);
}
static
s
int32_t
myfatfs_flush
(
const
struct
vfs_file
*
fd
)
static
int32_t
myfatfs_flush
(
const
struct
vfs_file
*
fd
)
{
GET_FIL_FP
(
fd
);
...
...
@@ -267,7 +268,7 @@ static uint32_t myfatfs_fsize( const struct vfs_file *fd )
return
f_size
(
fp
);
}
static
s
int32_t
myfatfs_ferrno
(
const
struct
vfs_file
*
fd
)
static
int32_t
myfatfs_ferrno
(
const
struct
vfs_file
*
fd
)
{
return
-
last_result
;
}
...
...
@@ -280,24 +281,24 @@ static sint32_t myfatfs_ferrno( const struct vfs_file *fd )
const struct myvfs_dir *mydd = (const struct myvfs_dir *)descr; \
DIR *dp = (DIR *)&(mydd->dp);
static
s
int32_t
myfatfs_closedir
(
const
struct
vfs_dir
*
dd
)
static
int32_t
myfatfs_closedir
(
const
struct
vfs_dir
*
dd
)
{
GET_DIR_DP
(
dd
);
last_result
=
f_closedir
(
dp
);
// free descriptor memory
c_
free
(
(
void
*
)
dd
);
free
(
(
void
*
)
dd
);
return
last_result
==
FR_OK
?
VFS_RES_OK
:
VFS_RES_ERR
;
}
static
void
myfatfs_fill_stat
(
const
FILINFO
*
fno
,
struct
vfs_stat
*
buf
)
{
c_
memset
(
buf
,
0
,
sizeof
(
struct
vfs_stat
)
);
memset
(
buf
,
0
,
sizeof
(
struct
vfs_stat
)
);
// fill in supported stat entries
c_
strncpy
(
buf
->
name
,
fno
->
fname
,
FS_OBJ_NAME_LEN
+
1
);
strncpy
(
buf
->
name
,
fno
->
fname
,
FS_OBJ_NAME_LEN
+
1
);
buf
->
name
[
FS_OBJ_NAME_LEN
]
=
'\0'
;
buf
->
size
=
fno
->
fsize
;
buf
->
is_dir
=
fno
->
fattrib
&
AM_DIR
?
1
:
0
;
...
...
@@ -316,7 +317,7 @@ static void myfatfs_fill_stat( const FILINFO *fno, struct vfs_stat *buf )
buf
->
tm_valid
=
1
;
}
static
s
int32_t
myfatfs_readdir
(
const
struct
vfs_dir
*
dd
,
struct
vfs_stat
*
buf
)
static
int32_t
myfatfs_readdir
(
const
struct
vfs_dir
*
dd
,
struct
vfs_stat
*
buf
)
{
GET_DIR_DP
(
dd
);
FILINFO
fno
;
...
...
@@ -340,19 +341,19 @@ static sint32_t myfatfs_readdir( const struct vfs_dir *dd, struct vfs_stat *buf
static
vfs_vol
*
myfatfs_mount
(
const
char
*
name
,
int
num
)
{
struct
myvfs_vol
*
vol
;
const
size_t
len
=
c_
strlen
(
name
);
const
size_t
len
=
strlen
(
name
);
// num argument specifies the physical driver = SS/CS pin number for this sd card
if
(
num
>=
0
)
{
for
(
int
i
=
0
;
i
<
NUM_LOGICAL_DRIVES
;
i
++
)
{
if
(
0
==
c_
strncmp
(
name
,
volstr
[
i
],
c_
strlen
(
volstr
[
i
]
)
))
{
if
(
0
==
strncmp
(
name
,
volstr
[
i
],
strlen
(
volstr
[
i
]
)
))
{
VolToPart
[
i
].
pd
=
num
;
}
}
}
if
(
vol
=
c_
malloc
(
sizeof
(
struct
myvfs_vol
)
))
{
if
(
vol
->
ldrname
=
c_
strdup
(
name
))
{
if
(
vol
=
malloc
(
sizeof
(
struct
myvfs_vol
)
))
{
if
(
vol
->
ldrname
=
strdup
(
name
))
{
if
(
FR_OK
==
(
last_result
=
f_mount
(
&
(
vol
->
fs
),
name
,
1
)))
{
vol
->
vfs_vol
.
fs_type
=
VFS_FS_FATFS
;
vol
->
vfs_vol
.
fns
=
&
myfatfs_vol_fns
;
...
...
@@ -362,29 +363,29 @@ static vfs_vol *myfatfs_mount( const char *name, int num )
}
if
(
vol
)
{
if
(
vol
->
ldrname
)
c_
free
(
vol
->
ldrname
);
c_
free
(
vol
);
if
(
vol
->
ldrname
)
free
(
vol
->
ldrname
);
free
(
vol
);
}
return
NULL
;
}
static
BYTE
myfatfs_mode2flag
(
const
char
*
mode
)
{
if
(
c_
strlen
(
mode
)
==
1
)
{
if
(
c_
strcmp
(
mode
,
"w"
)
==
0
)
if
(
strlen
(
mode
)
==
1
)
{
if
(
strcmp
(
mode
,
"w"
)
==
0
)
return
FA_WRITE
|
FA_CREATE_ALWAYS
;
else
if
(
c_
strcmp
(
mode
,
"r"
)
==
0
)
else
if
(
strcmp
(
mode
,
"r"
)
==
0
)
return
FA_READ
|
FA_OPEN_EXISTING
;
else
if
(
c_
strcmp
(
mode
,
"a"
)
==
0
)
else
if
(
strcmp
(
mode
,
"a"
)
==
0
)
return
FA_WRITE
|
FA_OPEN_ALWAYS
;
else
return
FA_READ
|
FA_OPEN_EXISTING
;
}
else
if
(
c_
strlen
(
mode
)
==
2
)
{
if
(
c_
strcmp
(
mode
,
"r+"
)
==
0
)
}
else
if
(
strlen
(
mode
)
==
2
)
{
if
(
strcmp
(
mode
,
"r+"
)
==
0
)
return
FA_READ
|
FA_WRITE
|
FA_OPEN_EXISTING
;
else
if
(
c_
strcmp
(
mode
,
"w+"
)
==
0
)
else
if
(
strcmp
(
mode
,
"w+"
)
==
0
)
return
FA_READ
|
FA_WRITE
|
FA_CREATE_ALWAYS
;
else
if
(
c_
strcmp
(
mode
,
"a+"
)
==
0
)
else
if
(
strcmp
(
mode
,
"a+"
)
==
0
)
return
FA_READ
|
FA_WRITE
|
FA_OPEN_ALWAYS
;
else
return
FA_READ
|
FA_OPEN_EXISTING
;
...
...
@@ -398,7 +399,7 @@ static vfs_file *myfatfs_open( const char *name, const char *mode )
struct
myvfs_file
*
fd
;
const
BYTE
flags
=
myfatfs_mode2flag
(
mode
);
if
(
fd
=
c_
malloc
(
sizeof
(
struct
myvfs_file
)
))
{
if
(
fd
=
malloc
(
sizeof
(
struct
myvfs_file
)
))
{
if
(
FR_OK
==
(
last_result
=
f_open
(
&
(
fd
->
fp
),
name
,
flags
)))
{
// skip to end of file for append mode
if
(
flags
&
FA_OPEN_ALWAYS
)
...
...
@@ -408,7 +409,7 @@ static vfs_file *myfatfs_open( const char *name, const char *mode )
fd
->
vfs_file
.
fns
=
&
myfatfs_file_fns
;
return
(
vfs_file
*
)
fd
;
}
else
{
c_
free
(
fd
);
free
(
fd
);
}
}
...
...
@@ -419,20 +420,20 @@ static vfs_dir *myfatfs_opendir( const char *name )
{
struct
myvfs_dir
*
dd
;
if
(
dd
=
c_
malloc
(
sizeof
(
struct
myvfs_dir
)
))
{
if
(
dd
=
malloc
(
sizeof
(
struct
myvfs_dir
)
))
{
if
(
FR_OK
==
(
last_result
=
f_opendir
(
&
(
dd
->
dp
),
name
)))
{
dd
->
vfs_dir
.
fs_type
=
VFS_FS_FATFS
;
dd
->
vfs_dir
.
fns
=
&
myfatfs_dir_fns
;
return
(
vfs_dir
*
)
dd
;
}
else
{
c_
free
(
dd
);
free
(
dd
);
}
}
return
NULL
;
}
static
s
int32_t
myfatfs_stat
(
const
char
*
name
,
struct
vfs_stat
*
buf
)
static
int32_t
myfatfs_stat
(
const
char
*
name
,
struct
vfs_stat
*
buf
)
{
FILINFO
fno
;
...
...
@@ -445,28 +446,28 @@ static sint32_t myfatfs_stat( const char *name, struct vfs_stat *buf )
}
}
static
s
int32_t
myfatfs_remove
(
const
char
*
name
)
static
int32_t
myfatfs_remove
(
const
char
*
name
)
{
last_result
=
f_unlink
(
name
);
return
last_result
==
FR_OK
?
VFS_RES_OK
:
VFS_RES_ERR
;
}
static
s
int32_t
myfatfs_rename
(
const
char
*
oldname
,
const
char
*
newname
)
static
int32_t
myfatfs_rename
(
const
char
*
oldname
,
const
char
*
newname
)
{
last_result
=
f_rename
(
oldname
,
newname
);
return
last_result
==
FR_OK
?
VFS_RES_OK
:
VFS_RES_ERR
;
}
static
s
int32_t
myfatfs_mkdir
(
const
char
*
name
)
static
int32_t
myfatfs_mkdir
(
const
char
*
name
)
{
last_result
=
f_mkdir
(
name
);
return
last_result
==
FR_OK
?
VFS_RES_OK
:
VFS_RES_ERR
;
}
static
s
int32_t
myfatfs_fsinfo
(
uint32_t
*
total
,
uint32_t
*
used
)
static
int32_t
myfatfs_fsinfo
(
uint32_t
*
total
,
uint32_t
*
used
)
{
DWORD
free_clusters
;
FATFS
*
fatfs
;
...
...
@@ -480,21 +481,21 @@ static sint32_t myfatfs_fsinfo( uint32_t *total, uint32_t *used )
return
last_result
==
FR_OK
?
VFS_RES_OK
:
VFS_RES_ERR
;
}
static
s
int32_t
myfatfs_chdrive
(
const
char
*
name
)
static
int32_t
myfatfs_chdrive
(
const
char
*
name
)
{
last_result
=
f_chdrive
(
name
);
return
last_result
==
FR_OK
?
VFS_RES_OK
:
VFS_RES_ERR
;
}
static
s
int32_t
myfatfs_chdir
(
const
char
*
name
)
static
int32_t
myfatfs_chdir
(
const
char
*
name
)
{
last_result
=
f_chdir
(
name
);
return
last_result
==
FR_OK
?
VFS_RES_OK
:
VFS_RES_ERR
;
}
static
s
int32_t
myfatfs_errno
(
void
)
static
int32_t
myfatfs_errno
(
void
)
{
return
-
last_result
;
}
...
...
@@ -515,10 +516,10 @@ vfs_fs_fns *myfatfs_realm( const char *inname, char **outname, int set_current_d
// logical drive is specified, check if it's one of ours
for
(
int
i
=
0
;
i
<
FF_VOLUMES
;
i
++
)
{
size_t
volstr_len
=
c_
strlen
(
volstr
[
i
]
);
if
(
0
==
c_
strncmp
(
&
(
inname
[
1
]),
volstr
[
i
],
volstr_len
))
{
oname
=
c_
strdup
(
inname
);
c_
strcpy
(
oname
,
volstr
[
i
]
);
size_t
volstr_len
=
strlen
(
volstr
[
i
]
);
if
(
0
==
strncmp
(
&
(
inname
[
1
]),
volstr
[
i
],
volstr_len
))
{
oname
=
strdup
(
inname
);
strcpy
(
oname
,
volstr
[
i
]
);
oname
[
volstr_len
]
=
':'
;
*
outname
=
oname
;
...
...
@@ -529,11 +530,11 @@ vfs_fs_fns *myfatfs_realm( const char *inname, char **outname, int set_current_d
}
else
{
// no logical drive in patchspec, are we current drive?
if
(
is_current_drive
)
{
*
outname
=
c_
strdup
(
inname
);
*
outname
=
strdup
(
inname
);
return
&
myfatfs_fs_fns
;
}
}
if
(
set_current_drive
)
is_current_drive
=
FALSE
;
if
(
set_current_drive
)
is_current_drive
=
false
;
return
NULL
;
}
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