UCG_C11(0x004,0x000),/* REDUCE_CURRENT: normal operation, no current reduction */
UCG_C11(0x003,0x030),/* CLK_DIV: 90Hz, ratio 1 */
UCG_C11(0x008,0x000),/* Precharge time red */
UCG_C11(0x009,0x000),/* Precharge time green */
UCG_C11(0x00a,0x000),/* Precharge time blue */
UCG_C11(0x00b,0x000),/* Precharge current red */
UCG_C11(0x00c,0x000),/* Precharge current green */
UCG_C11(0x00d,0x000),/* Precharge current blue */
UCG_C11(0x010,0x04a),/* Driving current red */
UCG_C11(0x011,0x025),/* Driving current green, original value 0x011 replaced by 0x025 */
UCG_C11(0x012,0x02f),/* Driving current blue */
UCG_C11(0x013,0x000),/* Display mode: RGB,column=0..127,column data display control=Normal Dispaly */
UCG_C11(0x014,0x001),/* External interface: 18 bit, MPU, Bit size does not matter if MPU is selected*/
//UCG_C11(0x016, 0x076), /* Memory Mode: 6bits triple transfer (would require 6bit words on SPI, 262K support, horizontal inc., vertical inc., data continuously written horizontally */
UCG_C11(0x016,0x066),/* Memory Mode: dual transfer (2x 8Bit), 65K support, horizontal inc., vertical inc., data continuously written horizontally */
UCG_C11(0x004,0x000),/* REDUCE_CURRENT: normal operation, no current reduction */
UCG_C11(0x003,0x030),/* CLK_DIV: 90Hz, ratio 1 */
UCG_C11(0x005,0x000),/* Software Reset */
UCG_C11(0x008,0x003),/* Precharge time red */
UCG_C11(0x009,0x004),/* Precharge time green */
UCG_C11(0x00a,0x005),/* Precharge time blue */
UCG_C11(0x00b,0x00b),/* Precharge current red */
UCG_C11(0x00c,0x00b),/* Precharge current green */
UCG_C11(0x00d,0x00e),/* Precharge current blue */
UCG_C11(0x010,0x03e),/* Driving current red */
UCG_C11(0x011,0x032),/* Driving current green, original value 0x011 replaced by 0x025 */
UCG_C11(0x012,0x03d),/* Driving current blue */
UCG_C11(0x013,0x000),/* Display mode: RGB,column=0..127,column data display control=Normal Dispaly */
UCG_C11(0x014,0x001),/* External interface: 18 bit, MPU, Bit size does not matter if MPU is selected*/
//UCG_C11(0x016, 0x076), /* Memory Mode: 6bits triple transfer (would require 6bit words on SPI, 262K support, horizontal inc., vertical inc., data continuously written horizontally */
UCG_C11(0x015,0x000),
UCG_C11(0x016,0x066),/* Memory Mode: dual transfer (2x 8Bit), 65K support, horizontal inc., vertical inc., data continuously written horizontally */
UCG_C12(0x002,0x007,0x000),/* LCD Driving Wave Control, bit 9: Set line inversion */
//UCG_C12(0x003, 0x010, 0x030), /* Entry Mode, GRAM write direction and BGR (Bit 12)=1 (16 bit transfer, 65K Mode)*/
UCG_C12(0x003,0xc0|0x010,0x030),/* Entry Mode, GRAM write direction and BGR (Bit 12)=1, set TRI (Bit 15) and DFM (Bit 14) --> three byte transfer */
//UCG_C12(0x004, 0x000, 0x000), /* Resize register, all 0: no resize */
UCG_C12(0x008,0x002,0x007),/* Display Control 2: set the back porch and front porch */
//UCG_C12(0x009, 0x000, 0x000), /* Display Control 3: normal scan */
//UCG_C12(0x00a, 0x000, 0x000), /* Display Control 4: set to "no FMARK output" */
UCG_C12(0x00c,0x000,0x000),/* RGB Display Interface Control 1, RIM=10 (3x6 Bit), 12 Jan 14: RIM=00 */
//UCG_C12(0x00d, 0x000, 0x000), /* Frame Maker Position */
//UCG_C12(0x00f, 0x000, 0x000), /* RGB Display Interface Control 2 */
UCG_C12(0x010,0x000,0x000),/* Power Control 1: SAP, BT[3:0], AP, DSTB, SLP, STB, actual setting is done below */
UCG_C12(0x011,0x000,0x007),/* Power Control 2: DC1[2:0], DC0[2:0], VC[2:0] */
UCG_C12(0x012,0x000,0x000),/* Power Control 3: VREG1OUT voltage */
UCG_C12(0x013,0x000,0x000),/* Power Control 4: VDV[4:0] for VCOM amplitude */
//UCG_C12(0x007, 0x000, 0x001), /* Display Control 1: Operate, but do not display */
UCG_C12(0x007,0x001,0x033),/* Display Control 1: Operate, display ON, Partial image off */
UCG_DLY_MS(100),/* delay 100 ms *//* ITDB02 none D verion: 50ms */
UCG_C12(0x010,0x010,0x090),/* Power Control 1: SAP, BT[3:0], AP, DSTB, SLP, STB */
/* 12. Jan 14. Prev value: 0x016, 0x090 */
/* ITDB02 none D verion: 0x010, 0x090 */
//UCG_C12( 0x010, 0x017, 0x0f0), /* Power Control 1: Setting for max quality & power consumption: SAP(Bit 12)=1, BT[3:0]=7 (max), APE (Bit 8)=1, AP=7 (max), disable sleep: SLP=0, STB=0 */
UCG_C12(0x011,0x002,0x027),/* Power Control 2 VCI ration, step up circuits 1 & 2 */
UCG_DLY_MS(50),/* delay 50 ms */
UCG_C12(0x012,0x000,0x01f),/* Power Control 3: VCI: External, VCI*1.80 */
/* 12. Jan 14. Prev value: 0x000, 0x00d */
UCG_DLY_MS(50),/* delay 50 ms */
UCG_C12(0x013,0x015,0x000),/* Power Control 4: VDV[4:0] for VCOM amplitude */
/* 12. Jan 14. Prev value: 0x012, 0x009 */
UCG_C12(0x029,0x000,0x027),/* Power Control 7 */
/* 12. Jan 14. Prev value: 0x000, 0x00a */
UCG_C12(0x02b,0x000,0x00d),/* Frame Rate: 93 */
//UCG_C12( 0x02b, 0x000, 0x00b), /* Frame Rate: 70, too less, some flicker visible */
UCG_DLY_MS(50),/* delay 50 ms */
/* Gamma Control, values from iteadstudio.com reference software on google code */
/*
UCG_C12(0x30,0x00,0x00),
UCG_C12(0x31,0x07,0x07),
UCG_C12(0x32,0x03,0x07),
UCG_C12(0x35,0x02,0x00),
UCG_C12(0x36,0x00,0x08),
UCG_C12(0x37,0x00,0x04),
UCG_C12(0x38,0x00,0x00),
UCG_C12(0x39,0x07,0x07),
UCG_C12(0x3C,0x00,0x02),
UCG_C12(0x3D,0x1D,0x04),
*/
UCG_C12(0x020,0x000,0x000),/* Horizontal GRAM Address Set */
UCG_C12(0x021,0x000,0x000),/* Vertical GRAM Address Set */
UCG_C22(0x000,0x002,0x007,0x000),/* LCD Driving Wave Control, bit 9: Set line inversion */
//UCG_C22(0x000, 0x003, 0x010, 0x030), /* Entry Mode, GRAM write direction and BGR (Bit 12)=1 (16 bit transfer, 65K Mode)*/
UCG_C22(0x000,0x003,0xc0|0x010,0x030),/* Entry Mode, GRAM write direction and BGR (Bit 12)=1, set TRI (Bit 15) and DFM (Bit 14) --> three byte transfer */
//UCG_C22(0x000, 0x004, 0x000, 0x000), /* Resize register, all 0: no resize */
UCG_C22(0x000,0x008,0x002,0x007),/* Display Control 2: set the back porch and front porch */
//UCG_C22(0x000, 0x009, 0x000, 0x000), /* Display Control 3: normal scan */
//UCG_C22(0x000, 0x00a, 0x000, 0x000), /* Display Control 4: set to "no FMARK output" */
UCG_C22(0x000,0x00c,0x000,0x000),/* RGB Display Interface Control 1, RIM=10 (3x6 Bit), 12 Jan 14: RIM=00 */
//UCG_C22(0x000, 0x00d, 0x000, 0x000), /* Frame Maker Position */
UCG_C22(0x000,0x010,0x000,0x000),/* Power Control 1: SAP, BT[3:0], AP, DSTB, SLP, STB, actual setting is done below */
UCG_C22(0x000,0x011,0x000,0x007),/* Power Control 2: DC1[2:0], DC0[2:0], VC[2:0] */
UCG_C22(0x000,0x012,0x000,0x000),/* Power Control 3: VREG1OUT voltage */
UCG_C22(0x000,0x013,0x000,0x000),/* Power Control 4: VDV[4:0] for VCOM amplitude */
UCG_C22(0x000,0x007,0x000,0x001),/* Display Control 1: Operate, but do not display */
UCG_DLY_MS(100),/* delay 100 ms *//* ITDB02 none D verion: 50ms */
UCG_C22(0x000,0x010,0x010,0x090),/* Power Control 1: SAP, BT[3:0], AP, DSTB, SLP, STB */
/* 12. Jan 14. Prev value: 0x016, 0x090 */
/* ITDB02 none D verion: 0x010, 0x090 */
//UCG_C22( 0x000, 0x010, 0x017, 0x0f0), /* Power Control 1: Setting for max quality & power consumption: SAP(Bit 12)=1, BT[3:0]=7 (max), APE (Bit 8)=1, AP=7 (max), disable sleep: SLP=0, STB=0 */
UCG_C22(0x000,0x011,0x002,0x027),/* Power Control 2 VCI ration, step up circuits 1 & 2 */
UCG_DLY_MS(50),/* delay 50 ms */
UCG_C22(0x000,0x012,0x000,0x01f),/* Power Control 3: VCI: External, VCI*1.80 */
/* 12. Jan 14. Prev value: 0x000, 0x00d */
UCG_DLY_MS(50),/* delay 50 ms */
UCG_C22(0x000,0x013,0x015,0x000),/* Power Control 4: VDV[4:0] for VCOM amplitude */
/* 12. Jan 14. Prev value: 0x012, 0x009 */
UCG_C22(0x000,0x029,0x000,0x027),/* Power Control 7 */