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ruanhaishen
Nodemcu Firmware
Commits
a33e3a4a
Commit
a33e3a4a
authored
Oct 17, 2015
by
Vowstar
Browse files
Merge pull request #687 from DiUS/dev140
Major upgrade to SDK 1.4.0 & open LWIP
parents
093a8959
8fba0f47
Changes
282
Show whitespace changes
Inline
Side-by-side
sdk/esp_iot_sdk_v1.4.0/examples/driver_lib/include/driver/gpio16.h
0 → 100644
View file @
a33e3a4a
#ifndef __GPIO16_H__
#define __GPIO16_H__
void
gpio16_output_conf
(
void
);
void
gpio16_output_set
(
uint8
value
);
void
gpio16_input_conf
(
void
);
uint8
gpio16_input_get
(
void
);
#endif
sdk/esp_iot_sdk_v1.4.0/examples/driver_lib/include/driver/i2c_master.h
0 → 100644
View file @
a33e3a4a
#ifndef __I2C_MASTER_H__
#define __I2C_MASTER_H__
#define I2C_MASTER_SDA_MUX PERIPHS_IO_MUX_GPIO2_U
#define I2C_MASTER_SCL_MUX PERIPHS_IO_MUX_MTMS_U
#define I2C_MASTER_SDA_GPIO 2
#define I2C_MASTER_SCL_GPIO 14
#define I2C_MASTER_SDA_FUNC FUNC_GPIO2
#define I2C_MASTER_SCL_FUNC FUNC_GPIO14
//#define I2C_MASTER_SDA_MUX PERIPHS_IO_MUX_GPIO2_U
//#define I2C_MASTER_SCL_MUX PERIPHS_IO_MUX_GPIO0_U
//#define I2C_MASTER_SDA_GPIO 2
//#define I2C_MASTER_SCL_GPIO 0
//#define I2C_MASTER_SDA_FUNC FUNC_GPIO2
//#define I2C_MASTER_SCL_FUNC FUNC_GPIO0
#if 0
#define I2C_MASTER_GPIO_SET(pin) \
gpio_output_set(1<<pin,0,1<<pin,0)
#define I2C_MASTER_GPIO_CLR(pin) \
gpio_output_set(0,1<<pin,1<<pin,0)
#define I2C_MASTER_GPIO_OUT(pin,val) \
if(val) I2C_MASTER_GPIO_SET(pin);\
else I2C_MASTER_GPIO_CLR(pin)
#endif
#define I2C_MASTER_SDA_HIGH_SCL_HIGH() \
gpio_output_set
(
1
<<
I2C_MASTER_SDA_GPIO
|
1
<<
I2C_MASTER_SCL_GPIO
,
0
,
1
<<
I2C_MASTER_SDA_GPIO
|
1
<<
I2C_MASTER_SCL_GPIO
,
0
)
#define I2C_MASTER_SDA_HIGH_SCL_LOW() \
gpio_output_set
(
1
<<
I2C_MASTER_SDA_GPIO
,
1
<<
I2C_MASTER_SCL_GPIO
,
1
<<
I2C_MASTER_SDA_GPIO
|
1
<<
I2C_MASTER_SCL_GPIO
,
0
)
#define I2C_MASTER_SDA_LOW_SCL_HIGH() \
gpio_output_set
(
1
<<
I2C_MASTER_SCL_GPIO
,
1
<<
I2C_MASTER_SDA_GPIO
,
1
<<
I2C_MASTER_SDA_GPIO
|
1
<<
I2C_MASTER_SCL_GPIO
,
0
)
#define I2C_MASTER_SDA_LOW_SCL_LOW() \
gpio_output_set
(
0
,
1
<<
I2C_MASTER_SDA_GPIO
|
1
<<
I2C_MASTER_SCL_GPIO
,
1
<<
I2C_MASTER_SDA_GPIO
|
1
<<
I2C_MASTER_SCL_GPIO
,
0
)
void
i2c_master_gpio_init
(
void
);
void
i2c_master_init
(
void
);
#define i2c_master_wait os_delay_us
void
i2c_master_stop
(
void
);
void
i2c_master_start
(
void
);
void
i2c_master_setAck
(
uint8
level
);
uint8
i2c_master_getAck
(
void
);
uint8
i2c_master_readByte
(
void
);
void
i2c_master_writeByte
(
uint8
wrdata
);
bool
i2c_master_checkAck
(
void
);
void
i2c_master_send_ack
(
void
);
void
i2c_master_send_nack
(
void
);
#endif
sdk/esp_iot_sdk_v1.4.0/examples/driver_lib/include/driver/key.h
0 → 100644
View file @
a33e3a4a
#ifndef __KEY_H__
#define __KEY_H__
#include "gpio.h"
typedef
void
(
*
key_function
)(
void
);
struct
single_key_param
{
uint8
key_level
;
uint8
gpio_id
;
uint8
gpio_func
;
uint32
gpio_name
;
os_timer_t
key_5s
;
os_timer_t
key_50ms
;
key_function
short_press
;
key_function
long_press
;
};
struct
keys_param
{
uint8
key_num
;
struct
single_key_param
**
single_key
;
};
struct
single_key_param
*
key_init_single
(
uint8
gpio_id
,
uint32
gpio_name
,
uint8
gpio_func
,
key_function
long_press
,
key_function
short_press
);
void
key_init
(
struct
keys_param
*
key
);
#endif
sdk/esp_iot_sdk_v1.4.0/examples/driver_lib/include/driver/spi.h
0 → 100644
View file @
a33e3a4a
#ifndef SPI_APP_H
#define SPI_APP_H
#include "spi_register.h"
#include "ets_sys.h"
#include "osapi.h"
#include "uart.h"
#include "os_type.h"
#include "spi_flash.h"
#define SPI_FLASH_BYTES_LEN 24
#define IODATA_START_ADDR BIT0
#define SPI_BUFF_BYTE_NUM 32
/*SPI number define*/
#define SPI 0
#define HSPI 1
void
cache_flush
(
void
);
//spi master init funtion
void
spi_master_init
(
uint8
spi_no
);
//lcd drive function
void
spi_lcd_9bit_write
(
uint8
spi_no
,
uint8
high_bit
,
uint8
low_8bit
);
//use spi send 8bit data
void
spi_mast_byte_write
(
uint8
spi_no
,
uint8
data
);
//transmit data to esp8266 slave buffer,which needs 16bit transmission ,
//first byte is master command 0x04, second byte is master data
void
spi_byte_write_espslave
(
uint8
spi_no
,
uint8
data
);
//read data from esp8266 slave buffer,which needs 16bit transmission ,
//first byte is master command 0x06, second byte is to read slave data
void
spi_byte_read_espslave
(
uint8
spi_no
,
uint8
*
data
);
//esp8266 slave mode initial
void
spi_slave_init
(
uint8
spi_no
,
uint8
data_len
);
//esp8266 slave isr handle funtion,tiggered when any transmission is finished.
//the function is registered in spi_slave_init.
void
spi_slave_isr_handler
(
void
*
para
);
//hspi test function, used to test esp8266 spi slave
void
hspi_master_readwrite_repeat
(
void
);
void
spi_test_init
(
void
);
#endif
sdk/esp_iot_sdk_v1.4.0/examples/driver_lib/include/driver/spi_overlap.h
0 → 100644
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a33e3a4a
#ifndef SPI_OVERLAP_APP_H
#define SPI_OVERLAP_APP_H
#include "ets_sys.h"
#include "spi_flash.h"
#define HSPI_OVERLAP
//#define NO_HSPI_DEVICE
#define HOST_INF_SEL 0x3ff00028
#define FUNC_SPI_CS2 1
#define FUNC_SPI_CS1 1
#define reg_cspi_overlap (BIT7)
#define SPI_FLASH_BYTES_LEN 24
#define IODATA_START_ADDR BIT0
#define SPI_BUFF_BYTE_NUM 32
#define PERIPHS_IO_MUX_BACKUP 0
#define SPI_USER_BACKUP 1
#define SPI_CTRL_BACKUP 2
#define SPI_CLOCK_BACKUP 3
#define SPI_USER1_BACKUP 4
#define SPI_USER2_BACKUP 5
#define SPI_CMD_BACKUP 6
#define SPI_PIN_BACKUP 7
#define SPI_SLAVE_BACKUP 8
#define HSPI_CS_DEV 0
#define SPI_CS1_DEV 1
#define SPI_CS2_DEV 2
#define SPI_CS0_FLASH 3
#define HSPI_IDLE 4
struct
hspi_device_config
{
uint8
active
:
1
;
uint8
clk_polar
:
1
;
uint8
res
:
1
;
uint8
clk_div
:
5
;
};
struct
hspi_device_register
{
uint32
hspi_flash_reg_backup
[
9
];
uint32
hspi_dev_reg_backup
[
9
];
struct
hspi_device_config
hspi_dev_conf
[
4
];
uint8
selected_dev_num
:
3
;
uint8
spi_io_80m
:
1
;
uint8
hspi_reg_backup_flag
:
1
;
uint8
res
:
3
;
};
void
hspi_overlap_init
(
void
);
void
hspi_overlap_deinit
(
void
);
void
spi_reg_recover
(
uint8
spi_no
,
uint32
*
backup_mem
);
void
spi_reg_backup
(
uint8
spi_no
,
uint32
*
backup_mem
);
void
hspi_master_dev_init
(
uint8
dev_no
,
uint8
clk_polar
,
uint8
clk_div
);
void
hspi_dev_sel
(
uint8
dev_no
);
void
hspi_overlap_flash_init
(
void
);
SpiFlashOpResult
hspi_overlap_read_flash_data
(
SpiFlashChip
*
spi
,
uint32
flash_addr
,
uint32
*
addr_dest
,
uint32
byte_length
);
#endif
sdk/esp_iot_sdk_v1.4.0/examples/driver_lib/include/driver/spi_register.h
0 → 100644
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a33e3a4a
/*
* Copyright (c) 2010 - 2011 Espressif System
*
*/
#ifndef SPI_REGISTER_H_INCLUDED
#define SPI_REGISTER_H_INCLUDED
#define REG_SPI_BASE(i) (0x60000200-i*0x100)
#define SPI_CMD(i) (REG_SPI_BASE(i) + 0x0)
#define SPI_FLASH_READ BIT31
#define SPI_FLASH_WREN BIT30
#define SPI_FLASH_WRDI BIT29
#define SPI_FLASH_RDID BIT28
#define SPI_FLASH_RDSR BIT27
#define SPI_FLASH_WRSR BIT26
#define SPI_FLASH_PP BIT25
#define SPI_FLASH_SE BIT24
#define SPI_FLASH_BE BIT23
#define SPI_FLASH_CE BIT22
#define SPI_FLASH_RES BIT20
#define SPI_USR (BIT(18))
#define SPI_ADDR(i) (REG_SPI_BASE(i) + 0x4)
#define SPI_CTRL(i) (REG_SPI_BASE(i) + 0x8)
#define SPI_WR_BIT_ORDER (BIT(26))
#define SPI_RD_BIT_ORDER (BIT(25))
#define SPI_QIO_MODE (BIT(24))
#define SPI_DIO_MODE (BIT(23))
#define SPI_QOUT_MODE (BIT(20))
#define SPI_DOUT_MODE (BIT(14))
#define SPI_FASTRD_MODE (BIT(13))
#define SPI_CTRL1(i) (REG_SPI_BASE(i) + 0xc)
#define SPI_CS_HOLD_DELAY 0xf
#define SPI_CS_HOLD_DELAY_S 28
#define SPI_CS_HOLD_DELAY_RES 0xfff
#define SPI_CS_HOLD_DELAY_RES_S 16
#define SPI_RD_STATUS(i) (REG_SPI_BASE(i) + 0x10)
#define SPI_CTRL2(i) (REG_SPI_BASE(i) + 0x14)
#define SPI_CS_DELAY_NUM 0x0000000F
#define SPI_CS_DELAY_NUM_S 28
#define SPI_CS_DELAY_MODE 0x00000003
#define SPI_CS_DELAY_MODE_S 26
#define SPI_MOSI_DELAY_NUM 0x00000007
#define SPI_MOSI_DELAY_NUM_S 23
#define SPI_MOSI_DELAY_MODE 0x00000003
#define SPI_MOSI_DELAY_MODE_S 21
#define SPI_MISO_DELAY_NUM 0x00000007
#define SPI_MISO_DELAY_NUM_S 18
#define SPI_MISO_DELAY_MODE 0x00000003
#define SPI_MISO_DELAY_MODE_S 16
#define SPI_CLOCK(i) (REG_SPI_BASE(i) + 0x18)
#define SPI_CLK_EQU_SYSCLK (BIT(31))
#define SPI_CLKDIV_PRE 0x00001FFF
#define SPI_CLKDIV_PRE_S 18
#define SPI_CLKCNT_N 0x0000003F
#define SPI_CLKCNT_N_S 12
#define SPI_CLKCNT_H 0x0000003F
#define SPI_CLKCNT_H_S 6
#define SPI_CLKCNT_L 0x0000003F
#define SPI_CLKCNT_L_S 0
#define SPI_USER(i) (REG_SPI_BASE(i) + 0x1C)
#define SPI_USR_COMMAND (BIT(31))
#define SPI_USR_ADDR (BIT(30))
#define SPI_USR_DUMMY (BIT(29))
#define SPI_USR_MISO (BIT(28))
#define SPI_USR_MOSI (BIT(27))
#define SPI_USR_MOSI_HIGHPART (BIT(25))
#define SPI_USR_MISO_HIGHPART (BIT(24))
#define SPI_SIO (BIT(16))
#define SPI_FWRITE_QIO (BIT(15))
#define SPI_FWRITE_DIO (BIT(14))
#define SPI_FWRITE_QUAD (BIT(13))
#define SPI_FWRITE_DUAL (BIT(12))
#define SPI_WR_BYTE_ORDER (BIT(11))
#define SPI_RD_BYTE_ORDER (BIT(10))
#define SPI_CK_OUT_EDGE (BIT(7))
#define SPI_CK_I_EDGE (BIT(6))
#define SPI_CS_SETUP (BIT(5))
#define SPI_CS_HOLD (BIT(4))
#define SPI_FLASH_MODE (BIT(2))
#define SPI_USER1(i) (REG_SPI_BASE(i) + 0x20)
#define SPI_USR_ADDR_BITLEN 0x0000003F
#define SPI_USR_ADDR_BITLEN_S 26
#define SPI_USR_MOSI_BITLEN 0x000001FF
#define SPI_USR_MOSI_BITLEN_S 17
#define SPI_USR_MISO_BITLEN 0x000001FF
#define SPI_USR_MISO_BITLEN_S 8
#define SPI_USR_DUMMY_CYCLELEN 0x000000FF
#define SPI_USR_DUMMY_CYCLELEN_S 0
#define SPI_USER2(i) (REG_SPI_BASE(i) + 0x24)
#define SPI_USR_COMMAND_BITLEN 0x0000000F
#define SPI_USR_COMMAND_BITLEN_S 28
#define SPI_USR_COMMAND_VALUE 0x0000FFFF
#define SPI_USR_COMMAND_VALUE_S 0
#define SPI_WR_STATUS(i) (REG_SPI_BASE(i) + 0x28)
#define SPI_PIN(i) (REG_SPI_BASE(i) + 0x2C)
#define SPI_CS2_DIS (BIT(2))
#define SPI_CS1_DIS (BIT(1))
#define SPI_CS0_DIS (BIT(0))
#define SPI_SLAVE(i) (REG_SPI_BASE(i) + 0x30)
#define SPI_SYNC_RESET (BIT(31))
#define SPI_SLAVE_MODE (BIT(30))
#define SPI_SLV_WR_RD_BUF_EN (BIT(29))
#define SPI_SLV_WR_RD_STA_EN (BIT(28))
#define SPI_SLV_CMD_DEFINE (BIT(27))
#define SPI_TRANS_CNT 0x0000000F
#define SPI_TRANS_CNT_S 23
#define SPI_TRANS_DONE_EN (BIT(9))
#define SPI_SLV_WR_STA_DONE_EN (BIT(8))
#define SPI_SLV_RD_STA_DONE_EN (BIT(7))
#define SPI_SLV_WR_BUF_DONE_EN (BIT(6))
#define SPI_SLV_RD_BUF_DONE_EN (BIT(5))
#define SLV_SPI_INT_EN 0x0000001f
#define SLV_SPI_INT_EN_S 5
#define SPI_TRANS_DONE (BIT(4))
#define SPI_SLV_WR_STA_DONE (BIT(3))
#define SPI_SLV_RD_STA_DONE (BIT(2))
#define SPI_SLV_WR_BUF_DONE (BIT(1))
#define SPI_SLV_RD_BUF_DONE (BIT(0))
#define SPI_SLAVE1(i) (REG_SPI_BASE(i) + 0x34)
#define SPI_SLV_STATUS_BITLEN 0x0000001F
#define SPI_SLV_STATUS_BITLEN_S 27
#define SPI_SLV_BUF_BITLEN 0x000001FF
#define SPI_SLV_BUF_BITLEN_S 16
#define SPI_SLV_RD_ADDR_BITLEN 0x0000003F
#define SPI_SLV_RD_ADDR_BITLEN_S 10
#define SPI_SLV_WR_ADDR_BITLEN 0x0000003F
#define SPI_SLV_WR_ADDR_BITLEN_S 4
#define SPI_SLV_WRSTA_DUMMY_EN (BIT(3))
#define SPI_SLV_RDSTA_DUMMY_EN (BIT(2))
#define SPI_SLV_WRBUF_DUMMY_EN (BIT(1))
#define SPI_SLV_RDBUF_DUMMY_EN (BIT(0))
#define SPI_SLAVE2(i) (REG_SPI_BASE(i) + 0x38)
#define SPI_SLV_WRBUF_DUMMY_CYCLELEN 0X000000FF
#define SPI_SLV_WRBUF_DUMMY_CYCLELEN_S 24
#define SPI_SLV_RDBUF_DUMMY_CYCLELEN 0X000000FF
#define SPI_SLV_RDBUF_DUMMY_CYCLELEN_S 16
#define SPI_SLV_WRSTR_DUMMY_CYCLELEN 0X000000FF
#define SPI_SLV_WRSTR_DUMMY_CYCLELEN_S 8
#define SPI_SLV_RDSTR_DUMMY_CYCLELEN 0x000000FF
#define SPI_SLV_RDSTR_DUMMY_CYCLELEN_S 0
#define SPI_SLAVE3(i) (REG_SPI_BASE(i) + 0x3C)
#define SPI_SLV_WRSTA_CMD_VALUE 0x000000FF
#define SPI_SLV_WRSTA_CMD_VALUE_S 24
#define SPI_SLV_RDSTA_CMD_VALUE 0x000000FF
#define SPI_SLV_RDSTA_CMD_VALUE_S 16
#define SPI_SLV_WRBUF_CMD_VALUE 0x000000FF
#define SPI_SLV_WRBUF_CMD_VALUE_S 8
#define SPI_SLV_RDBUF_CMD_VALUE 0x000000FF
#define SPI_SLV_RDBUF_CMD_VALUE_S 0
#define SPI_W0(i) (REG_SPI_BASE(i) +0x40)
#define SPI_W1(i) (REG_SPI_BASE(i) +0x44)
#define SPI_W2(i) (REG_SPI_BASE(i) +0x48)
#define SPI_W3(i) (REG_SPI_BASE(i) +0x4C)
#define SPI_W4(i) (REG_SPI_BASE(i) +0x50)
#define SPI_W5(i) (REG_SPI_BASE(i) +0x54)
#define SPI_W6(i) (REG_SPI_BASE(i) +0x58)
#define SPI_W7(i) (REG_SPI_BASE(i) +0x5C)
#define SPI_W8(i) (REG_SPI_BASE(i) +0x60)
#define SPI_W9(i) (REG_SPI_BASE(i) +0x64)
#define SPI_W10(i) (REG_SPI_BASE(i) +0x68)
#define SPI_W11(i) (REG_SPI_BASE(i) +0x6C)
#define SPI_W12(i) (REG_SPI_BASE(i) +0x70)
#define SPI_W13(i) (REG_SPI_BASE(i) +0x74)
#define SPI_W14(i) (REG_SPI_BASE(i) +0x78)
#define SPI_W15(i) (REG_SPI_BASE(i) +0x7C)
#define SPI_EXT2(i) (REG_SPI_BASE(i) + 0xF8)
#define SPI_EXT3(i) (REG_SPI_BASE(i) + 0xFC)
#define SPI_INT_HOLD_ENA 0x00000003
#define SPI_INT_HOLD_ENA_S 0
#endif // SPI_REGISTER_H_INCLUDED
sdk/esp_iot_sdk_v1.4.0/examples/driver_lib/include/driver/uart.h
0 → 100644
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a33e3a4a
/*
* File : uart.h
* Copyright (C) 2013 - 2016, Espressif Systems
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of version 3 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef UART_APP_H
#define UART_APP_H
#include "uart_register.h"
#include "eagle_soc.h"
#include "c_types.h"
#define UART_TX_BUFFER_SIZE 256 //Ring buffer length of tx buffer
#define UART_RX_BUFFER_SIZE 256 //Ring buffer length of rx buffer
#define UART_BUFF_EN 0 //use uart buffer , FOR UART0
#define UART_SELFTEST 0 //set 1:enable the loop test demo for uart buffer, FOR UART0
#define UART_HW_RTS 0 //set 1: enable uart hw flow control RTS, PIN MTDO, FOR UART0
#define UART_HW_CTS 0 //set1: enable uart hw flow contrl CTS , PIN MTCK, FOR UART0
#define UART0 0
#define UART1 1
typedef
enum
{
FIVE_BITS
=
0x0
,
SIX_BITS
=
0x1
,
SEVEN_BITS
=
0x2
,
EIGHT_BITS
=
0x3
}
UartBitsNum4Char
;
typedef
enum
{
ONE_STOP_BIT
=
0x1
,
ONE_HALF_STOP_BIT
=
0x2
,
TWO_STOP_BIT
=
0x3
}
UartStopBitsNum
;
typedef
enum
{
NONE_BITS
=
0x2
,
ODD_BITS
=
1
,
EVEN_BITS
=
0
}
UartParityMode
;
typedef
enum
{
STICK_PARITY_DIS
=
0
,
STICK_PARITY_EN
=
1
}
UartExistParity
;
typedef
enum
{
UART_None_Inverse
=
0x0
,
UART_Rxd_Inverse
=
UART_RXD_INV
,
UART_CTS_Inverse
=
UART_CTS_INV
,
UART_Txd_Inverse
=
UART_TXD_INV
,
UART_RTS_Inverse
=
UART_RTS_INV
,
}
UART_LineLevelInverse
;
typedef
enum
{
BIT_RATE_300
=
300
,
BIT_RATE_600
=
600
,
BIT_RATE_1200
=
1200
,
BIT_RATE_2400
=
2400
,
BIT_RATE_4800
=
4800
,
BIT_RATE_9600
=
9600
,
BIT_RATE_19200
=
19200
,
BIT_RATE_38400
=
38400
,
BIT_RATE_57600
=
57600
,
BIT_RATE_74880
=
74880
,
BIT_RATE_115200
=
115200
,
BIT_RATE_230400
=
230400
,
BIT_RATE_460800
=
460800
,
BIT_RATE_921600
=
921600
,
BIT_RATE_1843200
=
1843200
,
BIT_RATE_3686400
=
3686400
,
}
UartBautRate
;
typedef
enum
{
NONE_CTRL
,
HARDWARE_CTRL
,
XON_XOFF_CTRL
}
UartFlowCtrl
;
typedef
enum
{
USART_HardwareFlowControl_None
=
0x0
,
USART_HardwareFlowControl_RTS
=
0x1
,
USART_HardwareFlowControl_CTS
=
0x2
,
USART_HardwareFlowControl_CTS_RTS
=
0x3
}
UART_HwFlowCtrl
;
typedef
enum
{
EMPTY
,
UNDER_WRITE
,
WRITE_OVER
}
RcvMsgBuffState
;
typedef
struct
{
uint32
RcvBuffSize
;
uint8
*
pRcvMsgBuff
;
uint8
*
pWritePos
;
uint8
*
pReadPos
;
uint8
TrigLvl
;
//JLU: may need to pad
RcvMsgBuffState
BuffState
;
}
RcvMsgBuff
;
typedef
struct
{
uint32
TrxBuffSize
;
uint8
*
pTrxBuff
;
}
TrxMsgBuff
;
typedef
enum
{
BAUD_RATE_DET
,
WAIT_SYNC_FRM
,
SRCH_MSG_HEAD
,
RCV_MSG_BODY
,
RCV_ESC_CHAR
,
}
RcvMsgState
;
typedef
struct
{
UartBautRate
baut_rate
;
UartBitsNum4Char
data_bits
;
UartExistParity
exist_parity
;
UartParityMode
parity
;
UartStopBitsNum
stop_bits
;
UartFlowCtrl
flow_ctrl
;
RcvMsgBuff
rcv_buff
;
TrxMsgBuff
trx_buff
;
RcvMsgState
rcv_state
;
int
received
;
int
buff_uart_no
;
//indicate which uart use tx/rx buffer
}
UartDevice
;
void
uart_init
(
UartBautRate
uart0_br
,
UartBautRate
uart1_br
);
void
uart0_sendStr
(
const
char
*
str
);
///////////////////////////////////////
#define UART_FIFO_LEN 128 //define the tx fifo length
#define UART_TX_EMPTY_THRESH_VAL 0x10
struct
UartBuffer
{
uint32
UartBuffSize
;
uint8
*
pUartBuff
;
uint8
*
pInPos
;
uint8
*
pOutPos
;
STATUS
BuffState
;
uint16
Space
;
//remanent space of the buffer
uint8
TcpControl
;
struct
UartBuffer
*
nextBuff
;
};
struct
UartRxBuff
{
uint32
UartRxBuffSize
;
uint8
*
pUartRxBuff
;
uint8
*
pWritePos
;
uint8
*
pReadPos
;
STATUS
RxBuffState
;
uint32
Space
;
//remanent space of the buffer
}
;
typedef
enum
{
RUN
=
0
,
BLOCK
=
1
,
}
TCPState
;
//void ICACHE_FLASH_ATTR uart_test_rx();
STATUS
uart_tx_one_char
(
uint8
uart
,
uint8
TxChar
);
STATUS
uart_tx_one_char_no_wait
(
uint8
uart
,
uint8
TxChar
);
void
uart1_sendStr_no_wait
(
const
char
*
str
);
struct
UartBuffer
*
Uart_Buf_Init
();
#if UART_BUFF_EN
LOCAL
void
Uart_Buf_Cpy
(
struct
UartBuffer
*
pCur
,
char
*
pdata
,
uint16
data_len
);
void
uart_buf_free
(
struct
UartBuffer
*
pBuff
);
void
tx_buff_enq
(
char
*
pdata
,
uint16
data_len
);
LOCAL
void
tx_fifo_insert
(
struct
UartBuffer
*
pTxBuff
,
uint8
data_len
,
uint8
uart_no
);
void
tx_start_uart_buffer
(
uint8
uart_no
);
uint16
rx_buff_deq
(
char
*
pdata
,
uint16
data_len
);
void
Uart_rx_buff_enq
();
#endif
void
uart_rx_intr_enable
(
uint8
uart_no
);
void
uart_rx_intr_disable
(
uint8
uart_no
);
void
uart0_tx_buffer
(
uint8
*
buf
,
uint16
len
);
//==============================================
#define FUNC_UART0_CTS 4
#define FUNC_U0CTS 4
#define FUNC_U1TXD_BK 2
#define UART_LINE_INV_MASK (0x3f<<19)
void
UART_SetWordLength
(
uint8
uart_no
,
UartBitsNum4Char
len
);
void
UART_SetStopBits
(
uint8
uart_no
,
UartStopBitsNum
bit_num
);
void
UART_SetLineInverse
(
uint8
uart_no
,
UART_LineLevelInverse
inverse_mask
);
void
UART_SetParity
(
uint8
uart_no
,
UartParityMode
Parity_mode
);
void
UART_SetBaudrate
(
uint8
uart_no
,
uint32
baud_rate
);
void
UART_SetFlowCtrl
(
uint8
uart_no
,
UART_HwFlowCtrl
flow_ctrl
,
uint8
rx_thresh
);
void
UART_WaitTxFifoEmpty
(
uint8
uart_no
,
uint32
time_out_us
);
//do not use if tx flow control enabled
void
UART_ResetFifo
(
uint8
uart_no
);
void
UART_ClearIntrStatus
(
uint8
uart_no
,
uint32
clr_mask
);
void
UART_SetIntrEna
(
uint8
uart_no
,
uint32
ena_mask
);
void
UART_SetPrintPort
(
uint8
uart_no
);
bool
UART_CheckOutputFinished
(
uint8
uart_no
,
uint32
time_out_us
);
//==============================================
#endif
sdk/esp_iot_sdk_v1.4.0/examples/driver_lib/include/driver/uart_register.h
0 → 100644
View file @
a33e3a4a
/*
* File : uart_register.h
* Copyright (C) 2013 - 2016, Espressif Systems
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of version 3 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* Copyright (c) 2010 - 2011 Espressif System
*
*/
#ifndef UART_REGISTER_H_
#define UART_REGISTER_H_
#define REG_UART_BASE(i) (0x60000000 + (i)*0xf00)
//version value:32'h062000
#define UART_FIFO(i) (REG_UART_BASE(i) + 0x0)
#define UART_RXFIFO_RD_BYTE 0x000000FF
#define UART_RXFIFO_RD_BYTE_S 0
#define UART_INT_RAW(i) (REG_UART_BASE(i) + 0x4)
#define UART_RXFIFO_TOUT_INT_RAW (BIT(8))
#define UART_BRK_DET_INT_RAW (BIT(7))
#define UART_CTS_CHG_INT_RAW (BIT(6))
#define UART_DSR_CHG_INT_RAW (BIT(5))
#define UART_RXFIFO_OVF_INT_RAW (BIT(4))
#define UART_FRM_ERR_INT_RAW (BIT(3))
#define UART_PARITY_ERR_INT_RAW (BIT(2))
#define UART_TXFIFO_EMPTY_INT_RAW (BIT(1))
#define UART_RXFIFO_FULL_INT_RAW (BIT(0))
#define UART_INT_ST(i) (REG_UART_BASE(i) + 0x8)
#define UART_RXFIFO_TOUT_INT_ST (BIT(8))
#define UART_BRK_DET_INT_ST (BIT(7))
#define UART_CTS_CHG_INT_ST (BIT(6))
#define UART_DSR_CHG_INT_ST (BIT(5))
#define UART_RXFIFO_OVF_INT_ST (BIT(4))
#define UART_FRM_ERR_INT_ST (BIT(3))
#define UART_PARITY_ERR_INT_ST (BIT(2))
#define UART_TXFIFO_EMPTY_INT_ST (BIT(1))
#define UART_RXFIFO_FULL_INT_ST (BIT(0))
#define UART_INT_ENA(i) (REG_UART_BASE(i) + 0xC)
#define UART_RXFIFO_TOUT_INT_ENA (BIT(8))
#define UART_BRK_DET_INT_ENA (BIT(7))
#define UART_CTS_CHG_INT_ENA (BIT(6))
#define UART_DSR_CHG_INT_ENA (BIT(5))
#define UART_RXFIFO_OVF_INT_ENA (BIT(4))
#define UART_FRM_ERR_INT_ENA (BIT(3))
#define UART_PARITY_ERR_INT_ENA (BIT(2))
#define UART_TXFIFO_EMPTY_INT_ENA (BIT(1))
#define UART_RXFIFO_FULL_INT_ENA (BIT(0))
#define UART_INT_CLR(i) (REG_UART_BASE(i) + 0x10)
#define UART_RXFIFO_TOUT_INT_CLR (BIT(8))
#define UART_BRK_DET_INT_CLR (BIT(7))
#define UART_CTS_CHG_INT_CLR (BIT(6))
#define UART_DSR_CHG_INT_CLR (BIT(5))
#define UART_RXFIFO_OVF_INT_CLR (BIT(4))
#define UART_FRM_ERR_INT_CLR (BIT(3))
#define UART_PARITY_ERR_INT_CLR (BIT(2))
#define UART_TXFIFO_EMPTY_INT_CLR (BIT(1))
#define UART_RXFIFO_FULL_INT_CLR (BIT(0))
#define UART_CLKDIV(i) (REG_UART_BASE(i) + 0x14)
#define UART_CLKDIV_CNT 0x000FFFFF
#define UART_CLKDIV_S 0
#define UART_AUTOBAUD(i) (REG_UART_BASE(i) + 0x18)
#define UART_GLITCH_FILT 0x000000FF
#define UART_GLITCH_FILT_S 8
#define UART_AUTOBAUD_EN (BIT(0))
#define UART_STATUS(i) (REG_UART_BASE(i) + 0x1C)
#define UART_TXD (BIT(31))
#define UART_RTSN (BIT(30))
#define UART_DTRN (BIT(29))
#define UART_TXFIFO_CNT 0x000000FF
#define UART_TXFIFO_CNT_S 16
#define UART_RXD (BIT(15))
#define UART_CTSN (BIT(14))
#define UART_DSRN (BIT(13))
#define UART_RXFIFO_CNT 0x000000FF
#define UART_RXFIFO_CNT_S 0
#define UART_CONF0(i) (REG_UART_BASE(i) + 0x20)
#define UART_DTR_INV (BIT(24))
#define UART_RTS_INV (BIT(23))
#define UART_TXD_INV (BIT(22))
#define UART_DSR_INV (BIT(21))
#define UART_CTS_INV (BIT(20))
#define UART_RXD_INV (BIT(19))
#define UART_TXFIFO_RST (BIT(18))
#define UART_RXFIFO_RST (BIT(17))
#define UART_IRDA_EN (BIT(16))
#define UART_TX_FLOW_EN (BIT(15))
#define UART_LOOPBACK (BIT(14))
#define UART_IRDA_RX_INV (BIT(13))
#define UART_IRDA_TX_INV (BIT(12))
#define UART_IRDA_WCTL (BIT(11))
#define UART_IRDA_TX_EN (BIT(10))
#define UART_IRDA_DPLX (BIT(9))
#define UART_TXD_BRK (BIT(8))
#define UART_SW_DTR (BIT(7))
#define UART_SW_RTS (BIT(6))
#define UART_STOP_BIT_NUM 0x00000003
#define UART_STOP_BIT_NUM_S 4
#define UART_BIT_NUM 0x00000003
#define UART_BIT_NUM_S 2
#define UART_PARITY_EN (BIT(1))
#define UART_PARITY_EN_M 0x00000001
#define UART_PARITY_EN_S 1
#define UART_PARITY (BIT(0))
#define UART_PARITY_M 0x00000001
#define UART_PARITY_S 0
#define UART_CONF1(i) (REG_UART_BASE(i) + 0x24)
#define UART_RX_TOUT_EN (BIT(31))
#define UART_RX_TOUT_THRHD 0x0000007F
#define UART_RX_TOUT_THRHD_S 24
#define UART_RX_FLOW_EN (BIT(23))
#define UART_RX_FLOW_THRHD 0x0000007F
#define UART_RX_FLOW_THRHD_S 16
#define UART_TXFIFO_EMPTY_THRHD 0x0000007F
#define UART_TXFIFO_EMPTY_THRHD_S 8
#define UART_RXFIFO_FULL_THRHD 0x0000007F
#define UART_RXFIFO_FULL_THRHD_S 0
#define UART_LOWPULSE(i) (REG_UART_BASE(i) + 0x28)
#define UART_LOWPULSE_MIN_CNT 0x000FFFFF
#define UART_LOWPULSE_MIN_CNT_S 0
#define UART_HIGHPULSE(i) (REG_UART_BASE(i) + 0x2C)
#define UART_HIGHPULSE_MIN_CNT 0x000FFFFF
#define UART_HIGHPULSE_MIN_CNT_S 0
#define UART_PULSE_NUM(i) (REG_UART_BASE(i) + 0x30)
#define UART_PULSE_NUM_CNT 0x0003FF
#define UART_PULSE_NUM_CNT_S 0
#define UART_DATE(i) (REG_UART_BASE(i) + 0x78)
#define UART_ID(i) (REG_UART_BASE(i) + 0x7C)
#endif // UART_REGISTER_H_INCLUDED
sdk/esp_iot_sdk_v1.4.0/examples/driver_lib/readme.txt
0 → 100644
View file @
a33e3a4a
STEP 1: Copy driver and include folders to your project sub-folder, such as app folder. Unused drivers can be removed in your project.
STEP 2: Modify Makefile in app folder.
1). Search SUBDIRS, add driver as subdir:
SUBDIRS= \
user \
driver
2). Search COMPONENTS_eagle.app.v6, add libdriver.a:
COMPONENTS_eagle.app.v6 = \
user/libuser.a \
driver/libdriver.a
\ No newline at end of file
sdk/esp_iot_sdk_v1.4.0/examples/readme.txt
0 → 100644
View file @
a33e3a4a
1compile options
(1) COMPILE
Possible value: gcc
Default value:
If not set, use xt-xcc by default.
(2) BOOT
Possible value: none/old/new
none: no need boot
old: use boot_v1.1
new: use boot_v1.2+
Default value: none
(3) APP
Possible value: 0/1/2
0: original mode, generate eagle.app.v6.flash.bin and eagle.app.v6.irom0text.bin
1: generate user1
2: generate user2
Default value: 0
(3) SPI_SPEED
Possible value: 20/26.7/40/80
Default value: 40
(4) SPI_MODE
Possible value: QIO/QOUT/DIO/DOUT
Default value: QIO
(4) SPI_SIZE_MAP
Possible value: 0/2/3/4/5/6
Default value: 0
For example:
make COMPILE=gcc BOOT=new APP=1 SPI_SPEED=40 SPI_MODE=QIO SPI_SIZE_MAP=0
2You can also use gen_misc to make and generate specific bin you needed.
Linux: ./gen_misc.sh
Windows: gen_misc.bat
Follow the tips and steps.
\ No newline at end of file
sdk/esp_iot_sdk_v1.4.0/examples/smart_config/Makefile
0 → 100644
View file @
a33e3a4a
#############################################################
# Required variables for each makefile
# Discard this section from all parent makefiles
# Expected variables (with automatic defaults):
# CSRCS (all "C" files in the dir)
# SUBDIRS (all subdirs with a Makefile)
# GEN_LIBS - list of libs to be generated ()
# GEN_IMAGES - list of object file images to be generated ()
# GEN_BINS - list of binaries to be generated ()
# COMPONENTS_xxx - a list of libs/objs in the form
# subdir/lib to be extracted and rolled up into
# a generated lib/image xxx.a ()
#
TARGET
=
eagle
#FLAVOR = release
FLAVOR
=
debug
#EXTRA_CCFLAGS += -u
ifndef
PDIR
# {
GEN_IMAGES
=
eagle.app.v6.out
GEN_BINS
=
eagle.app.v6.bin
SPECIAL_MKTARGETS
=
$(APP_MKTARGETS)
SUBDIRS
=
\
user
endif
# } PDIR
APPDIR
=
.
LDDIR
=
../ld
CCFLAGS
+=
-Os
TARGET_LDFLAGS
=
\
-nostdlib
\
-Wl,-EL
\
--longcalls
\
--text-section-literals
ifeq
($(FLAVOR),debug)
TARGET_LDFLAGS
+=
-g
-O2
endif
ifeq
($(FLAVOR),release)
TARGET_LDFLAGS
+=
-g
-O0
endif
COMPONENTS_eagle.app.v6
=
\
user/libuser.a
LINKFLAGS_eagle.app.v6
=
\
-L../lib
\
-nostdlib
\
-T$(LD_FILE)
\
-Wl,--no-check-sections
\
-u
call_user_start
\
-Wl,-static
\
-Wl,--start-group
\
-lc
\
-lgcc
\
-lhal
\
-lphy
\
-lpp
\
-lnet80211
\
-llwip
\
-lwpa
\
-lmain
\
-ljson
\
-lssl
\
-lupgrade
\
-lsmartconfig
\
$(DEP_LIBS_eagle.app.v6)
\
-Wl,--end-group
DEPENDS_eagle.app.v6
=
\
$(LD_FILE)
\
$(LDDIR)/eagle.rom.addr.v6.ld
#############################################################
# Configuration i.e. compile options etc.
# Target specific stuff (defines etc.) goes in here!
# Generally values applying to a tree are captured in the
# makefile at its root level - these are then overridden
# for a subtree within the makefile rooted therein
#
#UNIVERSAL_TARGET_DEFINES = \
# Other potential configuration flags include:
# -DTXRX_TXBUF_DEBUG
# -DTXRX_RXBUF_DEBUG
# -DWLAN_CONFIG_CCX
CONFIGURATION_DEFINES
=
-DICACHE_FLASH
DEFINES
+=
\
$(UNIVERSAL_TARGET_DEFINES)
\
$(CONFIGURATION_DEFINES)
DDEFINES
+=
\
$(UNIVERSAL_TARGET_DEFINES)
\
$(CONFIGURATION_DEFINES)
#############################################################
# Recursion Magic - Don't touch this!!
#
# Each subtree potentially has an include directory
# corresponding to the common APIs applicable to modules
# rooted at that subtree. Accordingly, the INCLUDE PATH
# of a module can only contain the include directories up
# its parent path, and not its siblings
#
# Required for each makefile to inherit from the parent
#
INCLUDES
:=
$(INCLUDES)
-I
$(PDIR)
include
PDIR
:=
../
$(PDIR)
sinclude
$(PDIR)Makefile
.PHONY
:
FORCE
FORCE
:
sdk/esp_iot_sdk_v1.4.0/examples/smart_config/gen_misc.bat
0 → 100644
View file @
a33e3a4a
@echo
off
echo
gen_misc
.bat
version
20150511
echo
.
echo
Please
follow
below
steps
(
1
-
5
)
to
generate
specific
bin
(
s
)
:
echo
STEP
1
:
choose
boot
version
(
0
=
boot_v1
.1
,
1
=
boot_v1
.2
+,
2
=
none
)
set
input
=
default
set
/p
input
=
enter
(
0
/1/2
,
default
2
)
:
if
%input%
equ
0
(
set
boot
=
old
)
else
(
if
%input%
equ
1
(
set
boot
=
new
)
else
(
set
boot
=
none
)
)
echo
boot
mode
:
%boot%
echo
.
echo
STEP
2
:
choose
bin
generate
(
0
=
eagle
.flash.bin
+eagle
.irom0text.bin
,
1
=
user1
.bin
,
2
=
user2
.bin
)
set
input
=
default
set
/p
input
=
enter
(
0
/1/2
,
default
0
)
:
if
%input%
equ
1
(
if
%boot%
equ
none
(
set
app
=
0
echo
choose
no
boot
before
echo
generate
bin
:
eagle
.flash.bin
+eagle
.irom0text.bin
)
else
(
set
app
=
1
echo
generate
bin
:
user1
.bin
)
)
else
(
if
%input%
equ
2
(
if
%boot%
equ
none
(
set
app
=
0
echo
choose
no
boot
before
echo
generate
bin
:
eagle
.flash.bin
+eagle
.irom0text.bin
)
else
(
set
app
=
2
echo
generate
bin
:
user2
.bin
)
)
else
(
if
%boot%
neq
none
(
set
boot
=
none
echo
ignore
boot
)
set
app
=
0
echo
generate
bin
:
eagle
.flash.bin
+eagle
.irom0text.bin
))
echo
.
echo
STEP
3
:
choose
spi
speed
(
0
=
20
MHz
,
1
=
26
.7MHz
,
2
=
40
MHz
,
3
=
80
MHz
)
set
input
=
default
set
/p
input
=
enter
(
0
/1/2/3
,
default
2
)
:
if
%input%
equ
0
(
set
spi_speed
=
20
)
else
(
if
%input%
equ
1
(
set
spi_speed
=
26
.7
)
else
(
if
%input%
equ
3
(
set
spi_speed
=
80
)
else
(
set
spi_speed
=
40
)))
echo
spi
speed
:
%spi_speed%
MHz
echo
.
echo
STEP
4
:
choose
spi
mode
(
0
=
QIO
,
1
=
QOUT
,
2
=
DIO
,
3
=
DOUT
)
set
input
=
default
set
/p
input
=
enter
(
0
/1/2/3
,
default
0
)
:
if
%input%
equ
1
(
set
spi_mode
=
QOUT
)
else
(
if
%input%
equ
2
(
set
spi_mode
=
DIO
)
else
(
if
%input%
equ
3
(
set
spi_mode
=
DOUT
)
else
(
set
spi_mode
=
QIO
)))
echo
spi
mode
:
%spi_mode%
echo
.
echo
STEP
5
:
choose
flash
size
and
map
echo
0
=
512
KB
(
256
KB
+
256
KB
)
echo
2
=
1024
KB
(
512
KB
+
512
KB
)
echo
3
=
2048
KB
(
512
KB
+
512
KB
)
echo
4
=
4096
KB
(
512
KB
+
512
KB
)
echo
5
=
2048
KB
(
1024
KB
+
1024
KB
)
echo
6
=
4096
KB
(
1024
KB
+
1024
KB
)
set
input
=
default
set
/p
input
=
enter
(
0
/1/2/3/4/5/6
,
default
0
)
:
if
%input%
equ
2
(
set
spi_size_map
=
2
echo
spi
size
:
1024
KB
echo
spi
ota
map
:
512
KB
+
512
KB
)
else
(
if
%input%
equ
3
(
set
spi_size_map
=
3
echo
spi
size
:
2048
KB
echo
spi
ota
map
:
512
KB
+
512
KB
)
else
(
if
%input%
equ
4
(
set
spi_size_map
=
4
echo
spi
size
:
4096
KB
echo
spi
ota
map
:
512
KB
+
512
KB
)
else
(
if
%input%
equ
5
(
set
spi_size_map
=
5
echo
spi
size
:
2048
KB
echo
spi
ota
map
:
1024
KB
+
1024
KB
)
else
(
if
%input%
equ
6
(
set
spi_size_map
=
6
echo
spi
size
:
4096
KB
echo
spi
ota
map
:
1024
KB
+
1024
KB
)
else
(
set
spi_size_map
=
0
echo
spi
size
:
512
KB
echo
spi
ota
map
:
256
KB
+
256
KB
)
)
)
)
)
touch
user
/user
_main.c
echo
.
echo
start
...
echo
.
make
BOOT
=
%boot%
APP
=
%app%
SPI_SPEED
=
%spi_speed%
SPI_MODE
=
%spi_mode%
SPI_SIZE
=
%spi_size_map%
sdk/esp_iot_sdk_v1.4.0/examples/smart_config/gen_misc.sh
0 → 100644
View file @
a33e3a4a
#!/bin/bash
echo
"gen_misc.sh version 20150511"
echo
""
echo
"Please follow below steps(1-5) to generate specific bin(s):"
echo
"STEP 1: choose boot version(0=boot_v1.1, 1=boot_v1.2+, 2=none)"
echo
"enter(0/1/2, default 2):"
read
input
if
[
-z
"
$input
"
]
;
then
boot
=
none
elif
[
$input
==
0
]
;
then
boot
=
old
elif
[
$input
==
1
]
;
then
boot
=
new
else
boot
=
none
fi
echo
"boot mode:
$boot
"
echo
""
echo
"STEP 2: choose bin generate(0=eagle.flash.bin+eagle.irom0text.bin, 1=user1.bin, 2=user2.bin)"
echo
"enter (0/1/2, default 0):"
read
input
if
[
-z
"
$input
"
]
;
then
if
[
$boot
!=
none
]
;
then
boot
=
none
echo
"ignore boot"
fi
app
=
0
echo
"generate bin: eagle.flash.bin+eagle.irom0text.bin"
elif
[
$input
==
1
]
;
then
if
[
$boot
==
none
]
;
then
app
=
0
echo
"choose no boot before"
echo
"generate bin: eagle.flash.bin+eagle.irom0text.bin"
else
app
=
1
echo
"generate bin: user1.bin"
fi
elif
[
$input
==
2
]
;
then
if
[
$boot
==
none
]
;
then
app
=
0
echo
"choose no boot before"
echo
"generate bin: eagle.flash.bin+eagle.irom0text.bin"
else
app
=
2
echo
"generate bin: user2.bin"
fi
else
if
[
$boot
!=
none
]
;
then
boot
=
none
echo
"ignore boot"
fi
app
=
0
echo
"generate bin: eagle.flash.bin+eagle.irom0text.bin"
fi
echo
""
echo
"STEP 3: choose spi speed(0=20MHz, 1=26.7MHz, 2=40MHz, 3=80MHz)"
echo
"enter (0/1/2/3, default 2):"
read
input
if
[
-z
"
$input
"
]
;
then
spi_speed
=
40
elif
[
$input
==
0
]
;
then
spi_speed
=
20
elif
[
$input
==
1
]
;
then
spi_speed
=
26.7
elif
[
$input
==
3
]
;
then
spi_speed
=
80
else
spi_speed
=
40
fi
echo
"spi speed:
$spi_speed
MHz"
echo
""
echo
"STEP 4: choose spi mode(0=QIO, 1=QOUT, 2=DIO, 3=DOUT)"
echo
"enter (0/1/2/3, default 0):"
read
input
if
[
-z
"
$input
"
]
;
then
spi_mode
=
QIO
elif
[
$input
==
1
]
;
then
spi_mode
=
QOUT
elif
[
$input
==
2
]
;
then
spi_mode
=
DIO
elif
[
$input
==
3
]
;
then
spi_mode
=
DOUT
else
spi_mode
=
QIO
fi
echo
"spi mode:
$spi_mode
"
echo
""
echo
"STEP 5: choose spi size and map"
echo
" 0= 512KB( 256KB+ 256KB)"
echo
" 2=1024KB( 512KB+ 512KB)"
echo
" 3=2048KB( 512KB+ 512KB)"
echo
" 4=4096KB( 512KB+ 512KB)"
echo
" 5=2048KB(1024KB+1024KB)"
echo
" 6=4096KB(1024KB+1024KB)"
echo
"enter (0/2/3/4/5/6, default 0):"
read
input
if
[
-z
"
$input
"
]
;
then
spi_size_map
=
0
echo
"spi size: 512KB"
echo
"spi ota map: 256KB + 256KB"
elif
[
$input
==
2
]
;
then
spi_size_map
=
2
echo
"spi size: 1024KB"
echo
"spi ota map: 512KB + 512KB"
elif
[
$input
==
3
]
;
then
spi_size_map
=
3
echo
"spi size: 2048KB"
echo
"spi ota map: 512KB + 512KB"
elif
[
$input
==
4
]
;
then
spi_size_map
=
4
echo
"spi size: 4096KB"
echo
"spi ota map: 512KB + 512KB"
elif
[
$input
==
5
]
;
then
spi_size_map
=
5
echo
"spi size: 2048KB"
echo
"spi ota map: 1024KB + 1024KB"
elif
[
$input
==
6
]
;
then
spi_size_map
=
6
echo
"spi size: 4096KB"
echo
"spi ota map: 1024KB + 1024KB"
else
spi_size_map
=
0
echo
"spi size: 512KB"
echo
"spi ota map: 256KB + 256KB"
fi
echo
""
touch
user/user_main.c
echo
""
echo
"start..."
echo
""
make
COMPILE
=
gcc
BOOT
=
$boot
APP
=
$app
SPI_SPEED
=
$spi_speed
SPI_MODE
=
$spi_mode
SPI_SIZE_MAP
=
$spi_size_map
sdk/esp_iot_sdk_v1.4.0/examples/smart_config/include/user_config.h
0 → 100644
View file @
a33e3a4a
#ifndef __USER_CONFIG_H__
#define __USER_CONFIG_H__
#endif
sdk/esp_iot_sdk_v1.4.0/examples/smart_config/user/Makefile
0 → 100644
View file @
a33e3a4a
#############################################################
# Required variables for each makefile
# Discard this section from all parent makefiles
# Expected variables (with automatic defaults):
# CSRCS (all "C" files in the dir)
# SUBDIRS (all subdirs with a Makefile)
# GEN_LIBS - list of libs to be generated ()
# GEN_IMAGES - list of images to be generated ()
# COMPONENTS_xxx - a list of libs/objs in the form
# subdir/lib to be extracted and rolled up into
# a generated lib/image xxx.a ()
#
ifndef
PDIR
GEN_LIBS
=
libuser.a
endif
#############################################################
# Configuration i.e. compile options etc.
# Target specific stuff (defines etc.) goes in here!
# Generally values applying to a tree are captured in the
# makefile at its root level - these are then overridden
# for a subtree within the makefile rooted therein
#
#DEFINES +=
#############################################################
# Recursion Magic - Don't touch this!!
#
# Each subtree potentially has an include directory
# corresponding to the common APIs applicable to modules
# rooted at that subtree. Accordingly, the INCLUDE PATH
# of a module can only contain the include directories up
# its parent path, and not its siblings
#
# Required for each makefile to inherit from the parent
#
INCLUDES
:=
$(INCLUDES)
-I
$(PDIR)
include
INCLUDES
+=
-I
./
INCLUDES
+=
-I
../../include/ets
PDIR
:=
../
$(PDIR)
sinclude
$(PDIR)Makefile
sdk/esp_iot_sdk_v1.4.0/examples/smart_config/user/user_main.c
0 → 100644
View file @
a33e3a4a
/******************************************************************************
* Copyright 2013-2014 Espressif Systems (Wuxi)
*
* FileName: user_main.c
*
* Description: entry file of user application
*
* Modification history:
* 2014/1/1, v1.0 create this file.
*******************************************************************************/
#include "ets_sys.h"
#include "osapi.h"
#include "user_interface.h"
#include "smartconfig.h"
void
ICACHE_FLASH_ATTR
smartconfig_done
(
sc_status
status
,
void
*
pdata
)
{
switch
(
status
)
{
case
SC_STATUS_WAIT
:
os_printf
(
"SC_STATUS_WAIT
\n
"
);
break
;
case
SC_STATUS_FIND_CHANNEL
:
os_printf
(
"SC_STATUS_FIND_CHANNEL
\n
"
);
break
;
case
SC_STATUS_GETTING_SSID_PSWD
:
os_printf
(
"SC_STATUS_GETTING_SSID_PSWD
\n
"
);
sc_type
*
type
=
pdata
;
if
(
*
type
==
SC_TYPE_ESPTOUCH
)
{
os_printf
(
"SC_TYPE:SC_TYPE_ESPTOUCH
\n
"
);
}
else
{
os_printf
(
"SC_TYPE:SC_TYPE_AIRKISS
\n
"
);
}
break
;
case
SC_STATUS_LINK
:
os_printf
(
"SC_STATUS_LINK
\n
"
);
struct
station_config
*
sta_conf
=
pdata
;
wifi_station_set_config
(
sta_conf
);
wifi_station_disconnect
();
wifi_station_connect
();
break
;
case
SC_STATUS_LINK_OVER
:
os_printf
(
"SC_STATUS_LINK_OVER
\n
"
);
if
(
pdata
!=
NULL
)
{
uint8
phone_ip
[
4
]
=
{
0
};
os_memcpy
(
phone_ip
,
(
uint8
*
)
pdata
,
4
);
os_printf
(
"Phone ip: %d.%d.%d.%d
\n
"
,
phone_ip
[
0
],
phone_ip
[
1
],
phone_ip
[
2
],
phone_ip
[
3
]);
}
smartconfig_stop
();
break
;
}
}
void
user_rf_pre_init
(
void
)
{
}
void
user_init
(
void
)
{
os_printf
(
"SDK version:%s
\n
"
,
system_get_sdk_version
());
smartconfig_set_type
(
SC_TYPE_ESPTOUCH
);
//SC_TYPE_ESPTOUCH,SC_TYPE_AIRKISS,SC_TYPE_ESPTOUCH_AIRKISS
wifi_set_opmode
(
STATION_MODE
);
smartconfig_start
(
smartconfig_done
);
}
sdk/esp_iot_sdk_v1.4.0/examples/wps/Makefile
0 → 100644
View file @
a33e3a4a
#############################################################
# Required variables for each makefile
# Discard this section from all parent makefiles
# Expected variables (with automatic defaults):
# CSRCS (all "C" files in the dir)
# SUBDIRS (all subdirs with a Makefile)
# GEN_LIBS - list of libs to be generated ()
# GEN_IMAGES - list of object file images to be generated ()
# GEN_BINS - list of binaries to be generated ()
# COMPONENTS_xxx - a list of libs/objs in the form
# subdir/lib to be extracted and rolled up into
# a generated lib/image xxx.a ()
#
TARGET
=
eagle
#FLAVOR = release
FLAVOR
=
debug
#EXTRA_CCFLAGS += -u
ifndef
PDIR
# {
GEN_IMAGES
=
eagle.app.v6.out
GEN_BINS
=
eagle.app.v6.bin
SPECIAL_MKTARGETS
=
$(APP_MKTARGETS)
SUBDIRS
=
\
user
\
driver
endif
# } PDIR
APPDIR
=
.
LDDIR
=
../ld
CCFLAGS
+=
-Os
TARGET_LDFLAGS
=
\
-nostdlib
\
-Wl,-EL
\
--longcalls
\
--text-section-literals
ifeq
($(FLAVOR),debug)
TARGET_LDFLAGS
+=
-g
-O2
endif
ifeq
($(FLAVOR),release)
TARGET_LDFLAGS
+=
-g
-O0
endif
COMPONENTS_eagle.app.v6
=
\
user/libuser.a
\
driver/libdriver.a
LINKFLAGS_eagle.app.v6
=
\
-L../lib
\
-nostdlib
\
-T$(LD_FILE)
\
-Wl,--no-check-sections
\
-u
call_user_start
\
-Wl,-static
\
-Wl,--start-group
\
-lc
\
-lgcc
\
-lhal
\
-lphy
\
-lpp
\
-lnet80211
\
-llwip
\
-lwpa
\
-lmain
\
-lwps
\
-lcrypto
\
$(DEP_LIBS_eagle.app.v6)
\
-Wl,--end-group
DEPENDS_eagle.app.v6
=
\
$(LD_FILE)
\
$(LDDIR)/eagle.rom.addr.v6.ld
#############################################################
# Configuration i.e. compile options etc.
# Target specific stuff (defines etc.) goes in here!
# Generally values applying to a tree are captured in the
# makefile at its root level - these are then overridden
# for a subtree within the makefile rooted therein
#
#UNIVERSAL_TARGET_DEFINES = \
# Other potential configuration flags include:
# -DTXRX_TXBUF_DEBUG
# -DTXRX_RXBUF_DEBUG
# -DWLAN_CONFIG_CCX
CONFIGURATION_DEFINES
=
-DICACHE_FLASH
DEFINES
+=
\
$(UNIVERSAL_TARGET_DEFINES)
\
$(CONFIGURATION_DEFINES)
DDEFINES
+=
\
$(UNIVERSAL_TARGET_DEFINES)
\
$(CONFIGURATION_DEFINES)
#############################################################
# Recursion Magic - Don't touch this!!
#
# Each subtree potentially has an include directory
# corresponding to the common APIs applicable to modules
# rooted at that subtree. Accordingly, the INCLUDE PATH
# of a module can only contain the include directories up
# its parent path, and not its siblings
#
# Required for each makefile to inherit from the parent
#
INCLUDES
:=
$(INCLUDES)
-I
$(PDIR)
include
PDIR
:=
../
$(PDIR)
sinclude
$(PDIR)Makefile
.PHONY
:
FORCE
FORCE
:
sdk/esp_iot_sdk_v1.4.0/examples/wps/driver/Makefile
0 → 100644
View file @
a33e3a4a
#############################################################
# Required variables for each makefile
# Discard this section from all parent makefiles
# Expected variables (with automatic defaults):
# CSRCS (all "C" files in the dir)
# SUBDIRS (all subdirs with a Makefile)
# GEN_LIBS - list of libs to be generated ()
# GEN_IMAGES - list of images to be generated ()
# COMPONENTS_xxx - a list of libs/objs in the form
# subdir/lib to be extracted and rolled up into
# a generated lib/image xxx.a ()
#
ifndef
PDIR
GEN_LIBS
=
libdriver.a
endif
#############################################################
# Configuration i.e. compile options etc.
# Target specific stuff (defines etc.) goes in here!
# Generally values applying to a tree are captured in the
# makefile at its root level - these are then overridden
# for a subtree within the makefile rooted therein
#
#DEFINES +=
#############################################################
# Recursion Magic - Don't touch this!!
#
# Each subtree potentially has an include directory
# corresponding to the common APIs applicable to modules
# rooted at that subtree. Accordingly, the INCLUDE PATH
# of a module can only contain the include directories up
# its parent path, and not its siblings
#
# Required for each makefile to inherit from the parent
#
INCLUDES
:=
$(INCLUDES)
-I
$(PDIR)
include
INCLUDES
+=
-I
./
PDIR
:=
../
$(PDIR)
sinclude
$(PDIR)Makefile
sdk/esp_iot_sdk_v1.4.0/examples/wps/driver/key.c
0 → 100644
View file @
a33e3a4a
/******************************************************************************
* Copyright 2013-2014 Espressif Systems (Wuxi)
*
* FileName: key.c
*
* Description: key driver, now can use different gpio and install different function
*
* Modification history:
* 2014/5/1, v1.0 create this file.
*******************************************************************************/
#include "ets_sys.h"
#include "os_type.h"
#include "osapi.h"
#include "mem.h"
#include "gpio.h"
#include "user_interface.h"
#include "driver/key.h"
LOCAL
void
key_intr_handler
(
struct
keys_param
*
keys
);
/******************************************************************************
* FunctionName : key_init_single
* Description : init single key's gpio and register function
* Parameters : uint8 gpio_id - which gpio to use
* uint32 gpio_name - gpio mux name
* uint32 gpio_func - gpio function
* key_function long_press - long press function, needed to install
* key_function short_press - short press function, needed to install
* Returns : single_key_param - single key parameter, needed by key init
*******************************************************************************/
struct
single_key_param
*
ICACHE_FLASH_ATTR
key_init_single
(
uint8
gpio_id
,
uint32
gpio_name
,
uint8
gpio_func
,
key_function
long_press
,
key_function
short_press
)
{
struct
single_key_param
*
single_key
=
(
struct
single_key_param
*
)
os_zalloc
(
sizeof
(
struct
single_key_param
));
single_key
->
gpio_id
=
gpio_id
;
single_key
->
gpio_name
=
gpio_name
;
single_key
->
gpio_func
=
gpio_func
;
single_key
->
long_press
=
long_press
;
single_key
->
short_press
=
short_press
;
return
single_key
;
}
/******************************************************************************
* FunctionName : key_init
* Description : init keys
* Parameters : key_param *keys - keys parameter, which inited by key_init_single
* Returns : none
*******************************************************************************/
void
ICACHE_FLASH_ATTR
key_init
(
struct
keys_param
*
keys
)
{
uint8
i
;
ETS_GPIO_INTR_ATTACH
(
key_intr_handler
,
keys
);
ETS_GPIO_INTR_DISABLE
();
for
(
i
=
0
;
i
<
keys
->
key_num
;
i
++
)
{
keys
->
single_key
[
i
]
->
key_level
=
1
;
PIN_FUNC_SELECT
(
keys
->
single_key
[
i
]
->
gpio_name
,
keys
->
single_key
[
i
]
->
gpio_func
);
gpio_output_set
(
0
,
0
,
0
,
GPIO_ID_PIN
(
keys
->
single_key
[
i
]
->
gpio_id
));
gpio_register_set
(
GPIO_PIN_ADDR
(
keys
->
single_key
[
i
]
->
gpio_id
),
GPIO_PIN_INT_TYPE_SET
(
GPIO_PIN_INTR_DISABLE
)
|
GPIO_PIN_PAD_DRIVER_SET
(
GPIO_PAD_DRIVER_DISABLE
)
|
GPIO_PIN_SOURCE_SET
(
GPIO_AS_PIN_SOURCE
));
//clear gpio14 status
GPIO_REG_WRITE
(
GPIO_STATUS_W1TC_ADDRESS
,
BIT
(
keys
->
single_key
[
i
]
->
gpio_id
));
//enable interrupt
gpio_pin_intr_state_set
(
GPIO_ID_PIN
(
keys
->
single_key
[
i
]
->
gpio_id
),
GPIO_PIN_INTR_NEGEDGE
);
}
ETS_GPIO_INTR_ENABLE
();
}
/******************************************************************************
* FunctionName : key_5s_cb
* Description : long press 5s timer callback
* Parameters : single_key_param *single_key - single key parameter
* Returns : none
*******************************************************************************/
LOCAL
void
ICACHE_FLASH_ATTR
key_5s_cb
(
struct
single_key_param
*
single_key
)
{
os_timer_disarm
(
&
single_key
->
key_5s
);
// low, then restart
if
(
0
==
GPIO_INPUT_GET
(
GPIO_ID_PIN
(
single_key
->
gpio_id
)))
{
if
(
single_key
->
long_press
)
{
single_key
->
long_press
();
}
}
}
/******************************************************************************
* FunctionName : key_50ms_cb
* Description : 50ms timer callback to check it's a real key push
* Parameters : single_key_param *single_key - single key parameter
* Returns : none
*******************************************************************************/
LOCAL
void
ICACHE_FLASH_ATTR
key_50ms_cb
(
struct
single_key_param
*
single_key
)
{
os_timer_disarm
(
&
single_key
->
key_50ms
);
// high, then key is up
if
(
1
==
GPIO_INPUT_GET
(
GPIO_ID_PIN
(
single_key
->
gpio_id
)))
{
os_timer_disarm
(
&
single_key
->
key_5s
);
single_key
->
key_level
=
1
;
gpio_pin_intr_state_set
(
GPIO_ID_PIN
(
single_key
->
gpio_id
),
GPIO_PIN_INTR_NEGEDGE
);
if
(
single_key
->
short_press
)
{
single_key
->
short_press
();
}
}
else
{
gpio_pin_intr_state_set
(
GPIO_ID_PIN
(
single_key
->
gpio_id
),
GPIO_PIN_INTR_POSEDGE
);
}
}
/******************************************************************************
* FunctionName : key_intr_handler
* Description : key interrupt handler
* Parameters : key_param *keys - keys parameter, which inited by key_init_single
* Returns : none
*******************************************************************************/
LOCAL
void
key_intr_handler
(
struct
keys_param
*
keys
)
{
uint8
i
;
uint32
gpio_status
=
GPIO_REG_READ
(
GPIO_STATUS_ADDRESS
);
for
(
i
=
0
;
i
<
keys
->
key_num
;
i
++
)
{
if
(
gpio_status
&
BIT
(
keys
->
single_key
[
i
]
->
gpio_id
))
{
//disable interrupt
gpio_pin_intr_state_set
(
GPIO_ID_PIN
(
keys
->
single_key
[
i
]
->
gpio_id
),
GPIO_PIN_INTR_DISABLE
);
//clear interrupt status
GPIO_REG_WRITE
(
GPIO_STATUS_W1TC_ADDRESS
,
gpio_status
&
BIT
(
keys
->
single_key
[
i
]
->
gpio_id
));
if
(
keys
->
single_key
[
i
]
->
key_level
==
1
)
{
// 5s, restart & enter softap mode
os_timer_disarm
(
&
keys
->
single_key
[
i
]
->
key_5s
);
os_timer_setfn
(
&
keys
->
single_key
[
i
]
->
key_5s
,
(
os_timer_func_t
*
)
key_5s_cb
,
keys
->
single_key
[
i
]);
os_timer_arm
(
&
keys
->
single_key
[
i
]
->
key_5s
,
5000
,
0
);
keys
->
single_key
[
i
]
->
key_level
=
0
;
gpio_pin_intr_state_set
(
GPIO_ID_PIN
(
keys
->
single_key
[
i
]
->
gpio_id
),
GPIO_PIN_INTR_POSEDGE
);
}
else
{
// 50ms, check if this is a real key up
os_timer_disarm
(
&
keys
->
single_key
[
i
]
->
key_50ms
);
os_timer_setfn
(
&
keys
->
single_key
[
i
]
->
key_50ms
,
(
os_timer_func_t
*
)
key_50ms_cb
,
keys
->
single_key
[
i
]);
os_timer_arm
(
&
keys
->
single_key
[
i
]
->
key_50ms
,
50
,
0
);
}
}
}
}
sdk/esp_iot_sdk_v1.4.0/examples/wps/gen_misc.bat
0 → 100644
View file @
a33e3a4a
@echo
off
echo
gen_misc
.bat
version
20150511
echo
.
echo
Please
follow
below
steps
(
1
-
5
)
to
generate
specific
bin
(
s
)
:
echo
STEP
1
:
choose
boot
version
(
0
=
boot_v1
.1
,
1
=
boot_v1
.2
+,
2
=
none
)
set
input
=
default
set
/p
input
=
enter
(
0
/1/2
,
default
2
)
:
if
%input%
equ
0
(
set
boot
=
old
)
else
(
if
%input%
equ
1
(
set
boot
=
new
)
else
(
set
boot
=
none
)
)
echo
boot
mode
:
%boot%
echo
.
echo
STEP
2
:
choose
bin
generate
(
0
=
eagle
.flash.bin
+eagle
.irom0text.bin
,
1
=
user1
.bin
,
2
=
user2
.bin
)
set
input
=
default
set
/p
input
=
enter
(
0
/1/2
,
default
0
)
:
if
%input%
equ
1
(
if
%boot%
equ
none
(
set
app
=
0
echo
choose
no
boot
before
echo
generate
bin
:
eagle
.flash.bin
+eagle
.irom0text.bin
)
else
(
set
app
=
1
echo
generate
bin
:
user1
.bin
)
)
else
(
if
%input%
equ
2
(
if
%boot%
equ
none
(
set
app
=
0
echo
choose
no
boot
before
echo
generate
bin
:
eagle
.flash.bin
+eagle
.irom0text.bin
)
else
(
set
app
=
2
echo
generate
bin
:
user2
.bin
)
)
else
(
if
%boot%
neq
none
(
set
boot
=
none
echo
ignore
boot
)
set
app
=
0
echo
generate
bin
:
eagle
.flash.bin
+eagle
.irom0text.bin
))
echo
.
echo
STEP
3
:
choose
spi
speed
(
0
=
20
MHz
,
1
=
26
.7MHz
,
2
=
40
MHz
,
3
=
80
MHz
)
set
input
=
default
set
/p
input
=
enter
(
0
/1/2/3
,
default
2
)
:
if
%input%
equ
0
(
set
spi_speed
=
20
)
else
(
if
%input%
equ
1
(
set
spi_speed
=
26
.7
)
else
(
if
%input%
equ
3
(
set
spi_speed
=
80
)
else
(
set
spi_speed
=
40
)))
echo
spi
speed
:
%spi_speed%
MHz
echo
.
echo
STEP
4
:
choose
spi
mode
(
0
=
QIO
,
1
=
QOUT
,
2
=
DIO
,
3
=
DOUT
)
set
input
=
default
set
/p
input
=
enter
(
0
/1/2/3
,
default
0
)
:
if
%input%
equ
1
(
set
spi_mode
=
QOUT
)
else
(
if
%input%
equ
2
(
set
spi_mode
=
DIO
)
else
(
if
%input%
equ
3
(
set
spi_mode
=
DOUT
)
else
(
set
spi_mode
=
QIO
)))
echo
spi
mode
:
%spi_mode%
echo
.
echo
STEP
5
:
choose
flash
size
and
map
echo
0
=
512
KB
(
256
KB
+
256
KB
)
echo
2
=
1024
KB
(
512
KB
+
512
KB
)
echo
3
=
2048
KB
(
512
KB
+
512
KB
)
echo
4
=
4096
KB
(
512
KB
+
512
KB
)
echo
5
=
2048
KB
(
1024
KB
+
1024
KB
)
echo
6
=
4096
KB
(
1024
KB
+
1024
KB
)
set
input
=
default
set
/p
input
=
enter
(
0
/1/2/3/4/5/6
,
default
0
)
:
if
%input%
equ
2
(
set
spi_size_map
=
2
echo
spi
size
:
1024
KB
echo
spi
ota
map
:
512
KB
+
512
KB
)
else
(
if
%input%
equ
3
(
set
spi_size_map
=
3
echo
spi
size
:
2048
KB
echo
spi
ota
map
:
512
KB
+
512
KB
)
else
(
if
%input%
equ
4
(
set
spi_size_map
=
4
echo
spi
size
:
4096
KB
echo
spi
ota
map
:
512
KB
+
512
KB
)
else
(
if
%input%
equ
5
(
set
spi_size_map
=
5
echo
spi
size
:
2048
KB
echo
spi
ota
map
:
1024
KB
+
1024
KB
)
else
(
if
%input%
equ
6
(
set
spi_size_map
=
6
echo
spi
size
:
4096
KB
echo
spi
ota
map
:
1024
KB
+
1024
KB
)
else
(
set
spi_size_map
=
0
echo
spi
size
:
512
KB
echo
spi
ota
map
:
256
KB
+
256
KB
)
)
)
)
)
touch
user
/user
_main.c
echo
.
echo
start
...
echo
.
make
BOOT
=
%boot%
APP
=
%app%
SPI_SPEED
=
%spi_speed%
SPI_MODE
=
%spi_mode%
SPI_SIZE
=
%spi_size_map%
Prev
1
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