Skip to content
GitLab
Menu
Projects
Groups
Snippets
Loading...
Help
Help
Support
Community forum
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
Menu
Open sidebar
ruanhaishen
Nodemcu Firmware
Commits
a33e3a4a
Commit
a33e3a4a
authored
Oct 17, 2015
by
Vowstar
Browse files
Merge pull request #687 from DiUS/dev140
Major upgrade to SDK 1.4.0 & open LWIP
parents
093a8959
8fba0f47
Changes
282
Hide whitespace changes
Inline
Side-by-side
include/ping.h
→
sdk/esp_iot_sdk_v1.4.0/
include/ping.h
View file @
a33e3a4a
File moved
sdk/esp_iot_sdk_v1.4.0/include/pwm.h
0 → 100644
View file @
a33e3a4a
#ifndef __PWM_H__
#define __PWM_H__
/*pwm.h: function and macro definition of PWM API , driver level */
/*user_light.h: user interface for light API, user level*/
/*user_light_adj: API for color changing and lighting effects, user level*/
/*NOTE!! : DO NOT CHANGE THIS FILE*/
/*SUPPORT UP TO 8 PWM CHANNEL*/
#define PWM_CHANNEL_NUM_MAX 8
struct
pwm_param
{
uint32
period
;
uint32
freq
;
uint32
duty
[
PWM_CHANNEL_NUM_MAX
];
//PWM_CHANNEL<=8
};
/* pwm_init should be called only once, for now */
void
pwm_init
(
uint32
period
,
uint32
*
duty
,
uint32
pwm_channel_num
,
uint32
(
*
pin_info_list
)[
3
]);
void
pwm_start
(
void
);
void
pwm_set_duty
(
uint32
duty
,
uint8
channel
);
uint32
pwm_get_duty
(
uint8
channel
);
void
pwm_set_period
(
uint32
period
);
uint32
pwm_get_period
(
void
);
uint32
get_pwm_version
(
void
);
void
set_pwm_debug_en
(
uint8
print_en
);
#endif
include/queue.h
→
sdk/esp_iot_sdk_v1.4.0/
include/queue.h
View file @
a33e3a4a
File moved
include/smartconfig.h
→
sdk/esp_iot_sdk_v1.4.0/
include/smartconfig.h
View file @
a33e3a4a
...
@@ -6,23 +6,26 @@
...
@@ -6,23 +6,26 @@
#ifndef __SMARTCONFIG_H__
#ifndef __SMARTCONFIG_H__
#define __SMARTCONFIG_H__
#define __SMARTCONFIG_H__
typedef
void
(
*
sc_callback_t
)(
void
*
data
);
typedef
enum
{
SC_STATUS_WAIT
=
0
,
typedef
enum
{
SC_STATUS_FIND_CHANNEL
,
SC_STATUS_FIND_CHANNEL
=
0
,
SC_STATUS_GETTING_SSID_PSWD
,
SC_STATUS_GETTING_SSID_PSWD
,
SC_STATUS_GOT_SSID_PSWD
,
SC_STATUS_LINK
,
SC_STATUS_LINK
,
SC_STATUS_LINK_OVER
,
}
sc_status
;
}
sc_status
;
typedef
enum
{
typedef
enum
{
SC_TYPE_ESPTOUCH
=
0
,
SC_TYPE_ESPTOUCH
=
0
,
SC_TYPE_AIRKISS
,
SC_TYPE_AIRKISS
,
SC_TYPE_ESPTOUCH_AIRKISS
,
}
sc_type
;
}
sc_type
;
sc_status
smartconfig_get_status
(
void
);
typedef
void
(
*
sc_callback_t
)(
sc_status
status
,
void
*
pdata
);
const
char
*
smartconfig_get_version
(
void
);
const
char
*
smartconfig_get_version
(
void
);
bool
smartconfig_start
(
sc_type
type
,
sc_callback_t
cb
);
bool
smartconfig_start
(
sc_callback_t
cb
,
...
);
bool
smartconfig_stop
(
void
);
bool
smartconfig_stop
(
void
);
bool
esptouch_set_timeout
(
uint8
time_s
);
//15s~255s, offset:45s
bool
smartconfig_set_type
(
sc_type
type
);
#endif
#endif
sdk/esp_iot_sdk_v1.4.0/include/sntp.h
0 → 100644
View file @
a33e3a4a
#ifndef __SNTP_H__
#define __SNTP_H__
#include "os_type.h"
#ifdef LWIP_OPEN_SRC
#include "lwip/ip_addr.h"
#else
#include "ip_addr.h"
#endif
/**
* get the seconds since Jan 01, 1970, 00:00 (GMT + 8)
*/
uint32
sntp_get_current_timestamp
();
/**
* get real time (GTM + 8 time zone)
*/
char
*
sntp_get_real_time
(
long
t
);
/**
* SNTP get time_zone default GMT + 8
*/
sint8
sntp_get_timezone
(
void
);
/**
* SNTP set time_zone (default GMT + 8)
*/
bool
sntp_set_timezone
(
sint8
timezone
);
/**
* Initialize this module.
* Send out request instantly or after SNTP_STARTUP_DELAY(_FUNC).
*/
void
sntp_init
(
void
);
/**
* Stop this module.
*/
void
sntp_stop
(
void
);
/**
* Initialize one of the NTP servers by IP address
*
* @param numdns the index of the NTP server to set must be < SNTP_MAX_SERVERS
* @param dnsserver IP address of the NTP server to set
*/
void
sntp_setserver
(
unsigned
char
idx
,
ip_addr_t
*
addr
);
/**
* Obtain one of the currently configured by IP address (or DHCP) NTP servers
*
* @param numdns the index of the NTP server
* @return IP address of the indexed NTP server or "ip_addr_any" if the NTP
* server has not been configured by address (or at all).
*/
ip_addr_t
sntp_getserver
(
unsigned
char
idx
);
/**
* Initialize one of the NTP servers by name
*
* @param numdns the index of the NTP server to set must be < SNTP_MAX_SERVERS,now sdk support SNTP_MAX_SERVERS = 3
* @param dnsserver DNS name of the NTP server to set, to be resolved at contact time
*/
void
sntp_setservername
(
unsigned
char
idx
,
char
*
server
);
/**
* Obtain one of the currently configured by name NTP servers.
*
* @param numdns the index of the NTP server
* @return IP address of the indexed NTP server or NULL if the NTP
* server has not been configured by name (or at all)
*/
char
*
sntp_getservername
(
unsigned
char
idx
);
#define sntp_servermode_dhcp(x)
#endif
include/spi_flash.h
→
sdk/esp_iot_sdk_v1.4.0/
include/spi_flash.h
View file @
a33e3a4a
...
@@ -28,4 +28,12 @@ SpiFlashOpResult spi_flash_erase_sector(uint16 sec);
...
@@ -28,4 +28,12 @@ SpiFlashOpResult spi_flash_erase_sector(uint16 sec);
SpiFlashOpResult
spi_flash_write
(
uint32
des_addr
,
uint32
*
src_addr
,
uint32
size
);
SpiFlashOpResult
spi_flash_write
(
uint32
des_addr
,
uint32
*
src_addr
,
uint32
size
);
SpiFlashOpResult
spi_flash_read
(
uint32
src_addr
,
uint32
*
des_addr
,
uint32
size
);
SpiFlashOpResult
spi_flash_read
(
uint32
src_addr
,
uint32
*
des_addr
,
uint32
size
);
typedef
SpiFlashOpResult
(
*
user_spi_flash_read
)(
SpiFlashChip
*
spi
,
uint32
src_addr
,
uint32
*
des_addr
,
uint32
size
);
void
spi_flash_set_read_func
(
user_spi_flash_read
read
);
#endif
#endif
include/upgrade.h
→
sdk/esp_iot_sdk_v1.4.0/
include/upgrade.h
View file @
a33e3a4a
...
@@ -2,6 +2,7 @@
...
@@ -2,6 +2,7 @@
#define __UPGRADE_H__
#define __UPGRADE_H__
#define SPI_FLASH_SEC_SIZE 4096
#define SPI_FLASH_SEC_SIZE 4096
#define LIMIT_ERASE_SIZE 0x10000
#define USER_BIN1 0x00
#define USER_BIN1 0x00
#define USER_BIN2 0x01
#define USER_BIN2 0x01
...
@@ -37,14 +38,12 @@ struct upgrade_server_info {
...
@@ -37,14 +38,12 @@ struct upgrade_server_info {
#define UPGRADE_FLAG_START 0x01
#define UPGRADE_FLAG_START 0x01
#define UPGRADE_FLAG_FINISH 0x02
#define UPGRADE_FLAG_FINISH 0x02
//bool system_upgrade_start(struct upgrade_server_info *server);
bool
system_upgrade_start_ssl
(
struct
upgrade_server_info
*
server
);
void
system_upgrade_init
();
void
system_upgrade_init
();
void
system_upgrade_deinit
();
void
system_upgrade_deinit
();
bool
system_upgrade
(
uint8
*
data
,
uint16
len
);
bool
system_upgrade
(
uint8
*
data
,
uint16
len
);
#ifdef UPGRADE_SSL_ENABLE
#ifdef UPGRADE_SSL_ENABLE
bool
system_upgrade_start_ssl
(
struct
upgrade_server_info
*
server
);
bool
system_upgrade_start_ssl
(
struct
upgrade_server_info
*
server
);
// not supported now
#else
#else
bool
system_upgrade_start
(
struct
upgrade_server_info
*
server
);
bool
system_upgrade_start
(
struct
upgrade_server_info
*
server
);
#endif
#endif
...
...
include/user_interface.h
→
sdk/esp_iot_sdk_v1.4.0/
include/user_interface.h
View file @
a33e3a4a
/*
/*
* Copyright (C) 2013 -2014 Espressif System
* Copyright (C) 2013 -2014 Espressif System
*
*
*/
*/
#ifndef __USER_INTERFACE_H__
#ifndef __USER_INTERFACE_H__
#define __USER_INTERFACE_H__
#define __USER_INTERFACE_H__
#include "os_type.h"
#include "os_type.h"
#ifdef LWIP_OPEN_SRC
#ifdef LWIP_OPEN_SRC
#include "lwip/ip_addr.h"
#include "lwip/ip_addr.h"
#else
#else
#include "ip_addr.h"
#include "ip_addr.h"
#endif
#endif
#include "queue.h"
#include "queue.h"
#include "user_config.h"
#include "user_config.h"
#include "spi_flash.h"
#include "spi_flash.h"
#ifndef MAC2STR
#ifndef MAC2STR
#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
#endif
#endif
enum
rst_reason
{
enum
rst_reason
{
DEFAULT_RST_FLAG
=
0
,
REASON_DEFAULT_RST
=
0
,
WDT_RST_FLAG
=
1
,
REASON_WDT_RST
=
1
,
EXP_RST_FLAG
=
2
REASON_EXCEPTION_RST
=
2
,
};
REASON_SOFT_WDT_RST
=
3
,
REASON_SOFT_RESTART
=
4
,
struct
rst_info
{
REASON_DEEP_SLEEP_AWAKE
=
5
,
uint32
flag
;
REASON_EXT_SYS_RST
=
6
uint32
exccause
;
};
uint32
epc1
;
uint32
epc2
;
struct
rst_info
{
uint32
epc3
;
uint32
reason
;
uint32
excvaddr
;
uint32
exccause
;
uint32
depc
;
uint32
epc1
;
};
uint32
epc2
;
uint32
epc3
;
#define UPGRADE_FW_BIN1 0x00
uint32
excvaddr
;
#define UPGRADE_FW_BIN2 0x01
uint32
depc
;
};
void
system_restore
(
void
);
void
system_restart
(
void
);
struct
rst_info
*
system_get_rst_info
(
void
);
bool
system_deep_sleep_set_option
(
uint8
option
);
#define UPGRADE_FW_BIN1 0x00
void
system_deep_sleep
(
uint32
time_in_us
);
#define UPGRADE_FW_BIN2 0x01
uint8
system_upgrade_userbin_check
(
void
);
void
system_restore
(
void
);
void
system_upgrade_reboot
(
void
);
void
system_restart
(
void
);
uint8
system_upgrade_flag_check
();
void
system_upgrade_flag_set
(
uint8
flag
);
bool
system_deep_sleep_set_option
(
uint8
option
);
void
system_deep_sleep
(
uint32
time_in_us
);
void
system_timer_reinit
(
void
);
uint32
system_get_time
(
void
);
uint8
system_upgrade_userbin_check
(
void
);
void
system_upgrade_reboot
(
void
);
/* user task's prio must be 0/1/2 !!!*/
uint8
system_upgrade_flag_check
();
enum
{
void
system_upgrade_flag_set
(
uint8
flag
);
USER_TASK_PRIO_0
=
0
,
USER_TASK_PRIO_1
,
void
system_timer_reinit
(
void
);
USER_TASK_PRIO_2
,
uint32
system_get_time
(
void
);
USER_TASK_PRIO_MAX
};
/* user task's prio must be 0/1/2 !!!*/
enum
{
bool
system_os_task
(
os_task_t
task
,
uint8
prio
,
os_event_t
*
queue
,
uint8
qlen
);
USER_TASK_PRIO_0
=
0
,
bool
system_os_post
(
uint8
prio
,
os_signal_t
sig
,
os_param_t
par
);
USER_TASK_PRIO_1
,
USER_TASK_PRIO_2
,
void
system_print_meminfo
(
void
);
USER_TASK_PRIO_MAX
uint32
system_get_free_heap_size
(
void
);
};
void
system_set_os_print
(
uint8
onoff
);
bool
system_os_task
(
os_task_t
task
,
uint8
prio
,
os_event_t
*
queue
,
uint8
qlen
);
uint8
system_get_os_print
();
bool
system_os_post
(
uint8
prio
,
os_signal_t
sig
,
os_param_t
par
);
uint64
system_mktime
(
uint32
year
,
uint32
mon
,
uint32
day
,
uint32
hour
,
uint32
min
,
uint32
sec
);
void
system_print_meminfo
(
void
);
uint32
system_get_free_heap_size
(
void
);
uint32
system_get_chip_id
(
void
);
void
system_set_os_print
(
uint8
onoff
);
typedef
void
(
*
init_done_cb_t
)(
void
);
uint8
system_get_os_print
();
void
system_init_done_cb
(
init_done_cb_t
cb
);
uint64
system_mktime
(
uint32
year
,
uint32
mon
,
uint32
day
,
uint32
hour
,
uint32
min
,
uint32
sec
);
uint32
system_rtc_clock_cali_proc
(
void
);
uint32
system_get_chip_id
(
void
);
uint32
system_get_rtc_time
(
void
);
typedef
void
(
*
init_done_cb_t
)(
void
);
bool
system_rtc_mem_read
(
uint8
src_addr
,
void
*
des_addr
,
uint16
load_size
);
bool
system_rtc_mem_write
(
uint8
des_addr
,
const
void
*
src_addr
,
uint16
save_size
);
void
system_init_done_cb
(
init_done_cb_t
cb
);
void
system_uart_swap
(
void
);
uint32
system_rtc_clock_cali_proc
(
void
);
uint32
system_get_rtc_time
(
void
);
uint16
system_adc_read
(
void
);
uint16
system_get_vdd33
(
void
);
bool
system_rtc_mem_read
(
uint8
src_addr
,
void
*
des_addr
,
uint16
load_size
);
bool
system_rtc_mem_write
(
uint8
des_addr
,
const
void
*
src_addr
,
uint16
save_size
);
const
char
*
system_get_sdk_version
(
void
);
void
system_uart_swap
(
void
);
#define NULL_MODE 0x00
void
system_uart_de_swap
(
void
);
#define STATION_MODE 0x01
#define SOFTAP_MODE 0x02
uint16
system_adc_read
(
void
);
#define STATIONAP_MODE 0x03
uint16
system_get_vdd33
(
void
);
const
char
*
system_get_sdk_version
(
void
);
typedef
enum
_auth_mode
{
AUTH_OPEN
=
0
,
#define SYS_BOOT_ENHANCE_MODE 0
AUTH_WEP
,
#define SYS_BOOT_NORMAL_MODE 1
AUTH_WPA_PSK
,
AUTH_WPA2_PSK
,
#define SYS_BOOT_NORMAL_BIN 0
AUTH_WPA_WPA2_PSK
,
#define SYS_BOOT_TEST_BIN 1
AUTH_MAX
}
AUTH_MODE
;
uint8
system_get_boot_version
(
void
);
uint32
system_get_userbin_addr
(
void
);
uint8
wifi_get_opmode
(
void
);
uint8
system_get_boot_mode
(
void
);
bool
wifi_set_opmode
(
uint8
opmode
);
bool
system_restart_enhance
(
uint8
bin_type
,
uint32
bin_addr
);
struct
bss_info
{
#define SYS_CPU_80MHZ 80
STAILQ_ENTRY
(
bss_info
)
next
;
#define SYS_CPU_160MHZ 160
uint8
bssid
[
6
];
bool
system_update_cpu_freq
(
uint8
freq
);
uint8
ssid
[
32
];
uint8
system_get_cpu_freq
(
void
);
uint8
channel
;
sint8
rssi
;
enum
flash_size_map
{
AUTH_MODE
authmode
;
FLASH_SIZE_4M_MAP_256_256
=
0
,
uint8
is_hidden
;
FLASH_SIZE_2M
,
};
FLASH_SIZE_8M_MAP_512_512
,
FLASH_SIZE_16M_MAP_512_512
,
typedef
struct
_scaninfo
{
FLASH_SIZE_32M_MAP_512_512
,
STAILQ_HEAD
(,
bss_info
)
*
pbss
;
FLASH_SIZE_16M_MAP_1024_1024
,
struct
espconn
*
pespconn
;
FLASH_SIZE_32M_MAP_1024_1024
uint8
totalpage
;
};
uint8
pagenum
;
uint8
page_sn
;
enum
flash_size_map
system_get_flash_size_map
(
void
);
uint8
data_cnt
;
}
scaninfo
;
void
system_phy_set_max_tpw
(
uint8
max_tpw
);
void
system_phy_set_tpw_via_vdd33
(
uint16
vdd33
);
typedef
void
(
*
scan_done_cb_t
)(
void
*
arg
,
STATUS
status
);
void
system_phy_set_rfoption
(
uint8
option
);
void
system_phy_set_powerup_option
(
uint8
option
);
struct
station_config
{
uint8
ssid
[
32
];
bool
system_param_save_with_protect
(
uint16
start_sec
,
void
*
param
,
uint16
len
);
uint8
password
[
64
];
bool
system_param_load
(
uint16
start_sec
,
uint16
offset
,
void
*
param
,
uint16
len
);
uint8
bssid_set
;
// Note: If bssid_set is 1, station will just connect to the router
// with both ssid[] and bssid[] matched. Please check about this.
void
system_soft_wdt_stop
(
void
);
uint8
bssid
[
6
];
void
system_soft_wdt_restart
(
void
);
};
void
system_soft_wdt_feed
(
void
);
bool
wifi_station_get_config
(
struct
station_config
*
config
);
void
system_show_malloc
(
void
);
bool
wifi_station_set_config
(
struct
station_config
*
config
);
#define NULL_MODE 0x00
bool
wifi_station_connect
(
void
);
#define STATION_MODE 0x01
bool
wifi_station_disconnect
(
void
);
#define SOFTAP_MODE 0x02
#define STATIONAP_MODE 0x03
struct
scan_config
{
uint8
*
ssid
;
// Note: ssid == NULL, don't filter ssid.
typedef
enum
_auth_mode
{
uint8
*
bssid
;
// Note: bssid == NULL, don't filter bssid.
AUTH_OPEN
=
0
,
uint8
channel
;
// Note: channel == 0, scan all channels, otherwise scan set channel.
AUTH_WEP
,
uint8
show_hidden
;
// Note: show_hidden == 1, can get hidden ssid routers' info.
AUTH_WPA_PSK
,
};
AUTH_WPA2_PSK
,
AUTH_WPA_WPA2_PSK
,
bool
wifi_station_scan
(
struct
scan_config
*
config
,
scan_done_cb_t
cb
);
AUTH_MAX
}
AUTH_MODE
;
uint8
wifi_station_get_auto_connect
(
void
);
bool
wifi_station_set_auto_connect
(
uint8
set
);
uint8
wifi_get_opmode
(
void
);
uint8
wifi_get_opmode_default
(
void
);
enum
{
bool
wifi_set_opmode
(
uint8
opmode
);
STATION_IDLE
=
0
,
bool
wifi_set_opmode_current
(
uint8
opmode
);
STATION_CONNECTING
,
uint8
wifi_get_broadcast_if
(
void
);
STATION_WRONG_PASSWORD
,
bool
wifi_set_broadcast_if
(
uint8
interface
);
STATION_NO_AP_FOUND
,
STATION_CONNECT_FAIL
,
struct
bss_info
{
STATION_GOT_IP
STAILQ_ENTRY
(
bss_info
)
next
;
};
uint8
bssid
[
6
];
enum
dhcp_status
{
uint8
ssid
[
32
];
DHCP_STOPPED
,
uint8
ssid_len
;
DHCP_STARTED
uint8
channel
;
};
sint8
rssi
;
AUTH_MODE
authmode
;
uint8
wifi_station_get_connect_status
(
void
);
uint8
is_hidden
;
sint16
freq_offset
;
uint8
wifi_station_get_current_ap_id
(
void
);
sint16
freqcal_val
;
bool
wifi_station_ap_change
(
uint8
current_ap_id
);
uint8
*
esp_mesh_ie
;
bool
wifi_station_ap_number_set
(
uint8
ap_number
);
};
bool
wifi_station_dhcpc_start
(
void
);
typedef
struct
_scaninfo
{
bool
wifi_station_dhcpc_stop
(
void
);
STAILQ_HEAD
(,
bss_info
)
*
pbss
;
enum
dhcp_status
wifi_station_dhcpc_status
(
void
);
struct
espconn
*
pespconn
;
uint8
totalpage
;
struct
softap_config
{
uint8
pagenum
;
uint8
ssid
[
32
];
uint8
page_sn
;
uint8
password
[
64
];
uint8
data_cnt
;
uint8
ssid_len
;
// Note: Recommend to set it according to your ssid
}
scaninfo
;
uint8
channel
;
// Note: support 1 ~ 13
AUTH_MODE
authmode
;
// Note: Don't support AUTH_WEP in softAP mode.
typedef
void
(
*
scan_done_cb_t
)(
void
*
arg
,
STATUS
status
);
uint8
ssid_hidden
;
// Note: default 0
uint8
max_connection
;
// Note: default 4, max 4
struct
station_config
{
uint16
beacon_interval
;
// Note: support 100 ~ 60000 ms, default 100
uint8
ssid
[
32
];
};
uint8
password
[
64
];
uint8
bssid_set
;
// Note: If bssid_set is 1, station will just connect to the router
bool
wifi_softap_get_config
(
struct
softap_config
*
config
);
// with both ssid[] and bssid[] matched. Please check about this.
bool
wifi_softap_set_config
(
struct
softap_config
*
config
);
uint8
bssid
[
6
];
};
struct
station_info
{
STAILQ_ENTRY
(
station_info
)
next
;
bool
wifi_station_get_config
(
struct
station_config
*
config
);
bool
wifi_station_get_config_default
(
struct
station_config
*
config
);
uint8
bssid
[
6
];
bool
wifi_station_set_config
(
struct
station_config
*
config
);
struct
ip_addr
ip
;
bool
wifi_station_set_config_current
(
struct
station_config
*
config
);
};
bool
wifi_station_connect
(
void
);
struct
dhcps_lease
{
bool
wifi_station_disconnect
(
void
);
uint32
start_ip
;
uint32
end_ip
;
sint8
wifi_station_get_rssi
(
void
);
};
struct
scan_config
{
struct
station_info
*
wifi_softap_get_station_info
(
void
);
uint8
*
ssid
;
// Note: ssid == NULL, don't filter ssid.
void
wifi_softap_free_station_info
(
void
);
uint8
*
bssid
;
// Note: bssid == NULL, don't filter bssid.
uint8
wifi_station_get_ap_info
(
struct
station_config
config
[]);
uint8
channel
;
// Note: channel == 0, scan all channels, otherwise scan set channel.
uint8
show_hidden
;
// Note: show_hidden == 1, can get hidden ssid routers' info.
bool
wifi_softap_dhcps_start
(
void
);
};
bool
wifi_softap_dhcps_stop
(
void
);
bool
wifi_softap_set_dhcps_lease
(
struct
dhcps_lease
*
please
);
bool
wifi_station_scan
(
struct
scan_config
*
config
,
scan_done_cb_t
cb
);
enum
dhcp_status
wifi_softap_dhcps_status
(
void
);
uint8
wifi_station_get_auto_connect
(
void
);
#define STATION_IF 0x00
bool
wifi_station_set_auto_connect
(
uint8
set
);
#define SOFTAP_IF 0x01
bool
wifi_station_set_reconnect_policy
(
bool
set
);
bool
wifi_get_ip_info
(
uint8
if_index
,
struct
ip_info
*
info
);
bool
wifi_set_ip_info
(
uint8
if_index
,
struct
ip_info
*
info
);
enum
{
bool
wifi_get_macaddr
(
uint8
if_index
,
uint8
*
macaddr
);
STATION_IDLE
=
0
,
bool
wifi_set_macaddr
(
uint8
if_index
,
uint8
*
macaddr
);
STATION_CONNECTING
,
STATION_WRONG_PASSWORD
,
uint8
wifi_get_channel
(
void
);
STATION_NO_AP_FOUND
,
bool
wifi_set_channel
(
uint8
channel
);
STATION_CONNECT_FAIL
,
STATION_GOT_IP
void
wifi_status_led_install
(
uint8
gpio_id
,
uint32
gpio_name
,
uint8
gpio_func
);
};
void
wifi_status_led_uninstall
();
enum
dhcp_status
{
/** Get the absolute difference between 2 u32_t values (correcting overflows)
DHCP_STOPPED
,
* 'a' is expected to be 'higher' (without overflow) than 'b'. */
DHCP_STARTED
#define ESP_U32_DIFF(a, b) (((a) >= (b)) ? ((a) - (b)) : (((a) + ((b) ^ 0xFFFFFFFF) + 1)))
};
void
wifi_promiscuous_enable
(
uint8
promiscuous
);
uint8
wifi_station_get_connect_status
(
void
);
typedef
void
(
*
wifi_promiscuous_cb_t
)(
uint8
*
buf
,
uint16
len
);
uint8
wifi_station_get_current_ap_id
(
void
);
bool
wifi_station_ap_change
(
uint8
current_ap_id
);
void
wifi_set_promiscuous_rx_cb
(
wifi_promiscuous_cb_t
cb
);
bool
wifi_station_ap_number_set
(
uint8
ap_number
);
uint8
wifi_station_get_ap_info
(
struct
station_config
config
[]);
#define PHY_MODE_B 0x01
#define PHY_MODE_G 0x02
bool
wifi_station_dhcpc_start
(
void
);
#define PHY_MODE_N 0x03
bool
wifi_station_dhcpc_stop
(
void
);
enum
dhcp_status
wifi_station_dhcpc_status
(
void
);
enum
phy_mode
{
bool
wifi_station_dhcpc_set_maxtry
(
uint8
num
);
PHY_MODE_11B
=
1
,
PHY_MODE_11G
=
2
,
char
*
wifi_station_get_hostname
(
void
);
PHY_MODE_11N
=
3
bool
wifi_station_set_hostname
(
char
*
name
);
};
struct
softap_config
{
enum
phy_mode
wifi_get_phy_mode
(
void
);
uint8
ssid
[
32
];
bool
wifi_set_phy_mode
(
enum
phy_mode
mode
);
uint8
password
[
64
];
uint8
ssid_len
;
// Note: Recommend to set it according to your ssid
enum
sleep_type
{
uint8
channel
;
// Note: support 1 ~ 13
NONE_SLEEP_T
=
0
,
AUTH_MODE
authmode
;
// Note: Don't support AUTH_WEP in softAP mode.
LIGHT_SLEEP_T
,
uint8
ssid_hidden
;
// Note: default 0
MODEM_SLEEP_T
uint8
max_connection
;
// Note: default 4, max 4
};
uint16
beacon_interval
;
// Note: support 100 ~ 60000 ms, default 100
};
bool
wifi_set_sleep_type
(
enum
sleep_type
type
);
enum
sleep_type
wifi_get_sleep_type
(
void
);
bool
wifi_softap_get_config
(
struct
softap_config
*
config
);
bool
wifi_softap_get_config_default
(
struct
softap_config
*
config
);
#endif
bool
wifi_softap_set_config
(
struct
softap_config
*
config
);
bool
wifi_softap_set_config_current
(
struct
softap_config
*
config
);
struct
station_info
{
STAILQ_ENTRY
(
station_info
)
next
;
uint8
bssid
[
6
];
struct
ip_addr
ip
;
};
struct
dhcps_lease
{
bool
enable
;
struct
ip_addr
start_ip
;
struct
ip_addr
end_ip
;
};
enum
dhcps_offer_option
{
OFFER_START
=
0x00
,
OFFER_ROUTER
=
0x01
,
OFFER_END
};
uint8
wifi_softap_get_station_num
(
void
);
struct
station_info
*
wifi_softap_get_station_info
(
void
);
void
wifi_softap_free_station_info
(
void
);
bool
wifi_softap_dhcps_start
(
void
);
bool
wifi_softap_dhcps_stop
(
void
);
bool
wifi_softap_set_dhcps_lease
(
struct
dhcps_lease
*
please
);
bool
wifi_softap_get_dhcps_lease
(
struct
dhcps_lease
*
please
);
uint32
wifi_softap_get_dhcps_lease_time
(
void
);
bool
wifi_softap_set_dhcps_lease_time
(
uint32
minute
);
bool
wifi_softap_reset_dhcps_lease_time
(
void
);
enum
dhcp_status
wifi_softap_dhcps_status
(
void
);
bool
wifi_softap_set_dhcps_offer_option
(
uint8
level
,
void
*
optarg
);
#define STATION_IF 0x00
#define SOFTAP_IF 0x01
bool
wifi_get_ip_info
(
uint8
if_index
,
struct
ip_info
*
info
);
bool
wifi_set_ip_info
(
uint8
if_index
,
struct
ip_info
*
info
);
bool
wifi_get_macaddr
(
uint8
if_index
,
uint8
*
macaddr
);
bool
wifi_set_macaddr
(
uint8
if_index
,
uint8
*
macaddr
);
uint8
wifi_get_channel
(
void
);
bool
wifi_set_channel
(
uint8
channel
);
void
wifi_status_led_install
(
uint8
gpio_id
,
uint32
gpio_name
,
uint8
gpio_func
);
void
wifi_status_led_uninstall
();
/** Get the absolute difference between 2 u32_t values (correcting overflows)
* 'a' is expected to be 'higher' (without overflow) than 'b'. */
#define ESP_U32_DIFF(a, b) (((a) >= (b)) ? ((a) - (b)) : (((a) + ((b) ^ 0xFFFFFFFF) + 1)))
void
wifi_promiscuous_enable
(
uint8
promiscuous
);
typedef
void
(
*
wifi_promiscuous_cb_t
)(
uint8
*
buf
,
uint16
len
);
void
wifi_set_promiscuous_rx_cb
(
wifi_promiscuous_cb_t
cb
);
void
wifi_promiscuous_set_mac
(
const
uint8_t
*
address
);
enum
phy_mode
{
PHY_MODE_11B
=
1
,
PHY_MODE_11G
=
2
,
PHY_MODE_11N
=
3
};
enum
phy_mode
wifi_get_phy_mode
(
void
);
bool
wifi_set_phy_mode
(
enum
phy_mode
mode
);
enum
sleep_type
{
NONE_SLEEP_T
=
0
,
LIGHT_SLEEP_T
,
MODEM_SLEEP_T
};
bool
wifi_set_sleep_type
(
enum
sleep_type
type
);
enum
sleep_type
wifi_get_sleep_type
(
void
);
void
wifi_fpm_open
(
void
);
void
wifi_fpm_close
(
void
);
void
wifi_fpm_do_wakeup
(
void
);
sint8
wifi_fpm_do_sleep
(
uint32
sleep_time_in_us
);
void
wifi_fpm_set_sleep_type
(
enum
sleep_type
type
);
enum
sleep_type
wifi_fpm_get_sleep_type
(
void
);
enum
{
EVENT_STAMODE_CONNECTED
=
0
,
EVENT_STAMODE_DISCONNECTED
,
EVENT_STAMODE_AUTHMODE_CHANGE
,
EVENT_STAMODE_GOT_IP
,
EVENT_STAMODE_DHCP_TIMEOUT
,
EVENT_SOFTAPMODE_STACONNECTED
,
EVENT_SOFTAPMODE_STADISCONNECTED
,
EVENT_SOFTAPMODE_PROBEREQRECVED
,
EVENT_MAX
};
enum
{
REASON_UNSPECIFIED
=
1
,
REASON_AUTH_EXPIRE
=
2
,
REASON_AUTH_LEAVE
=
3
,
REASON_ASSOC_EXPIRE
=
4
,
REASON_ASSOC_TOOMANY
=
5
,
REASON_NOT_AUTHED
=
6
,
REASON_NOT_ASSOCED
=
7
,
REASON_ASSOC_LEAVE
=
8
,
REASON_ASSOC_NOT_AUTHED
=
9
,
REASON_DISASSOC_PWRCAP_BAD
=
10
,
/* 11h */
REASON_DISASSOC_SUPCHAN_BAD
=
11
,
/* 11h */
REASON_IE_INVALID
=
13
,
/* 11i */
REASON_MIC_FAILURE
=
14
,
/* 11i */
REASON_4WAY_HANDSHAKE_TIMEOUT
=
15
,
/* 11i */
REASON_GROUP_KEY_UPDATE_TIMEOUT
=
16
,
/* 11i */
REASON_IE_IN_4WAY_DIFFERS
=
17
,
/* 11i */
REASON_GROUP_CIPHER_INVALID
=
18
,
/* 11i */
REASON_PAIRWISE_CIPHER_INVALID
=
19
,
/* 11i */
REASON_AKMP_INVALID
=
20
,
/* 11i */
REASON_UNSUPP_RSN_IE_VERSION
=
21
,
/* 11i */
REASON_INVALID_RSN_IE_CAP
=
22
,
/* 11i */
REASON_802_1X_AUTH_FAILED
=
23
,
/* 11i */
REASON_CIPHER_SUITE_REJECTED
=
24
,
/* 11i */
REASON_BEACON_TIMEOUT
=
200
,
REASON_NO_AP_FOUND
=
201
,
REASON_AUTH_FAIL
=
202
,
REASON_ASSOC_FAIL
=
203
,
REASON_HANDSHAKE_TIMEOUT
=
204
,
};
typedef
struct
{
uint8
ssid
[
32
];
uint8
ssid_len
;
uint8
bssid
[
6
];
uint8
channel
;
}
Event_StaMode_Connected_t
;
typedef
struct
{
uint8
ssid
[
32
];
uint8
ssid_len
;
uint8
bssid
[
6
];
uint8
reason
;
}
Event_StaMode_Disconnected_t
;
typedef
struct
{
uint8
old_mode
;
uint8
new_mode
;
}
Event_StaMode_AuthMode_Change_t
;
typedef
struct
{
struct
ip_addr
ip
;
struct
ip_addr
mask
;
struct
ip_addr
gw
;
}
Event_StaMode_Got_IP_t
;
typedef
struct
{
uint8
mac
[
6
];
uint8
aid
;
}
Event_SoftAPMode_StaConnected_t
;
typedef
struct
{
uint8
mac
[
6
];
uint8
aid
;
}
Event_SoftAPMode_StaDisconnected_t
;
typedef
struct
{
int
rssi
;
uint8
mac
[
6
];
}
Event_SoftAPMode_ProbeReqRecved_t
;
typedef
union
{
Event_StaMode_Connected_t
connected
;
Event_StaMode_Disconnected_t
disconnected
;
Event_StaMode_AuthMode_Change_t
auth_change
;
Event_StaMode_Got_IP_t
got_ip
;
Event_SoftAPMode_StaConnected_t
sta_connected
;
Event_SoftAPMode_StaDisconnected_t
sta_disconnected
;
Event_SoftAPMode_ProbeReqRecved_t
ap_probereqrecved
;
}
Event_Info_u
;
typedef
struct
_esp_event
{
uint32
event
;
Event_Info_u
event_info
;
}
System_Event_t
;
typedef
void
(
*
wifi_event_handler_cb_t
)(
System_Event_t
*
event
);
void
wifi_set_event_handler_cb
(
wifi_event_handler_cb_t
cb
);
typedef
enum
wps_type
{
WPS_TYPE_DISABLE
=
0
,
WPS_TYPE_PBC
,
WPS_TYPE_PIN
,
WPS_TYPE_DISPLAY
,
WPS_TYPE_MAX
,
}
WPS_TYPE_t
;
enum
wps_cb_status
{
WPS_CB_ST_SUCCESS
=
0
,
WPS_CB_ST_FAILED
,
WPS_CB_ST_TIMEOUT
,
WPS_CB_ST_WEP
,
};
bool
wifi_wps_enable
(
WPS_TYPE_t
wps_type
);
bool
wifi_wps_disable
(
void
);
bool
wifi_wps_start
(
void
);
typedef
void
(
*
wps_st_cb_t
)(
int
status
);
bool
wifi_set_wps_cb
(
wps_st_cb_t
cb
);
typedef
void
(
*
freedom_outside_cb_t
)(
uint8
status
);
int
wifi_register_send_pkt_freedom_cb
(
freedom_outside_cb_t
cb
);
void
wifi_unregister_send_pkt_freedom_cb
(
void
);
int
wifi_send_pkt_freedom
(
uint8
*
buf
,
int
len
,
bool
sys_seq
);
int
wifi_rfid_locp_recv_open
(
void
);
void
wifi_rfid_locp_recv_close
(
void
);
typedef
void
(
*
rfid_locp_cb_t
)(
uint8
*
frm
,
int
len
,
int
rssi
);
int
wifi_register_rfid_locp_recv_cb
(
rfid_locp_cb_t
cb
);
void
wifi_unregister_rfid_locp_recv_cb
(
void
);
enum
FIXED_RATE
{
PHY_RATE_48
=
0x8
,
PHY_RATE_24
=
0x9
,
PHY_RATE_12
=
0xA
,
PHY_RATE_6
=
0xB
,
PHY_RATE_54
=
0xC
,
PHY_RATE_36
=
0xD
,
PHY_RATE_18
=
0xE
,
PHY_RATE_9
=
0xF
,
};
#define FIXED_RATE_MASK_NONE 0x00
#define FIXED_RATE_MASK_STA 0x01
#define FIXED_RATE_MASK_AP 0x02
#define FIXED_RATE_MASK_ALL 0x03
int
wifi_set_user_fixed_rate
(
uint8
enable_mask
,
uint8
rate
);
int
wifi_get_user_fixed_rate
(
uint8
*
enable_mask
,
uint8
*
rate
);
enum
support_rate
{
RATE_11B5M
=
0
,
RATE_11B11M
=
1
,
RATE_11B1M
=
2
,
RATE_11B2M
=
3
,
RATE_11G6M
=
4
,
RATE_11G12M
=
5
,
RATE_11G24M
=
6
,
RATE_11G48M
=
7
,
RATE_11G54M
=
8
,
RATE_11G9M
=
9
,
RATE_11G18M
=
10
,
RATE_11G36M
=
11
,
};
int
wifi_set_user_sup_rate
(
uint8
min
,
uint8
max
);
enum
RATE_11B_ID
{
RATE_11B_B11M
=
0
,
RATE_11B_B5M
=
1
,
RATE_11B_B2M
=
2
,
RATE_11B_B1M
=
3
,
};
enum
RATE_11G_ID
{
RATE_11G_G54M
=
0
,
RATE_11G_G48M
=
1
,
RATE_11G_G36M
=
2
,
RATE_11G_G24M
=
3
,
RATE_11G_G18M
=
4
,
RATE_11G_G12M
=
5
,
RATE_11G_G9M
=
6
,
RATE_11G_G6M
=
7
,
RATE_11G_B5M
=
8
,
RATE_11G_B2M
=
9
,
RATE_11G_B1M
=
10
};
enum
RATE_11N_ID
{
RATE_11N_MCS7S
=
0
,
RATE_11N_MCS7
=
1
,
RATE_11N_MCS6
=
2
,
RATE_11N_MCS5
=
3
,
RATE_11N_MCS4
=
4
,
RATE_11N_MCS3
=
5
,
RATE_11N_MCS2
=
6
,
RATE_11N_MCS1
=
7
,
RATE_11N_MCS0
=
8
,
RATE_11N_B5M
=
9
,
RATE_11N_B2M
=
10
,
RATE_11N_B1M
=
11
};
#define RC_LIMIT_11B 0
#define RC_LIMIT_11G 1
#define RC_LIMIT_11N 2
#define RC_LIMIT_P2P_11G 3
#define RC_LIMIT_P2P_11N 4
#define RC_LIMIT_NUM 5
#define LIMIT_RATE_MASK_NONE 0x00
#define LIMIT_RATE_MASK_STA 0x01
#define LIMIT_RATE_MASK_AP 0x02
#define LIMIT_RATE_MASK_ALL 0x03
bool
wifi_set_user_rate_limit
(
uint8
mode
,
uint8
ifidx
,
uint8
max
,
uint8
min
);
uint8
wifi_get_user_limit_rate_mask
(
void
);
bool
wifi_set_user_limit_rate_mask
(
uint8
enable_mask
);
enum
{
USER_IE_BEACON
=
0
,
USER_IE_PROBE_REQ
,
USER_IE_PROBE_RESP
,
USER_IE_ASSOC_REQ
,
USER_IE_ASSOC_RESP
,
USER_IE_MAX
};
typedef
void
(
*
user_ie_manufacturer_recv_cb_t
)(
uint8
type
,
const
uint8
sa
[
6
],
const
uint8
m_oui
[
3
],
uint8
*
ie
,
uint8
ie_len
,
int
rssi
);
bool
wifi_set_user_ie
(
bool
enable
,
uint8
*
m_oui
,
uint8
type
,
uint8
*
user_ie
,
uint8
len
);
int
wifi_register_user_ie_manufacturer_recv_cb
(
user_ie_manufacturer_recv_cb_t
cb
);
void
wifi_unregister_user_ie_manufacturer_recv_cb
(
void
);
#endif
ld/eagle.app.v6.ld
→
sdk/esp_iot_sdk_v1.4.0/
ld/eagle.app.v6.ld
View file @
a33e3a4a
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */
/* Linker Script for ld -N */
MEMORY
MEMORY
{
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = 0x8000
iram1_0_seg : org = 0x40100000, len = 0x8000
irom0_0_seg : org = 0x40210000, len = 0x80000
irom0_0_seg : org = 0x40240000, len = 0x3C000
}
}
PHDRS
PHDRS
{
{
dport0_0_phdr PT_LOAD;
dport0_0_phdr PT_LOAD;
dram0_0_phdr PT_LOAD;
dram0_0_phdr PT_LOAD;
dram0_0_bss_phdr PT_LOAD;
dram0_0_bss_phdr PT_LOAD;
iram1_0_phdr PT_LOAD;
iram1_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
}
}
/* Default entry point: */
/* Default entry point: */
ENTRY(user_start_trampoline)
ENTRY(call_user_start)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
EXTERN(_DebugExceptionVector)
/* Various memory-map dependent cache attribute settings: */
EXTERN(_DoubleExceptionVector)
_memmap_cacheattr_wb_base = 0x00000110;
EXTERN(_KernelExceptionVector)
_memmap_cacheattr_wt_base = 0x00000110;
EXTERN(_NMIExceptionVector)
_memmap_cacheattr_bp_base = 0x00000220;
EXTERN(_UserExceptionVector)
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
PROVIDE(_memmap_vecbase_reset = 0x40000000);
_memmap_cacheattr_wb_trapnull = 0x2222211F;
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_wb_base = 0x00000110;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wt_base = 0x00000110;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_bp_base = 0x00000220;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
_memmap_cacheattr_wb_trapnull = 0x2222211F;
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wb_allvalid = 0x22222112;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_bp_allvalid = 0x22222222;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
SECTIONS
_memmap_cacheattr_wb_allvalid = 0x22222112;
{
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_allvalid = 0x22222222;
.dport0.rodata : ALIGN(4)
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
{
_dport0_rodata_start = ABSOLUTE(.);
SECTIONS
*(.dport0.rodata)
{
*(.dport.rodata)
_dport0_rodata_end = ABSOLUTE(.);
.dport0.rodata : ALIGN(4)
} >dport0_0_seg :dport0_0_phdr
{
_dport0_rodata_start = ABSOLUTE(.);
.dport0.literal : ALIGN(4)
*(.dport0.rodata)
{
*(.dport.rodata)
_dport0_literal_start = ABSOLUTE(.);
_dport0_rodata_end = ABSOLUTE(.);
*(.dport0.literal)
} >dport0_0_seg :dport0_0_phdr
*(.dport.literal)
_dport0_literal_end = ABSOLUTE(.);
.dport0.literal : ALIGN(4)
} >dport0_0_seg :dport0_0_phdr
{
_dport0_literal_start = ABSOLUTE(.);
.dport0.data : ALIGN(4)
*(.dport0.literal)
{
*(.dport.literal)
_dport0_data_start = ABSOLUTE(.);
_dport0_literal_end = ABSOLUTE(.);
*(.dport0.data)
} >dport0_0_seg :dport0_0_phdr
*(.dport.data)
_dport0_data_end = ABSOLUTE(.);
.dport0.data : ALIGN(4)
} >dport0_0_seg :dport0_0_phdr
{
_dport0_data_start = ABSOLUTE(.);
.irom0.text : ALIGN(4)
*(.dport0.data)
{
*(.dport.data)
_irom0_text_start = ABSOLUTE(.);
_dport0_data_end = ABSOLUTE(.);
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
} >dport0_0_seg :dport0_0_phdr
*(.literal.* .text.*)
.data : ALIGN(4)
/* Trade some performance for lots of ram. At the time of writing the
{
* available Lua heap went from 18248 to 34704. */
_data_start = ABSOLUTE(.);
*(.rodata*)
*(.data)
*(.data.*)
_irom0_text_end = ABSOLUTE(.);
*(.gnu.linkonce.d.*)
_flash_used_end = ABSOLUTE(.);
*(.data1)
} >irom0_0_seg :irom0_0_phdr
*(.sdata)
*(.sdata.*)
.text : ALIGN(4)
*(.gnu.linkonce.s.*)
{
*(.sdata2)
_stext = .;
*(.sdata2.*)
_text_start = ABSOLUTE(.);
*(.gnu.linkonce.s2.*)
*(.entry.text)
*(.jcr)
*(.init.literal)
_data_end = ABSOLUTE(.);
*(.init)
} >dram0_0_seg :dram0_0_phdr
/* *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) */
*(.literal .text .iram0.text .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
.rodata : ALIGN(4)
*(.fini.literal)
{
*(.fini)
_rodata_start = ABSOLUTE(.);
*(.gnu.version)
*(.sdk.version)
_text_end = ABSOLUTE(.);
*(.rodata)
_etext = .;
*(.rodata.*)
} >iram1_0_seg :iram1_0_phdr
*(.gnu.linkonce.r.*)
*(.rodata1)
.lit4 : ALIGN(4)
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
{
*(.xt_except_table)
_lit4_start = ABSOLUTE(.);
*(.gcc_except_table)
*(*.lit4)
*(.gnu.linkonce.e.*)
*(.lit4.*)
*(.gnu.version_r)
*(.gnu.linkonce.lit4.*)
*(.eh_frame)
_lit4_end = ABSOLUTE(.);
/* C++ constructor and destructor tables, properly ordered: */
} >iram1_0_seg :iram1_0_phdr
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
.data : ALIGN(4)
KEEP (*(SORT(.ctors.*)))
{
KEEP (*(.ctors))
_data_start = ABSOLUTE(.);
KEEP (*crtbegin.o(.dtors))
*(.data)
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
*(.data.*)
KEEP (*(SORT(.dtors.*)))
*(.gnu.linkonce.d.*)
KEEP (*(.dtors))
*(.data1)
/* C++ exception handlers table: */
*(.sdata)
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
*(.sdata.*)
*(.xt_except_desc)
*(.gnu.linkonce.s.*)
*(.gnu.linkonce.h.*)
*(.sdata2)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.sdata2.*)
*(.xt_except_desc_end)
*(.gnu.linkonce.s2.*)
*(.dynamic)
*(.jcr)
*(.gnu.version_d)
_data_end = ABSOLUTE(.);
. = ALIGN(4); /* this table MUST be 4-byte aligned */
} >dram0_0_seg :dram0_0_phdr
_bss_table_start = ABSOLUTE(.);
LONG(_bss_start)
.rodata : ALIGN(4)
LONG(_bss_end)
{
_bss_table_end = ABSOLUTE(.);
_rodata_start = ABSOLUTE(.);
_rodata_end = ABSOLUTE(.);
*(.gnu.linkonce.r.*)
} >dram0_0_seg :dram0_0_phdr
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
*(.xt_except_table)
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
*(.gcc_except_table)
{
*(.gnu.linkonce.e.*)
. = ALIGN (8);
*(.gnu.version_r)
_bss_start = ABSOLUTE(.);
*(.eh_frame)
*(.dynsbss)
/* C++ constructor and destructor tables, properly ordered: */
*(.sbss)
KEEP (*crtbegin.o(.ctors))
*(.sbss.*)
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
*(.gnu.linkonce.sb.*)
KEEP (*(SORT(.ctors.*)))
*(.scommon)
KEEP (*(.ctors))
*(.sbss2)
KEEP (*crtbegin.o(.dtors))
*(.sbss2.*)
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
*(.gnu.linkonce.sb2.*)
KEEP (*(SORT(.dtors.*)))
*(.dynbss)
KEEP (*(.dtors))
*(.bss)
/* C++ exception handlers table: */
*(.bss.*)
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
*(.gnu.linkonce.b.*)
*(.xt_except_desc)
*(COMMON)
*(.gnu.linkonce.h.*)
. = ALIGN (8);
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
_bss_end = ABSOLUTE(.);
*(.xt_except_desc_end)
_heap_start = ABSOLUTE(.);
*(.dynamic)
/* _stack_sentry = ALIGN(0x8); */
*(.gnu.version_d)
} >dram0_0_seg :dram0_0_bss_phdr
. = ALIGN(4); /* this table MUST be 4-byte aligned */
/* __stack = 0x3ffc8000; */
_bss_table_start = ABSOLUTE(.);
LONG(_bss_start)
.text : ALIGN(4)
LONG(_bss_end)
{
_bss_table_end = ABSOLUTE(.);
_stext = .;
_rodata_end = ABSOLUTE(.);
_text_start = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
*(.UserEnter.text)
. = ALIGN(16);
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
*(.DebugExceptionVector.text)
{
. = ALIGN(16);
. = ALIGN (8);
*(.NMIExceptionVector.text)
_bss_start = ABSOLUTE(.);
. = ALIGN(16);
*(.dynsbss)
*(.KernelExceptionVector.text)
*(.sbss)
LONG(0)
*(.sbss.*)
LONG(0)
*(.gnu.linkonce.sb.*)
LONG(0)
*(.scommon)
LONG(0)
*(.sbss2)
. = ALIGN(16);
*(.sbss2.*)
*(.UserExceptionVector.text)
*(.gnu.linkonce.sb2.*)
LONG(0)
*(.dynbss)
LONG(0)
*(.bss)
LONG(0)
*(.bss.*)
LONG(0)
*(.gnu.linkonce.b.*)
. = ALIGN(16);
*(COMMON)
*(.DoubleExceptionVector.text)
. = ALIGN (8);
LONG(0)
_bss_end = ABSOLUTE(.);
LONG(0)
_heap_start = ABSOLUTE(.);
LONG(0)
/* _stack_sentry = ALIGN(0x8); */
LONG(0)
} >dram0_0_seg :dram0_0_bss_phdr
. = ALIGN (16);
/* __stack = 0x3ffc8000; */
*(.entry.text)
*(.init.literal)
}
*(.init)
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
/* get ROM code address */
*(.fini.literal)
INCLUDE "../ld/eagle.rom.addr.v6.ld"
*(.fini)
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr
.lit4 : ALIGN(4)
{
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
} >iram1_0_seg :iram1_0_phdr
.irom0.text : ALIGN(4)
{
_irom0_text_start = ABSOLUTE(.);
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
_irom0_text_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr
}
/* get ROM code address */
INCLUDE "../ld/eagle.rom.addr.v6.ld"
ld/eagle.app.v6.app1.ld
→
sdk/esp_iot_sdk_v1.4.0/
ld/eagle.app.v6.
new.1024.
app1.ld
View file @
a33e3a4a
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */
/* Linker Script for ld -N */
MEMORY
MEMORY
{
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = 0x8000
iram1_0_seg : org = 0x40100000, len = 0x8000
irom0_0_seg : org = 0x40211000, len = 0x2B000
irom0_0_seg : org = 0x40201010, len = 0x6B000
}
}
PHDRS
PHDRS
{
{
dport0_0_phdr PT_LOAD;
dport0_0_phdr PT_LOAD;
dram0_0_phdr PT_LOAD;
dram0_0_phdr PT_LOAD;
dram0_0_bss_phdr PT_LOAD;
dram0_0_bss_phdr PT_LOAD;
iram1_0_phdr PT_LOAD;
iram1_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
}
}
/* Default entry point: */
/* Default entry point: */
ENTRY(call_user_start)
ENTRY(call_user_start)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
EXTERN(_DebugExceptionVector)
/* Various memory-map dependent cache attribute settings: */
EXTERN(_DoubleExceptionVector)
_memmap_cacheattr_wb_base = 0x00000110;
EXTERN(_KernelExceptionVector)
_memmap_cacheattr_wt_base = 0x00000110;
EXTERN(_NMIExceptionVector)
_memmap_cacheattr_bp_base = 0x00000220;
EXTERN(_UserExceptionVector)
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
PROVIDE(_memmap_vecbase_reset = 0x40000000);
_memmap_cacheattr_wb_trapnull = 0x2222211F;
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_wb_base = 0x00000110;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wt_base = 0x00000110;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_bp_base = 0x00000220;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
_memmap_cacheattr_wb_trapnull = 0x2222211F;
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wb_allvalid = 0x22222112;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_bp_allvalid = 0x22222222;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
SECTIONS
_memmap_cacheattr_wb_allvalid = 0x22222112;
{
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_allvalid = 0x22222222;
.dport0.rodata : ALIGN(4)
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
{
_dport0_rodata_start = ABSOLUTE(.);
SECTIONS
*(.dport0.rodata)
{
*(.dport.rodata)
_dport0_rodata_end = ABSOLUTE(.);
.dport0.rodata : ALIGN(4)
} >dport0_0_seg :dport0_0_phdr
{
_dport0_rodata_start = ABSOLUTE(.);
.dport0.literal : ALIGN(4)
*(.dport0.rodata)
{
*(.dport.rodata)
_dport0_literal_start = ABSOLUTE(.);
_dport0_rodata_end = ABSOLUTE(.);
*(.dport0.literal)
} >dport0_0_seg :dport0_0_phdr
*(.dport.literal)
_dport0_literal_end = ABSOLUTE(.);
.dport0.literal : ALIGN(4)
} >dport0_0_seg :dport0_0_phdr
{
_dport0_literal_start = ABSOLUTE(.);
.dport0.data : ALIGN(4)
*(.dport0.literal)
{
*(.dport.literal)
_dport0_data_start = ABSOLUTE(.);
_dport0_literal_end = ABSOLUTE(.);
*(.dport0.data)
} >dport0_0_seg :dport0_0_phdr
*(.dport.data)
_dport0_data_end = ABSOLUTE(.);
.dport0.data : ALIGN(4)
} >dport0_0_seg :dport0_0_phdr
{
_dport0_data_start = ABSOLUTE(.);
.data : ALIGN(4)
*(.dport0.data)
{
*(.dport.data)
_data_start = ABSOLUTE(.);
_dport0_data_end = ABSOLUTE(.);
*(.data)
} >dport0_0_seg :dport0_0_phdr
*(.data.*)
*(.gnu.linkonce.d.*)
.data : ALIGN(4)
*(.data1)
{
*(.sdata)
_data_start = ABSOLUTE(.);
*(.sdata.*)
*(.data)
*(.gnu.linkonce.s.*)
*(.data.*)
*(.sdata2)
*(.gnu.linkonce.d.*)
*(.sdata2.*)
*(.data1)
*(.gnu.linkonce.s2.*)
*(.sdata)
*(.jcr)
*(.sdata.*)
_data_end = ABSOLUTE(.);
*(.gnu.linkonce.s.*)
} >dram0_0_seg :dram0_0_phdr
*(.sdata2)
*(.sdata2.*)
.rodata : ALIGN(4)
*(.gnu.linkonce.s2.*)
{
*(.jcr)
_rodata_start = ABSOLUTE(.);
_data_end = ABSOLUTE(.);
*(.rodata)
} >dram0_0_seg :dram0_0_phdr
*(.rodata.*)
*(.gnu.linkonce.r.*)
.rodata : ALIGN(4)
*(.rodata1)
{
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
_rodata_start = ABSOLUTE(.);
*(.xt_except_table)
*(.sdk.version)
*(.gcc_except_table)
*(.rodata)
*(.gnu.linkonce.e.*)
*(.rodata.*)
*(.gnu.version_r)
*(.gnu.linkonce.r.*)
*(.eh_frame)
*(.rodata1)
/* C++ constructor and destructor tables, properly ordered: */
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
KEEP (*crtbegin.o(.ctors))
*(.xt_except_table)
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
*(.gcc_except_table)
KEEP (*(SORT(.ctors.*)))
*(.gnu.linkonce.e.*)
KEEP (*(.ctors))
*(.gnu.version_r)
KEEP (*crtbegin.o(.dtors))
*(.eh_frame)
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
/* C++ constructor and destructor tables, properly ordered: */
KEEP (*(SORT(.dtors.*)))
KEEP (*crtbegin.o(.ctors))
KEEP (*(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
/* C++ exception handlers table: */
KEEP (*(SORT(.ctors.*)))
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
KEEP (*(.ctors))
*(.xt_except_desc)
KEEP (*crtbegin.o(.dtors))
*(.gnu.linkonce.h.*)
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
KEEP (*(SORT(.dtors.*)))
*(.xt_except_desc_end)
KEEP (*(.dtors))
*(.dynamic)
/* C++ exception handlers table: */
*(.gnu.version_d)
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
. = ALIGN(4); /* this table MUST be 4-byte aligned */
*(.xt_except_desc)
_bss_table_start = ABSOLUTE(.);
*(.gnu.linkonce.h.*)
LONG(_bss_start)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
LONG(_bss_end)
*(.xt_except_desc_end)
_bss_table_end = ABSOLUTE(.);
*(.dynamic)
_rodata_end = ABSOLUTE(.);
*(.gnu.version_d)
} >dram0_0_seg :dram0_0_phdr
. = ALIGN(4); /* this table MUST be 4-byte aligned */
_bss_table_start = ABSOLUTE(.);
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
LONG(_bss_start)
{
LONG(_bss_end)
. = ALIGN (8);
_bss_table_end = ABSOLUTE(.);
_bss_start = ABSOLUTE(.);
_rodata_end = ABSOLUTE(.);
*(.dynsbss)
} >dram0_0_seg :dram0_0_phdr
*(.sbss)
*(.sbss.*)
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
*(.gnu.linkonce.sb.*)
{
*(.scommon)
. = ALIGN (8);
*(.sbss2)
_bss_start = ABSOLUTE(.);
*(.sbss2.*)
*(.dynsbss)
*(.gnu.linkonce.sb2.*)
*(.sbss)
*(.dynbss)
*(.sbss.*)
*(.bss)
*(.gnu.linkonce.sb.*)
*(.bss.*)
*(.scommon)
*(.gnu.linkonce.b.*)
*(.sbss2)
*(COMMON)
*(.sbss2.*)
. = ALIGN (8);
*(.gnu.linkonce.sb2.*)
_bss_end = ABSOLUTE(.);
*(.dynbss)
_heap_start = ABSOLUTE(.);
*(.bss)
/* _stack_sentry = ALIGN(0x8); */
*(.bss.*)
} >dram0_0_seg :dram0_0_bss_phdr
*(.gnu.linkonce.b.*)
/* __stack = 0x3ffc8000; */
*(COMMON)
. = ALIGN (8);
.text : ALIGN(4)
_bss_end = ABSOLUTE(.);
{
_heap_start = ABSOLUTE(.);
_stext = .;
/* _stack_sentry = ALIGN(0x8); */
_text_start = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_bss_phdr
*(.entry.text)
/* __stack = 0x3ffc8000; */
*(.init.literal)
*(.init)
.text : ALIGN(4)
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
{
*(.fini.literal)
_stext = .;
*(.fini)
_text_start = ABSOLUTE(.);
*(.gnu.version)
*(.UserEnter.text)
_text_end = ABSOLUTE(.);
. = ALIGN(16);
_etext = .;
*(.DebugExceptionVector.text)
} >iram1_0_seg :iram1_0_phdr
. = ALIGN(16);
*(.NMIExceptionVector.text)
.lit4 : ALIGN(4)
. = ALIGN(16);
{
*(.KernelExceptionVector.text)
_lit4_start = ABSOLUTE(.);
LONG(0)
*(*.lit4)
LONG(0)
*(.lit4.*)
LONG(0)
*(.gnu.linkonce.lit4.*)
LONG(0)
_lit4_end = ABSOLUTE(.);
. = ALIGN(16);
} >iram1_0_seg :iram1_0_phdr
*(.UserExceptionVector.text)
LONG(0)
.irom0.text : ALIGN(4)
LONG(0)
{
LONG(0)
_irom0_text_start = ABSOLUTE(.);
LONG(0)
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
. = ALIGN(16);
_irom0_text_end = ABSOLUTE(.);
*(.DoubleExceptionVector.text)
} >irom0_0_seg :irom0_0_phdr
LONG(0)
}
LONG(0)
LONG(0)
/* get ROM code address */
LONG(0)
INCLUDE "../ld/eagle.rom.addr.v6.ld"
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr
.lit4 : ALIGN(4)
{
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
} >iram1_0_seg :iram1_0_phdr
.irom0.text : ALIGN(4)
{
_irom0_text_start = ABSOLUTE(.);
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
_irom0_text_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr
}
/* get ROM code address */
INCLUDE "../ld/eagle.rom.addr.v6.ld"
sdk/esp_iot_sdk_v1.4.0/ld/eagle.app.v6.new.1024.app2.ld
0 → 100644
View file @
a33e3a4a
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */
MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = 0x8000
irom0_0_seg : org = 0x40281010, len = 0x6B000
}
PHDRS
{
dport0_0_phdr PT_LOAD;
dram0_0_phdr PT_LOAD;
dram0_0_bss_phdr PT_LOAD;
iram1_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
}
/* Default entry point: */
ENTRY(call_user_start)
EXTERN(_DebugExceptionVector)
EXTERN(_DoubleExceptionVector)
EXTERN(_KernelExceptionVector)
EXTERN(_NMIExceptionVector)
EXTERN(_UserExceptionVector)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wb_base = 0x00000110;
_memmap_cacheattr_wt_base = 0x00000110;
_memmap_cacheattr_bp_base = 0x00000220;
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
_memmap_cacheattr_wb_trapnull = 0x2222211F;
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
_memmap_cacheattr_wb_allvalid = 0x22222112;
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_allvalid = 0x22222222;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
.dport0.rodata : ALIGN(4)
{
_dport0_rodata_start = ABSOLUTE(.);
*(.dport0.rodata)
*(.dport.rodata)
_dport0_rodata_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.literal : ALIGN(4)
{
_dport0_literal_start = ABSOLUTE(.);
*(.dport0.literal)
*(.dport.literal)
_dport0_literal_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.data : ALIGN(4)
{
_dport0_data_start = ABSOLUTE(.);
*(.dport0.data)
*(.dport.data)
_dport0_data_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.data : ALIGN(4)
{
_data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
_data_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.rodata : ALIGN(4)
{
_rodata_start = ABSOLUTE(.);
*(.sdk.version)
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
*(.rodata1)
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame)
/* C++ constructor and destructor tables, properly ordered: */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
. = ALIGN(4); /* this table MUST be 4-byte aligned */
_bss_table_start = ABSOLUTE(.);
LONG(_bss_start)
LONG(_bss_end)
_bss_table_end = ABSOLUTE(.);
_rodata_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
{
. = ALIGN (8);
_bss_start = ABSOLUTE(.);
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
_bss_end = ABSOLUTE(.);
_heap_start = ABSOLUTE(.);
/* _stack_sentry = ALIGN(0x8); */
} >dram0_0_seg :dram0_0_bss_phdr
/* __stack = 0x3ffc8000; */
.text : ALIGN(4)
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.UserEnter.text)
. = ALIGN(16);
*(.DebugExceptionVector.text)
. = ALIGN(16);
*(.NMIExceptionVector.text)
. = ALIGN(16);
*(.KernelExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.UserExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.DoubleExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr
.lit4 : ALIGN(4)
{
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
} >iram1_0_seg :iram1_0_phdr
.irom0.text : ALIGN(4)
{
_irom0_text_start = ABSOLUTE(.);
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
_irom0_text_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr
}
/* get ROM code address */
INCLUDE "../ld/eagle.rom.addr.v6.ld"
sdk/esp_iot_sdk_v1.4.0/ld/eagle.app.v6.new.2048.ld
0 → 100644
View file @
a33e3a4a
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */
MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = 0x8000
irom0_0_seg : org = 0x40201010, len = 0xE0000
}
PHDRS
{
dport0_0_phdr PT_LOAD;
dram0_0_phdr PT_LOAD;
dram0_0_bss_phdr PT_LOAD;
iram1_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
}
/* Default entry point: */
ENTRY(call_user_start)
EXTERN(_DebugExceptionVector)
EXTERN(_DoubleExceptionVector)
EXTERN(_KernelExceptionVector)
EXTERN(_NMIExceptionVector)
EXTERN(_UserExceptionVector)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wb_base = 0x00000110;
_memmap_cacheattr_wt_base = 0x00000110;
_memmap_cacheattr_bp_base = 0x00000220;
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
_memmap_cacheattr_wb_trapnull = 0x2222211F;
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
_memmap_cacheattr_wb_allvalid = 0x22222112;
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_allvalid = 0x22222222;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
.dport0.rodata : ALIGN(4)
{
_dport0_rodata_start = ABSOLUTE(.);
*(.dport0.rodata)
*(.dport.rodata)
_dport0_rodata_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.literal : ALIGN(4)
{
_dport0_literal_start = ABSOLUTE(.);
*(.dport0.literal)
*(.dport.literal)
_dport0_literal_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.data : ALIGN(4)
{
_dport0_data_start = ABSOLUTE(.);
*(.dport0.data)
*(.dport.data)
_dport0_data_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.data : ALIGN(4)
{
_data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
_data_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.rodata : ALIGN(4)
{
_rodata_start = ABSOLUTE(.);
*(.sdk.version)
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
*(.rodata1)
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame)
/* C++ constructor and destructor tables, properly ordered: */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
. = ALIGN(4); /* this table MUST be 4-byte aligned */
_bss_table_start = ABSOLUTE(.);
LONG(_bss_start)
LONG(_bss_end)
_bss_table_end = ABSOLUTE(.);
_rodata_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
{
. = ALIGN (8);
_bss_start = ABSOLUTE(.);
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
_bss_end = ABSOLUTE(.);
_heap_start = ABSOLUTE(.);
/* _stack_sentry = ALIGN(0x8); */
} >dram0_0_seg :dram0_0_bss_phdr
/* __stack = 0x3ffc8000; */
.text : ALIGN(4)
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.UserEnter.text)
. = ALIGN(16);
*(.DebugExceptionVector.text)
. = ALIGN(16);
*(.NMIExceptionVector.text)
. = ALIGN(16);
*(.KernelExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.UserExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.DoubleExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr
.lit4 : ALIGN(4)
{
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
} >iram1_0_seg :iram1_0_phdr
.irom0.text : ALIGN(4)
{
_irom0_text_start = ABSOLUTE(.);
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
_irom0_text_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr
}
/* get ROM code address */
INCLUDE "../ld/eagle.rom.addr.v6.ld"
sdk/esp_iot_sdk_v1.4.0/ld/eagle.app.v6.new.512.app1.ld
0 → 100644
View file @
a33e3a4a
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */
MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = 0x8000
irom0_0_seg : org = 0x40201010, len = 0x2B000
}
PHDRS
{
dport0_0_phdr PT_LOAD;
dram0_0_phdr PT_LOAD;
dram0_0_bss_phdr PT_LOAD;
iram1_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
}
/* Default entry point: */
ENTRY(call_user_start)
EXTERN(_DebugExceptionVector)
EXTERN(_DoubleExceptionVector)
EXTERN(_KernelExceptionVector)
EXTERN(_NMIExceptionVector)
EXTERN(_UserExceptionVector)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wb_base = 0x00000110;
_memmap_cacheattr_wt_base = 0x00000110;
_memmap_cacheattr_bp_base = 0x00000220;
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
_memmap_cacheattr_wb_trapnull = 0x2222211F;
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
_memmap_cacheattr_wb_allvalid = 0x22222112;
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_allvalid = 0x22222222;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
.dport0.rodata : ALIGN(4)
{
_dport0_rodata_start = ABSOLUTE(.);
*(.dport0.rodata)
*(.dport.rodata)
_dport0_rodata_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.literal : ALIGN(4)
{
_dport0_literal_start = ABSOLUTE(.);
*(.dport0.literal)
*(.dport.literal)
_dport0_literal_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.data : ALIGN(4)
{
_dport0_data_start = ABSOLUTE(.);
*(.dport0.data)
*(.dport.data)
_dport0_data_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.data : ALIGN(4)
{
_data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
_data_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.rodata : ALIGN(4)
{
_rodata_start = ABSOLUTE(.);
*(.sdk.version)
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
*(.rodata1)
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame)
/* C++ constructor and destructor tables, properly ordered: */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
. = ALIGN(4); /* this table MUST be 4-byte aligned */
_bss_table_start = ABSOLUTE(.);
LONG(_bss_start)
LONG(_bss_end)
_bss_table_end = ABSOLUTE(.);
_rodata_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
{
. = ALIGN (8);
_bss_start = ABSOLUTE(.);
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
_bss_end = ABSOLUTE(.);
_heap_start = ABSOLUTE(.);
/* _stack_sentry = ALIGN(0x8); */
} >dram0_0_seg :dram0_0_bss_phdr
/* __stack = 0x3ffc8000; */
.text : ALIGN(4)
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.UserEnter.text)
. = ALIGN(16);
*(.DebugExceptionVector.text)
. = ALIGN(16);
*(.NMIExceptionVector.text)
. = ALIGN(16);
*(.KernelExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.UserExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.DoubleExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr
.lit4 : ALIGN(4)
{
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
} >iram1_0_seg :iram1_0_phdr
.irom0.text : ALIGN(4)
{
_irom0_text_start = ABSOLUTE(.);
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
_irom0_text_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr
}
/* get ROM code address */
INCLUDE "../ld/eagle.rom.addr.v6.ld"
sdk/esp_iot_sdk_v1.4.0/ld/eagle.app.v6.new.512.app2.ld
0 → 100644
View file @
a33e3a4a
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */
MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = 0x8000
irom0_0_seg : org = 0x40241010, len = 0x2B000
}
PHDRS
{
dport0_0_phdr PT_LOAD;
dram0_0_phdr PT_LOAD;
dram0_0_bss_phdr PT_LOAD;
iram1_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
}
/* Default entry point: */
ENTRY(call_user_start)
EXTERN(_DebugExceptionVector)
EXTERN(_DoubleExceptionVector)
EXTERN(_KernelExceptionVector)
EXTERN(_NMIExceptionVector)
EXTERN(_UserExceptionVector)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wb_base = 0x00000110;
_memmap_cacheattr_wt_base = 0x00000110;
_memmap_cacheattr_bp_base = 0x00000220;
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
_memmap_cacheattr_wb_trapnull = 0x2222211F;
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
_memmap_cacheattr_wb_allvalid = 0x22222112;
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_allvalid = 0x22222222;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
.dport0.rodata : ALIGN(4)
{
_dport0_rodata_start = ABSOLUTE(.);
*(.dport0.rodata)
*(.dport.rodata)
_dport0_rodata_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.literal : ALIGN(4)
{
_dport0_literal_start = ABSOLUTE(.);
*(.dport0.literal)
*(.dport.literal)
_dport0_literal_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.data : ALIGN(4)
{
_dport0_data_start = ABSOLUTE(.);
*(.dport0.data)
*(.dport.data)
_dport0_data_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.data : ALIGN(4)
{
_data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
_data_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.rodata : ALIGN(4)
{
_rodata_start = ABSOLUTE(.);
*(.sdk.version)
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
*(.rodata1)
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame)
/* C++ constructor and destructor tables, properly ordered: */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
. = ALIGN(4); /* this table MUST be 4-byte aligned */
_bss_table_start = ABSOLUTE(.);
LONG(_bss_start)
LONG(_bss_end)
_bss_table_end = ABSOLUTE(.);
_rodata_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
{
. = ALIGN (8);
_bss_start = ABSOLUTE(.);
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
_bss_end = ABSOLUTE(.);
_heap_start = ABSOLUTE(.);
/* _stack_sentry = ALIGN(0x8); */
} >dram0_0_seg :dram0_0_bss_phdr
/* __stack = 0x3ffc8000; */
.text : ALIGN(4)
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.UserEnter.text)
. = ALIGN(16);
*(.DebugExceptionVector.text)
. = ALIGN(16);
*(.NMIExceptionVector.text)
. = ALIGN(16);
*(.KernelExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.UserExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.DoubleExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr
.lit4 : ALIGN(4)
{
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
} >iram1_0_seg :iram1_0_phdr
.irom0.text : ALIGN(4)
{
_irom0_text_start = ABSOLUTE(.);
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
_irom0_text_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr
}
/* get ROM code address */
INCLUDE "../ld/eagle.rom.addr.v6.ld"
sdk/esp_iot_sdk_v1.4.0/ld/eagle.app.v6.old.1024.app1.ld
0 → 100644
View file @
a33e3a4a
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */
MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = 0x8000
irom0_0_seg : org = 0x40211000, len = 0x6B000
}
PHDRS
{
dport0_0_phdr PT_LOAD;
dram0_0_phdr PT_LOAD;
dram0_0_bss_phdr PT_LOAD;
iram1_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
}
/* Default entry point: */
ENTRY(call_user_start)
EXTERN(_DebugExceptionVector)
EXTERN(_DoubleExceptionVector)
EXTERN(_KernelExceptionVector)
EXTERN(_NMIExceptionVector)
EXTERN(_UserExceptionVector)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wb_base = 0x00000110;
_memmap_cacheattr_wt_base = 0x00000110;
_memmap_cacheattr_bp_base = 0x00000220;
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
_memmap_cacheattr_wb_trapnull = 0x2222211F;
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
_memmap_cacheattr_wb_allvalid = 0x22222112;
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_allvalid = 0x22222222;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
.dport0.rodata : ALIGN(4)
{
_dport0_rodata_start = ABSOLUTE(.);
*(.dport0.rodata)
*(.dport.rodata)
_dport0_rodata_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.literal : ALIGN(4)
{
_dport0_literal_start = ABSOLUTE(.);
*(.dport0.literal)
*(.dport.literal)
_dport0_literal_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.data : ALIGN(4)
{
_dport0_data_start = ABSOLUTE(.);
*(.dport0.data)
*(.dport.data)
_dport0_data_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.data : ALIGN(4)
{
_data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
_data_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.rodata : ALIGN(4)
{
_rodata_start = ABSOLUTE(.);
*(.sdk.version)
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
*(.rodata1)
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame)
/* C++ constructor and destructor tables, properly ordered: */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
. = ALIGN(4); /* this table MUST be 4-byte aligned */
_bss_table_start = ABSOLUTE(.);
LONG(_bss_start)
LONG(_bss_end)
_bss_table_end = ABSOLUTE(.);
_rodata_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
{
. = ALIGN (8);
_bss_start = ABSOLUTE(.);
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
_bss_end = ABSOLUTE(.);
_heap_start = ABSOLUTE(.);
/* _stack_sentry = ALIGN(0x8); */
} >dram0_0_seg :dram0_0_bss_phdr
/* __stack = 0x3ffc8000; */
.text : ALIGN(4)
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.UserEnter.text)
. = ALIGN(16);
*(.DebugExceptionVector.text)
. = ALIGN(16);
*(.NMIExceptionVector.text)
. = ALIGN(16);
*(.KernelExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.UserExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.DoubleExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr
.lit4 : ALIGN(4)
{
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
} >iram1_0_seg :iram1_0_phdr
.irom0.text : ALIGN(4)
{
_irom0_text_start = ABSOLUTE(.);
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
_irom0_text_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr
}
/* get ROM code address */
INCLUDE "../ld/eagle.rom.addr.v6.ld"
sdk/esp_iot_sdk_v1.4.0/ld/eagle.app.v6.old.1024.app2.ld
0 → 100644
View file @
a33e3a4a
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */
MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = 0x8000
irom0_0_seg : org = 0x40291000, len = 0x6B000
}
PHDRS
{
dport0_0_phdr PT_LOAD;
dram0_0_phdr PT_LOAD;
dram0_0_bss_phdr PT_LOAD;
iram1_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
}
/* Default entry point: */
ENTRY(call_user_start)
EXTERN(_DebugExceptionVector)
EXTERN(_DoubleExceptionVector)
EXTERN(_KernelExceptionVector)
EXTERN(_NMIExceptionVector)
EXTERN(_UserExceptionVector)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wb_base = 0x00000110;
_memmap_cacheattr_wt_base = 0x00000110;
_memmap_cacheattr_bp_base = 0x00000220;
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
_memmap_cacheattr_wb_trapnull = 0x2222211F;
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
_memmap_cacheattr_wb_allvalid = 0x22222112;
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_allvalid = 0x22222222;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
.dport0.rodata : ALIGN(4)
{
_dport0_rodata_start = ABSOLUTE(.);
*(.dport0.rodata)
*(.dport.rodata)
_dport0_rodata_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.literal : ALIGN(4)
{
_dport0_literal_start = ABSOLUTE(.);
*(.dport0.literal)
*(.dport.literal)
_dport0_literal_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.data : ALIGN(4)
{
_dport0_data_start = ABSOLUTE(.);
*(.dport0.data)
*(.dport.data)
_dport0_data_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.data : ALIGN(4)
{
_data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
_data_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.rodata : ALIGN(4)
{
_rodata_start = ABSOLUTE(.);
*(.sdk.version)
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
*(.rodata1)
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame)
/* C++ constructor and destructor tables, properly ordered: */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
. = ALIGN(4); /* this table MUST be 4-byte aligned */
_bss_table_start = ABSOLUTE(.);
LONG(_bss_start)
LONG(_bss_end)
_bss_table_end = ABSOLUTE(.);
_rodata_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
{
. = ALIGN (8);
_bss_start = ABSOLUTE(.);
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
_bss_end = ABSOLUTE(.);
_heap_start = ABSOLUTE(.);
/* _stack_sentry = ALIGN(0x8); */
} >dram0_0_seg :dram0_0_bss_phdr
/* __stack = 0x3ffc8000; */
.text : ALIGN(4)
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.UserEnter.text)
. = ALIGN(16);
*(.DebugExceptionVector.text)
. = ALIGN(16);
*(.NMIExceptionVector.text)
. = ALIGN(16);
*(.KernelExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.UserExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.DoubleExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr
.lit4 : ALIGN(4)
{
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
} >iram1_0_seg :iram1_0_phdr
.irom0.text : ALIGN(4)
{
_irom0_text_start = ABSOLUTE(.);
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
_irom0_text_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr
}
/* get ROM code address */
INCLUDE "../ld/eagle.rom.addr.v6.ld"
sdk/esp_iot_sdk_v1.4.0/ld/eagle.app.v6.old.512.app1.ld
0 → 100644
View file @
a33e3a4a
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */
MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = 0x8000
irom0_0_seg : org = 0x40211000, len = 0x2B000
}
PHDRS
{
dport0_0_phdr PT_LOAD;
dram0_0_phdr PT_LOAD;
dram0_0_bss_phdr PT_LOAD;
iram1_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
}
/* Default entry point: */
ENTRY(call_user_start)
EXTERN(_DebugExceptionVector)
EXTERN(_DoubleExceptionVector)
EXTERN(_KernelExceptionVector)
EXTERN(_NMIExceptionVector)
EXTERN(_UserExceptionVector)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wb_base = 0x00000110;
_memmap_cacheattr_wt_base = 0x00000110;
_memmap_cacheattr_bp_base = 0x00000220;
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
_memmap_cacheattr_wb_trapnull = 0x2222211F;
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
_memmap_cacheattr_wb_allvalid = 0x22222112;
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_allvalid = 0x22222222;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
.dport0.rodata : ALIGN(4)
{
_dport0_rodata_start = ABSOLUTE(.);
*(.dport0.rodata)
*(.dport.rodata)
_dport0_rodata_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.literal : ALIGN(4)
{
_dport0_literal_start = ABSOLUTE(.);
*(.dport0.literal)
*(.dport.literal)
_dport0_literal_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.data : ALIGN(4)
{
_dport0_data_start = ABSOLUTE(.);
*(.dport0.data)
*(.dport.data)
_dport0_data_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.data : ALIGN(4)
{
_data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
_data_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.rodata : ALIGN(4)
{
_rodata_start = ABSOLUTE(.);
*(.sdk.version)
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
*(.rodata1)
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame)
/* C++ constructor and destructor tables, properly ordered: */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
. = ALIGN(4); /* this table MUST be 4-byte aligned */
_bss_table_start = ABSOLUTE(.);
LONG(_bss_start)
LONG(_bss_end)
_bss_table_end = ABSOLUTE(.);
_rodata_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
{
. = ALIGN (8);
_bss_start = ABSOLUTE(.);
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
_bss_end = ABSOLUTE(.);
_heap_start = ABSOLUTE(.);
/* _stack_sentry = ALIGN(0x8); */
} >dram0_0_seg :dram0_0_bss_phdr
/* __stack = 0x3ffc8000; */
.text : ALIGN(4)
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.UserEnter.text)
. = ALIGN(16);
*(.DebugExceptionVector.text)
. = ALIGN(16);
*(.NMIExceptionVector.text)
. = ALIGN(16);
*(.KernelExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.UserExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.DoubleExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr
.lit4 : ALIGN(4)
{
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
} >iram1_0_seg :iram1_0_phdr
.irom0.text : ALIGN(4)
{
_irom0_text_start = ABSOLUTE(.);
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
_irom0_text_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr
}
/* get ROM code address */
INCLUDE "../ld/eagle.rom.addr.v6.ld"
ld/eagle.app.v6.app2.ld
→
sdk/esp_iot_sdk_v1.4.0/
ld/eagle.app.v6.
old.512.
app2.ld
View file @
a33e3a4a
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */
/* Linker Script for ld -N */
MEMORY
MEMORY
{
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = 0x8000
iram1_0_seg : org = 0x40100000, len = 0x8000
irom0_0_seg : org = 0x40251000, len = 0x2B000
irom0_0_seg : org = 0x40251000, len = 0x2B000
}
}
PHDRS
PHDRS
{
{
dport0_0_phdr PT_LOAD;
dport0_0_phdr PT_LOAD;
dram0_0_phdr PT_LOAD;
dram0_0_phdr PT_LOAD;
dram0_0_bss_phdr PT_LOAD;
dram0_0_bss_phdr PT_LOAD;
iram1_0_phdr PT_LOAD;
iram1_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
}
}
/* Default entry point: */
/* Default entry point: */
ENTRY(call_user_start)
ENTRY(call_user_start)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
EXTERN(_DebugExceptionVector)
/* Various memory-map dependent cache attribute settings: */
EXTERN(_DoubleExceptionVector)
_memmap_cacheattr_wb_base = 0x00000110;
EXTERN(_KernelExceptionVector)
_memmap_cacheattr_wt_base = 0x00000110;
EXTERN(_NMIExceptionVector)
_memmap_cacheattr_bp_base = 0x00000220;
EXTERN(_UserExceptionVector)
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
PROVIDE(_memmap_vecbase_reset = 0x40000000);
_memmap_cacheattr_wb_trapnull = 0x2222211F;
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_wb_base = 0x00000110;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wt_base = 0x00000110;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_bp_base = 0x00000220;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
_memmap_cacheattr_wb_trapnull = 0x2222211F;
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wb_allvalid = 0x22222112;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_bp_allvalid = 0x22222222;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
SECTIONS
_memmap_cacheattr_wb_allvalid = 0x22222112;
{
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_allvalid = 0x22222222;
.dport0.rodata : ALIGN(4)
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
{
_dport0_rodata_start = ABSOLUTE(.);
SECTIONS
*(.dport0.rodata)
{
*(.dport.rodata)
_dport0_rodata_end = ABSOLUTE(.);
.dport0.rodata : ALIGN(4)
} >dport0_0_seg :dport0_0_phdr
{
_dport0_rodata_start = ABSOLUTE(.);
.dport0.literal : ALIGN(4)
*(.dport0.rodata)
{
*(.dport.rodata)
_dport0_literal_start = ABSOLUTE(.);
_dport0_rodata_end = ABSOLUTE(.);
*(.dport0.literal)
} >dport0_0_seg :dport0_0_phdr
*(.dport.literal)
_dport0_literal_end = ABSOLUTE(.);
.dport0.literal : ALIGN(4)
} >dport0_0_seg :dport0_0_phdr
{
_dport0_literal_start = ABSOLUTE(.);
.dport0.data : ALIGN(4)
*(.dport0.literal)
{
*(.dport.literal)
_dport0_data_start = ABSOLUTE(.);
_dport0_literal_end = ABSOLUTE(.);
*(.dport0.data)
} >dport0_0_seg :dport0_0_phdr
*(.dport.data)
_dport0_data_end = ABSOLUTE(.);
.dport0.data : ALIGN(4)
} >dport0_0_seg :dport0_0_phdr
{
_dport0_data_start = ABSOLUTE(.);
.data : ALIGN(4)
*(.dport0.data)
{
*(.dport.data)
_data_start = ABSOLUTE(.);
_dport0_data_end = ABSOLUTE(.);
*(.data)
} >dport0_0_seg :dport0_0_phdr
*(.data.*)
*(.gnu.linkonce.d.*)
.data : ALIGN(4)
*(.data1)
{
*(.sdata)
_data_start = ABSOLUTE(.);
*(.sdata.*)
*(.data)
*(.gnu.linkonce.s.*)
*(.data.*)
*(.sdata2)
*(.gnu.linkonce.d.*)
*(.sdata2.*)
*(.data1)
*(.gnu.linkonce.s2.*)
*(.sdata)
*(.jcr)
*(.sdata.*)
_data_end = ABSOLUTE(.);
*(.gnu.linkonce.s.*)
} >dram0_0_seg :dram0_0_phdr
*(.sdata2)
*(.sdata2.*)
.rodata : ALIGN(4)
*(.gnu.linkonce.s2.*)
{
*(.jcr)
_rodata_start = ABSOLUTE(.);
_data_end = ABSOLUTE(.);
*(.rodata)
} >dram0_0_seg :dram0_0_phdr
*(.rodata.*)
*(.gnu.linkonce.r.*)
.rodata : ALIGN(4)
*(.rodata1)
{
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
_rodata_start = ABSOLUTE(.);
*(.xt_except_table)
*(.sdk.version)
*(.gcc_except_table)
*(.rodata)
*(.gnu.linkonce.e.*)
*(.rodata.*)
*(.gnu.version_r)
*(.gnu.linkonce.r.*)
*(.eh_frame)
*(.rodata1)
/* C++ constructor and destructor tables, properly ordered: */
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
KEEP (*crtbegin.o(.ctors))
*(.xt_except_table)
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
*(.gcc_except_table)
KEEP (*(SORT(.ctors.*)))
*(.gnu.linkonce.e.*)
KEEP (*(.ctors))
*(.gnu.version_r)
KEEP (*crtbegin.o(.dtors))
*(.eh_frame)
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
/* C++ constructor and destructor tables, properly ordered: */
KEEP (*(SORT(.dtors.*)))
KEEP (*crtbegin.o(.ctors))
KEEP (*(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
/* C++ exception handlers table: */
KEEP (*(SORT(.ctors.*)))
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
KEEP (*(.ctors))
*(.xt_except_desc)
KEEP (*crtbegin.o(.dtors))
*(.gnu.linkonce.h.*)
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
KEEP (*(SORT(.dtors.*)))
*(.xt_except_desc_end)
KEEP (*(.dtors))
*(.dynamic)
/* C++ exception handlers table: */
*(.gnu.version_d)
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
. = ALIGN(4); /* this table MUST be 4-byte aligned */
*(.xt_except_desc)
_bss_table_start = ABSOLUTE(.);
*(.gnu.linkonce.h.*)
LONG(_bss_start)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
LONG(_bss_end)
*(.xt_except_desc_end)
_bss_table_end = ABSOLUTE(.);
*(.dynamic)
_rodata_end = ABSOLUTE(.);
*(.gnu.version_d)
} >dram0_0_seg :dram0_0_phdr
. = ALIGN(4); /* this table MUST be 4-byte aligned */
_bss_table_start = ABSOLUTE(.);
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
LONG(_bss_start)
{
LONG(_bss_end)
. = ALIGN (8);
_bss_table_end = ABSOLUTE(.);
_bss_start = ABSOLUTE(.);
_rodata_end = ABSOLUTE(.);
*(.dynsbss)
} >dram0_0_seg :dram0_0_phdr
*(.sbss)
*(.sbss.*)
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
*(.gnu.linkonce.sb.*)
{
*(.scommon)
. = ALIGN (8);
*(.sbss2)
_bss_start = ABSOLUTE(.);
*(.sbss2.*)
*(.dynsbss)
*(.gnu.linkonce.sb2.*)
*(.sbss)
*(.dynbss)
*(.sbss.*)
*(.bss)
*(.gnu.linkonce.sb.*)
*(.bss.*)
*(.scommon)
*(.gnu.linkonce.b.*)
*(.sbss2)
*(COMMON)
*(.sbss2.*)
. = ALIGN (8);
*(.gnu.linkonce.sb2.*)
_bss_end = ABSOLUTE(.);
*(.dynbss)
_heap_start = ABSOLUTE(.);
*(.bss)
/* _stack_sentry = ALIGN(0x8); */
*(.bss.*)
} >dram0_0_seg :dram0_0_bss_phdr
*(.gnu.linkonce.b.*)
/* __stack = 0x3ffc8000; */
*(COMMON)
. = ALIGN (8);
.text : ALIGN(4)
_bss_end = ABSOLUTE(.);
{
_heap_start = ABSOLUTE(.);
_stext = .;
/* _stack_sentry = ALIGN(0x8); */
_text_start = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_bss_phdr
*(.entry.text)
/* __stack = 0x3ffc8000; */
*(.init.literal)
*(.init)
.text : ALIGN(4)
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
{
*(.fini.literal)
_stext = .;
*(.fini)
_text_start = ABSOLUTE(.);
*(.gnu.version)
*(.UserEnter.text)
_text_end = ABSOLUTE(.);
. = ALIGN(16);
_etext = .;
*(.DebugExceptionVector.text)
} >iram1_0_seg :iram1_0_phdr
. = ALIGN(16);
*(.NMIExceptionVector.text)
.lit4 : ALIGN(4)
. = ALIGN(16);
{
*(.KernelExceptionVector.text)
_lit4_start = ABSOLUTE(.);
LONG(0)
*(*.lit4)
LONG(0)
*(.lit4.*)
LONG(0)
*(.gnu.linkonce.lit4.*)
LONG(0)
_lit4_end = ABSOLUTE(.);
. = ALIGN(16);
} >iram1_0_seg :iram1_0_phdr
*(.UserExceptionVector.text)
LONG(0)
.irom0.text : ALIGN(4)
LONG(0)
{
LONG(0)
_irom0_text_start = ABSOLUTE(.);
LONG(0)
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
. = ALIGN(16);
_irom0_text_end = ABSOLUTE(.);
*(.DoubleExceptionVector.text)
} >irom0_0_seg :irom0_0_phdr
LONG(0)
}
LONG(0)
LONG(0)
/* get ROM code address */
LONG(0)
INCLUDE "../ld/eagle.rom.addr.v6.ld"
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr
.lit4 : ALIGN(4)
{
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
} >iram1_0_seg :iram1_0_phdr
.irom0.text : ALIGN(4)
{
_irom0_text_start = ABSOLUTE(.);
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
_irom0_text_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr
}
/* get ROM code address */
INCLUDE "../ld/eagle.rom.addr.v6.ld"
ld/eagle.rom.addr.v6.ld
→
sdk/esp_iot_sdk_v1.4.0/
ld/eagle.rom.addr.v6.ld
View file @
a33e3a4a
PROVIDE ( Cache_Read_Disable = 0x400047f0 );
PROVIDE ( Cache_Read_Disable = 0x400047f0 );
PROVIDE ( Cache_Read_Enable = 0x40004678 );
PROVIDE ( Cache_Read_Enable = 0x40004678 );
PROVIDE ( FilePacketSendReqMsgProc = 0x400035a0 );
PROVIDE ( FilePacketSendReqMsgProc = 0x400035a0 );
PROVIDE ( FlashDwnLdParamCfgMsgProc = 0x4000368c );
PROVIDE ( FlashDwnLdParamCfgMsgProc = 0x4000368c );
PROVIDE ( FlashDwnLdStartMsgProc = 0x40003538 );
PROVIDE ( FlashDwnLdStartMsgProc = 0x40003538 );
PROVIDE ( FlashDwnLdStopReqMsgProc = 0x40003658 );
PROVIDE ( FlashDwnLdStopReqMsgProc = 0x40003658 );
PROVIDE ( GetUartDevice = 0x40003f4c );
PROVIDE ( GetUartDevice = 0x40003f4c );
PROVIDE ( MD5Final = 0x40009900 );
PROVIDE ( MD5Final = 0x40009900 );
PROVIDE ( MD5Init = 0x40009818 );
PROVIDE ( MD5Init = 0x40009818 );
PROVIDE ( MD5Update = 0x40009834 );
PROVIDE ( MD5Update = 0x40009834 );
PROVIDE ( MemDwnLdStartMsgProc = 0x400036c4 );
PROVIDE ( MemDwnLdStartMsgProc = 0x400036c4 );
PROVIDE ( MemDwnLdStopReqMsgProc = 0x4000377c );
PROVIDE ( MemDwnLdStopReqMsgProc = 0x4000377c );
PROVIDE ( MemPacketSendReqMsgProc = 0x400036f0 );
PROVIDE ( MemPacketSendReqMsgProc = 0x400036f0 );
PROVIDE ( RcvMsg = 0x40003eac );
PROVIDE ( RcvMsg = 0x40003eac );
PROVIDE ( SHA1Final = 0x4000b648 );
PROVIDE ( SHA1Final = 0x4000b648 );
PROVIDE ( SHA1Init = 0x4000b584 );
PROVIDE ( SHA1Init = 0x4000b584 );
PROVIDE ( SHA1Transform = 0x4000a364 );
PROVIDE ( SHA1Transform = 0x4000a364 );
PROVIDE ( SHA1Update = 0x4000b5a8 );
PROVIDE ( SHA1Update = 0x4000b5a8 );
PROVIDE ( SPI_read_status = 0x400043c8 );
PROVIDE ( SPI_read_status = 0x400043c8 );
PROVIDE ( SPI_write_status = 0x40004400 );
PROVIDE ( SPI_write_status = 0x40004400 );
PROVIDE ( SPI_write_enable = 0x4000443c );
PROVIDE ( SPI_write_enable = 0x4000443c );
PROVIDE ( Wait_SPI_Idle = 0x4000448c );
PROVIDE ( Wait_SPI_Idle = 0x4000448c );
PROVIDE ( SPIEraseArea = 0x40004b44 );
PROVIDE ( SPIEraseArea = 0x40004b44 );
PROVIDE ( SPIEraseBlock = 0x400049b4 );
PROVIDE ( SPIEraseBlock = 0x400049b4 );
PROVIDE ( SPIEraseChip = 0x40004984 );
PROVIDE ( SPIEraseChip = 0x40004984 );
PROVIDE ( SPIEraseSector = 0x40004a00 );
PROVIDE ( SPIEraseSector = 0x40004a00 );
PROVIDE ( SPILock = 0x400048a8 );
PROVIDE ( SPILock = 0x400048a8 );
PROVIDE ( SPIParamCfg = 0x40004c2c );
PROVIDE ( SPIParamCfg = 0x40004c2c );
PROVIDE ( SPIRead = 0x40004b1c );
PROVIDE ( SPIRead = 0x40004b1c );
PROVIDE ( SPIReadModeCnfig = 0x400048ec );
PROVIDE ( SPIReadModeCnfig = 0x400048ec );
PROVIDE ( SPIUnlock = 0x40004878 );
PROVIDE ( SPIUnlock = 0x40004878 );
PROVIDE ( SPIWrite = 0x40004a4c );
PROVIDE ( SPIWrite = 0x40004a4c );
PROVIDE ( SelectSpiFunction = 0x40003f58 );
PROVIDE ( SelectSpiFunction = 0x40003f58 );
PROVIDE ( SendMsg = 0x40003cf4 );
PROVIDE ( SendMsg = 0x40003cf4 );
PROVIDE ( UartConnCheck = 0x40003230 );
PROVIDE ( UartConnCheck = 0x40003230 );
PROVIDE ( UartConnectProc = 0x400037a0 );
PROVIDE ( UartConnectProc = 0x400037a0 );
PROVIDE ( UartDwnLdProc = 0x40003368 );
PROVIDE ( UartDwnLdProc = 0x40003368 );
PROVIDE ( UartGetCmdLn = 0x40003ef4 );
PROVIDE ( UartGetCmdLn = 0x40003ef4 );
PROVIDE ( UartRegReadProc = 0x4000381c );
PROVIDE ( UartRegReadProc = 0x4000381c );
PROVIDE ( UartRegWriteProc = 0x400037ac );
PROVIDE ( UartRegWriteProc = 0x400037ac );
PROVIDE ( UartRxString = 0x40003c30 );
PROVIDE ( UartRxString = 0x40003c30 );
PROVIDE ( Uart_Init = 0x40003a14 );
PROVIDE ( Uart_Init = 0x40003a14 );
PROVIDE ( _DebugExceptionVector = 0x40000010 );
PROVIDE ( _DebugExceptionVector = 0x40000010 );
PROVIDE ( _DoubleExceptionVector = 0x40000070 );
PROVIDE ( _DoubleExceptionVector = 0x40000070 );
PROVIDE ( _KernelExceptionVector = 0x40000030 );
PROVIDE ( _KernelExceptionVector = 0x40000030 );
PROVIDE ( _NMIExceptionVector = 0x40000020 );
PROVIDE ( _NMIExceptionVector = 0x40000020 );
PROVIDE ( _ResetHandler = 0x400000a4 );
PROVIDE ( _ResetHandler = 0x400000a4 );
PROVIDE ( _ResetVector = 0x40000080 );
PROVIDE ( _ResetVector = 0x40000080 );
PROVIDE ( _UserExceptionVector = 0x40000050 );
PROVIDE ( _UserExceptionVector = 0x40000050 );
PROVIDE ( __adddf3 = 0x4000c538 );
PROVIDE ( __adddf3 = 0x4000c538 );
PROVIDE ( __addsf3 = 0x4000c180 );
PROVIDE ( __addsf3 = 0x4000c180 );
PROVIDE ( __divdf3 = 0x4000cb94 );
PROVIDE ( __divdf3 = 0x4000cb94 );
PROVIDE ( __divdi3 = 0x4000ce60 );
PROVIDE ( __divdi3 = 0x4000ce60 );
PROVIDE ( __divsi3 = 0x4000dc88 );
PROVIDE ( __divsi3 = 0x4000dc88 );
PROVIDE ( __extendsfdf2 = 0x4000cdfc );
PROVIDE ( __extendsfdf2 = 0x4000cdfc );
PROVIDE ( __fixdfsi = 0x4000ccb8 );
PROVIDE ( __fixdfsi = 0x4000ccb8 );
PROVIDE ( __fixunsdfsi = 0x4000cd00 );
PROVIDE ( __fixunsdfsi = 0x4000cd00 );
PROVIDE ( __fixunssfsi = 0x4000c4c4 );
PROVIDE ( __fixunssfsi = 0x4000c4c4 );
PROVIDE ( __floatsidf = 0x4000e2f0 );
PROVIDE ( __floatsidf = 0x4000e2f0 );
PROVIDE ( __floatsisf = 0x4000e2ac );
PROVIDE ( __floatsisf = 0x4000e2ac );
PROVIDE ( __floatunsidf = 0x4000e2e8 );
PROVIDE ( __floatunsidf = 0x4000e2e8 );
PROVIDE ( __floatunsisf = 0x4000e2a4 );
PROVIDE ( __floatunsisf = 0x4000e2a4 );
PROVIDE ( __muldf3 = 0x4000c8f0 );
PROVIDE ( __muldf3 = 0x4000c8f0 );
PROVIDE ( __muldi3 = 0x40000650 );
PROVIDE ( __muldi3 = 0x40000650 );
PROVIDE ( __mulsf3 = 0x4000c3dc );
PROVIDE ( __mulsf3 = 0x4000c3dc );
PROVIDE ( __subdf3 = 0x4000c688 );
PROVIDE ( __subdf3 = 0x4000c688 );
PROVIDE ( __subsf3 = 0x4000c268 );
PROVIDE ( __subsf3 = 0x4000c268 );
PROVIDE ( __truncdfsf2 = 0x4000cd5c );
PROVIDE ( __truncdfsf2 = 0x4000cd5c );
PROVIDE ( __udivdi3 = 0x4000d310 );
PROVIDE ( __udivdi3 = 0x4000d310 );
PROVIDE ( __udivsi3 = 0x4000e21c );
PROVIDE ( __udivsi3 = 0x4000e21c );
PROVIDE ( __umoddi3 = 0x4000d770 );
PROVIDE ( __umoddi3 = 0x4000d770 );
PROVIDE ( __umodsi3 = 0x4000e268 );
PROVIDE ( __umodsi3 = 0x4000e268 );
PROVIDE ( __umulsidi3 = 0x4000dcf0 );
PROVIDE ( __umulsidi3 = 0x4000dcf0 );
PROVIDE ( _rom_store = 0x4000e388 );
PROVIDE ( _rom_store = 0x4000e388 );
PROVIDE ( _rom_store_table = 0x4000e328 );
PROVIDE ( _rom_store_table = 0x4000e328 );
PROVIDE ( _start = 0x4000042c );
PROVIDE ( _start = 0x4000042c );
PROVIDE ( _xtos_alloca_handler = 0x4000dbe0 );
PROVIDE ( _xtos_alloca_handler = 0x4000dbe0 );
PROVIDE ( _xtos_c_wrapper_handler = 0x40000598 );
PROVIDE ( _xtos_c_wrapper_handler = 0x40000598 );
PROVIDE ( _xtos_cause3_handler = 0x40000590 );
PROVIDE ( _xtos_cause3_handler = 0x40000590 );
PROVIDE ( _xtos_ints_off = 0x4000bda4 );
PROVIDE ( _xtos_ints_off = 0x4000bda4 );
PROVIDE ( _xtos_ints_on = 0x4000bd84 );
PROVIDE ( _xtos_ints_on = 0x4000bd84 );
PROVIDE ( _xtos_l1int_handler = 0x4000048c );
PROVIDE ( _xtos_l1int_handler = 0x4000048c );
PROVIDE ( _xtos_p_none = 0x4000dbf8 );
PROVIDE ( _xtos_p_none = 0x4000dbf8 );
PROVIDE ( _xtos_restore_intlevel = 0x4000056c );
PROVIDE ( _xtos_restore_intlevel = 0x4000056c );
PROVIDE ( _xtos_return_from_exc = 0x4000dc54 );
PROVIDE ( _xtos_return_from_exc = 0x4000dc54 );
PROVIDE ( _xtos_set_exception_handler = 0x40000454 );
PROVIDE ( _xtos_set_exception_handler = 0x40000454 );
PROVIDE ( _xtos_set_interrupt_handler = 0x4000bd70 );
PROVIDE ( _xtos_set_interrupt_handler = 0x4000bd70 );
PROVIDE ( _xtos_set_interrupt_handler_arg = 0x4000bd28 );
PROVIDE ( _xtos_set_interrupt_handler_arg = 0x4000bd28 );
PROVIDE ( _xtos_set_intlevel = 0x4000dbfc );
PROVIDE ( _xtos_set_intlevel = 0x4000dbfc );
PROVIDE ( _xtos_set_min_intlevel = 0x4000dc18 );
PROVIDE ( _xtos_set_min_intlevel = 0x4000dc18 );
PROVIDE ( _xtos_set_vpri = 0x40000574 );
PROVIDE ( _xtos_set_vpri = 0x40000574 );
PROVIDE ( _xtos_syscall_handler = 0x4000dbe4 );
PROVIDE ( _xtos_syscall_handler = 0x4000dbe4 );
PROVIDE ( _xtos_unhandled_exception = 0x4000dc44 );
PROVIDE ( _xtos_unhandled_exception = 0x4000dc44 );
PROVIDE ( _xtos_unhandled_interrupt = 0x4000dc3c );
PROVIDE ( _xtos_unhandled_interrupt = 0x4000dc3c );
PROVIDE ( aes_decrypt = 0x400092d4 );
PROVIDE ( aes_decrypt = 0x400092d4 );
PROVIDE ( aes_decrypt_deinit = 0x400092e4 );
PROVIDE ( aes_decrypt_deinit = 0x400092e4 );
PROVIDE ( aes_decrypt_init = 0x40008ea4 );
PROVIDE ( aes_decrypt_init = 0x40008ea4 );
PROVIDE ( aes_unwrap = 0x40009410 );
PROVIDE ( aes_unwrap = 0x40009410 );
PROVIDE ( base64_decode = 0x40009648 );
PROVIDE ( base64_decode = 0x40009648 );
PROVIDE ( base64_encode = 0x400094fc );
PROVIDE ( base64_encode = 0x400094fc );
PROVIDE ( bzero = 0x4000de84 );
PROVIDE ( bzero = 0x4000de84 );
PROVIDE ( cmd_parse = 0x40000814 );
PROVIDE ( cmd_parse = 0x40000814 );
PROVIDE ( conv_str_decimal = 0x40000b24 );
PROVIDE ( conv_str_decimal = 0x40000b24 );
PROVIDE ( conv_str_hex = 0x40000cb8 );
PROVIDE ( conv_str_hex = 0x40000cb8 );
PROVIDE ( convert_para_str = 0x40000a60 );
PROVIDE ( convert_para_str = 0x40000a60 );
PROVIDE ( dtm_get_intr_mask = 0x400026d0 );
PROVIDE ( dtm_get_intr_mask = 0x400026d0 );
PROVIDE ( dtm_params_init = 0x4000269c );
PROVIDE ( dtm_params_init = 0x4000269c );
PROVIDE ( dtm_set_intr_mask = 0x400026c8 );
PROVIDE ( dtm_set_intr_mask = 0x400026c8 );
PROVIDE ( dtm_set_params = 0x400026dc );
PROVIDE ( dtm_set_params = 0x400026dc );
PROVIDE ( eprintf = 0x40001d14 );
PROVIDE ( eprintf = 0x40001d14 );
PROVIDE ( eprintf_init_buf = 0x40001cb8 );
PROVIDE ( eprintf_init_buf = 0x40001cb8 );
PROVIDE ( eprintf_to_host = 0x40001d48 );
PROVIDE ( eprintf_to_host = 0x40001d48 );
PROVIDE ( est_get_printf_buf_remain_len = 0x40002494 );
PROVIDE ( est_get_printf_buf_remain_len = 0x40002494 );
PROVIDE ( est_reset_printf_buf_len = 0x4000249c );
PROVIDE ( est_reset_printf_buf_len = 0x4000249c );
PROVIDE ( ets_bzero = 0x40002ae8 );
PROVIDE ( ets_bzero = 0x40002ae8 );
PROVIDE ( ets_char2xdigit = 0x40002b74 );
PROVIDE ( ets_char2xdigit = 0x40002b74 );
PROVIDE ( ets_delay_us = 0x40002ecc );
PROVIDE ( ets_delay_us = 0x40002ecc );
PROVIDE ( ets_enter_sleep = 0x400027b8 );
PROVIDE ( ets_enter_sleep = 0x400027b8 );
PROVIDE ( ets_external_printf = 0x40002578 );
PROVIDE ( ets_external_printf = 0x40002578 );
PROVIDE ( ets_get_cpu_frequency = 0x40002f0c );
PROVIDE ( ets_get_cpu_frequency = 0x40002f0c );
PROVIDE ( ets_getc = 0x40002bcc );
PROVIDE ( ets_getc = 0x40002bcc );
PROVIDE ( ets_install_external_printf = 0x40002450 );
PROVIDE ( ets_install_external_printf = 0x40002450 );
PROVIDE ( ets_install_putc1 = 0x4000242c );
PROVIDE ( ets_install_putc1 = 0x4000242c );
PROVIDE ( ets_install_putc2 = 0x4000248c );
PROVIDE ( ets_install_putc2 = 0x4000248c );
PROVIDE ( ets_install_uart_printf = 0x40002438 );
PROVIDE ( ets_install_uart_printf = 0x40002438 );
PROVIDE ( ets_intr_lock = 0x40000f74 );
PROVIDE ( ets_intr_lock = 0x40000f74 );
PROVIDE ( ets_intr_unlock = 0x40000f80 );
PROVIDE ( ets_intr_unlock = 0x40000f80 );
PROVIDE ( ets_isr_attach = 0x40000f88 );
PROVIDE ( ets_isr_attach = 0x40000f88 );
PROVIDE ( ets_isr_mask = 0x40000f98 );
PROVIDE ( ets_isr_mask = 0x40000f98 );
PROVIDE ( ets_isr_unmask = 0x40000fa8 );
PROVIDE ( ets_isr_unmask = 0x40000fa8 );
PROVIDE ( ets_memcmp = 0x400018d4 );
PROVIDE ( ets_memcmp = 0x400018d4 );
PROVIDE ( ets_memcpy = 0x400018b4 );
PROVIDE ( ets_memcpy = 0x400018b4 );
PROVIDE ( ets_memmove = 0x400018c4 );
PROVIDE ( ets_memmove = 0x400018c4 );
PROVIDE ( ets_memset = 0x400018a4 );
PROVIDE ( ets_memset = 0x400018a4 );
PROVIDE ( ets_post = 0x40000e24 );
PROVIDE ( ets_post = 0x40000e24 );
PROVIDE ( ets_printf = 0x400024cc );
PROVIDE ( ets_printf = 0x400024cc );
PROVIDE ( ets_putc = 0x40002be8 );
PROVIDE ( ets_putc = 0x40002be8 );
PROVIDE ( ets_rtc_int_register = 0x40002a40 );
PROVIDE ( ets_rtc_int_register = 0x40002a40 );
PROVIDE ( ets_run = 0x40000e04 );
PROVIDE ( ets_run = 0x40000e04 );
PROVIDE ( ets_set_idle_cb = 0x40000dc0 );
PROVIDE ( ets_set_idle_cb = 0x40000dc0 );
PROVIDE ( ets_set_user_start = 0x40000fbc );
PROVIDE ( ets_set_user_start = 0x40000fbc );
PROVIDE ( ets_str2macaddr = 0x40002af8 );
PROVIDE ( ets_str2macaddr = 0x40002af8 );
PROVIDE ( ets_strcmp = 0x40002aa8 );
PROVIDE ( ets_strcmp = 0x40002aa8 );
PROVIDE ( ets_strcpy = 0x40002a88 );
PROVIDE ( ets_strcpy = 0x40002a88 );
PROVIDE ( ets_strlen = 0x40002ac8 );
PROVIDE ( ets_strlen = 0x40002ac8 );
PROVIDE ( ets_strncmp = 0x40002ab8 );
PROVIDE ( ets_strncmp = 0x40002ab8 );
PROVIDE ( ets_strncpy = 0x40002a98 );
PROVIDE ( ets_strncpy = 0x40002a98 );
PROVIDE ( ets_strstr = 0x40002ad8 );
PROVIDE ( ets_strstr = 0x40002ad8 );
PROVIDE ( ets_task = 0x40000dd0 );
PROVIDE ( ets_task = 0x40000dd0 );
PROVIDE ( ets_timer_arm = 0x40002cc4 );
PROVIDE ( ets_timer_arm = 0x40002cc4 );
PROVIDE ( ets_timer_disarm = 0x40002d40 );
PROVIDE ( ets_timer_disarm = 0x40002d40 );
PROVIDE ( ets_timer_done = 0x40002d80 );
PROVIDE ( ets_timer_done = 0x40002d80 );
PROVIDE ( ets_timer_handler_isr = 0x40002da8 );
PROVIDE ( ets_timer_handler_isr = 0x40002da8 );
PROVIDE ( ets_timer_init = 0x40002e68 );
PROVIDE ( ets_timer_init = 0x40002e68 );
PROVIDE ( ets_timer_setfn = 0x40002c48 );
PROVIDE ( ets_timer_setfn = 0x40002c48 );
PROVIDE ( ets_uart_printf = 0x40002544 );
PROVIDE ( ets_uart_printf = 0x40002544 );
PROVIDE ( ets_update_cpu_frequency = 0x40002f04 );
PROVIDE ( ets_update_cpu_frequency = 0x40002f04 );
PROVIDE ( ets_vprintf = 0x40001f00 );
PROVIDE ( ets_vprintf = 0x40001f00 );
PROVIDE ( ets_wdt_disable = 0x400030f0 );
PROVIDE ( ets_wdt_disable = 0x400030f0 );
PROVIDE ( ets_wdt_enable = 0x40002fa0 );
PROVIDE ( ets_wdt_enable = 0x40002fa0 );
PROVIDE ( ets_wdt_get_mode = 0x40002f34 );
PROVIDE ( ets_wdt_get_mode = 0x40002f34 );
PROVIDE ( ets_wdt_init = 0x40003170 );
PROVIDE ( ets_wdt_init = 0x40003170 );
PROVIDE ( ets_wdt_restore = 0x40003158 );
PROVIDE ( ets_wdt_restore = 0x40003158 );
PROVIDE ( ets_write_char = 0x40001da0 );
PROVIDE ( ets_write_char = 0x40001da0 );
PROVIDE ( get_first_seg = 0x4000091c );
PROVIDE ( get_first_seg = 0x4000091c );
PROVIDE ( gpio_init = 0x40004c50 );
PROVIDE ( gpio_init = 0x40004c50 );
PROVIDE ( gpio_input_get = 0x40004cf0 );
PROVIDE ( gpio_input_get = 0x40004cf0 );
PROVIDE ( gpio_intr_ack = 0x40004dcc );
PROVIDE ( gpio_intr_ack = 0x40004dcc );
PROVIDE ( gpio_intr_handler_register = 0x40004e28 );
PROVIDE ( gpio_intr_handler_register = 0x40004e28 );
PROVIDE ( gpio_intr_pending = 0x40004d88 );
PROVIDE ( gpio_intr_pending = 0x40004d88 );
PROVIDE ( gpio_intr_test = 0x40004efc );
PROVIDE ( gpio_intr_test = 0x40004efc );
PROVIDE ( gpio_output_set = 0x40004cd0 );
PROVIDE ( gpio_output_set = 0x40004cd0 );
PROVIDE ( gpio_pin_intr_state_set = 0x40004d90 );
PROVIDE ( gpio_pin_intr_state_set = 0x40004d90 );
PROVIDE ( gpio_pin_wakeup_disable = 0x40004ed4 );
PROVIDE ( gpio_pin_wakeup_disable = 0x40004ed4 );
PROVIDE ( gpio_pin_wakeup_enable = 0x40004e90 );
PROVIDE ( gpio_pin_wakeup_enable = 0x40004e90 );
PROVIDE ( gpio_register_get = 0x40004d5c );
PROVIDE ( gpio_register_get = 0x40004d5c );
PROVIDE ( gpio_register_set = 0x40004d04 );
PROVIDE ( gpio_register_set = 0x40004d04 );
PROVIDE ( hmac_md5 = 0x4000a2cc );
PROVIDE ( hmac_md5 = 0x4000a2cc );
PROVIDE ( hmac_md5_vector = 0x4000a160 );
PROVIDE ( hmac_md5_vector = 0x4000a160 );
PROVIDE ( hmac_sha1 = 0x4000ba28 );
PROVIDE ( hmac_sha1 = 0x4000ba28 );
PROVIDE ( hmac_sha1_vector = 0x4000b8b4 );
PROVIDE ( hmac_sha1_vector = 0x4000b8b4 );
PROVIDE ( lldesc_build_chain = 0x40004f40 );
PROVIDE ( lldesc_build_chain = 0x40004f40 );
PROVIDE ( lldesc_num2link = 0x40005050 );
PROVIDE ( lldesc_num2link = 0x40005050 );
PROVIDE ( lldesc_set_owner = 0x4000507c );
PROVIDE ( lldesc_set_owner = 0x4000507c );
PROVIDE ( main = 0x40000fec );
PROVIDE ( main = 0x40000fec );
PROVIDE ( md5_vector = 0x400097ac );
PROVIDE ( md5_vector = 0x400097ac );
PROVIDE ( mem_calloc = 0x40001c2c );
PROVIDE ( mem_calloc = 0x40001c2c );
PROVIDE ( mem_free = 0x400019e0 );
PROVIDE ( mem_free = 0x400019e0 );
PROVIDE ( mem_init = 0x40001998 );
PROVIDE ( mem_init = 0x40001998 );
PROVIDE ( mem_malloc = 0x40001b40 );
PROVIDE ( mem_malloc = 0x40001b40 );
PROVIDE ( mem_realloc = 0x40001c6c );
PROVIDE ( mem_realloc = 0x40001c6c );
PROVIDE ( mem_trim = 0x40001a14 );
PROVIDE ( mem_trim = 0x40001a14 );
PROVIDE ( mem_zalloc = 0x40001c58 );
PROVIDE ( mem_zalloc = 0x40001c58 );
PROVIDE ( memcmp = 0x4000dea8 );
PROVIDE ( memcmp = 0x4000dea8 );
PROVIDE ( memcpy = 0x4000df48 );
PROVIDE ( memcpy = 0x4000df48 );
PROVIDE ( memmove = 0x4000e04c );
PROVIDE ( memmove = 0x4000e04c );
PROVIDE ( memset = 0x4000e190 );
PROVIDE ( memset = 0x4000e190 );
PROVIDE ( multofup = 0x400031c0 );
PROVIDE ( multofup = 0x400031c0 );
PROVIDE ( pbkdf2_sha1 = 0x4000b840 );
PROVIDE ( pbkdf2_sha1 = 0x4000b840 );
PROVIDE ( phy_get_romfuncs = 0x40006b08 );
PROVIDE ( phy_get_romfuncs = 0x40006b08 );
PROVIDE ( rand = 0x40000600 );
PROVIDE ( rand = 0x40000600 );
PROVIDE ( rc4_skip = 0x4000dd68 );
PROVIDE ( rc4_skip = 0x4000dd68 );
PROVIDE ( recv_packet = 0x40003d08 );
PROVIDE ( recv_packet = 0x40003d08 );
PROVIDE ( remove_head_space = 0x40000a04 );
PROVIDE ( remove_head_space = 0x40000a04 );
PROVIDE ( rijndaelKeySetupDec = 0x40008dd0 );
PROVIDE ( rijndaelKeySetupDec = 0x40008dd0 );
PROVIDE ( rijndaelKeySetupEnc = 0x40009300 );
PROVIDE ( rijndaelKeySetupEnc = 0x40009300 );
PROVIDE ( rom_abs_temp = 0x400060c0 );
PROVIDE ( rom_abs_temp = 0x400060c0 );
PROVIDE ( rom_ana_inf_gating_en = 0x40006b10 );
PROVIDE ( rom_ana_inf_gating_en = 0x40006b10 );
PROVIDE ( rom_cal_tos_v50 = 0x40007a28 );
PROVIDE ( rom_cal_tos_v50 = 0x40007a28 );
PROVIDE ( rom_chip_50_set_channel = 0x40006f84 );
PROVIDE ( rom_chip_50_set_channel = 0x40006f84 );
PROVIDE ( rom_chip_v5_disable_cca = 0x400060d0 );
PROVIDE ( rom_chip_v5_disable_cca = 0x400060d0 );
PROVIDE ( rom_chip_v5_enable_cca = 0x400060ec );
PROVIDE ( rom_chip_v5_enable_cca = 0x400060ec );
PROVIDE ( rom_chip_v5_rx_init = 0x4000711c );
PROVIDE ( rom_chip_v5_rx_init = 0x4000711c );
PROVIDE ( rom_chip_v5_sense_backoff = 0x4000610c );
PROVIDE ( rom_chip_v5_sense_backoff = 0x4000610c );
PROVIDE ( rom_chip_v5_tx_init = 0x4000718c );
PROVIDE ( rom_chip_v5_tx_init = 0x4000718c );
PROVIDE ( rom_dc_iq_est = 0x4000615c );
PROVIDE ( rom_dc_iq_est = 0x4000615c );
PROVIDE ( rom_en_pwdet = 0x400061b8 );
PROVIDE ( rom_en_pwdet = 0x400061b8 );
PROVIDE ( rom_get_bb_atten = 0x40006238 );
PROVIDE ( rom_get_bb_atten = 0x40006238 );
PROVIDE ( rom_get_corr_power = 0x40006260 );
PROVIDE ( rom_get_corr_power = 0x40006260 );
PROVIDE ( rom_get_fm_sar_dout = 0x400062dc );
PROVIDE ( rom_get_fm_sar_dout = 0x400062dc );
PROVIDE ( rom_get_noisefloor = 0x40006394 );
PROVIDE ( rom_get_noisefloor = 0x40006394 );
PROVIDE ( rom_get_power_db = 0x400063b0 );
PROVIDE ( rom_get_power_db = 0x400063b0 );
PROVIDE ( rom_i2c_readReg = 0x40007268 );
PROVIDE ( rom_i2c_readReg = 0x40007268 );
PROVIDE ( rom_i2c_readReg_Mask = 0x4000729c );
PROVIDE ( rom_i2c_readReg_Mask = 0x4000729c );
PROVIDE ( rom_i2c_writeReg = 0x400072d8 );
PROVIDE ( rom_i2c_writeReg = 0x400072d8 );
PROVIDE ( rom_i2c_writeReg_Mask = 0x4000730c );
PROVIDE ( rom_i2c_writeReg_Mask = 0x4000730c );
PROVIDE ( rom_iq_est_disable = 0x40006400 );
PROVIDE ( rom_iq_est_disable = 0x40006400 );
PROVIDE ( rom_iq_est_enable = 0x40006430 );
PROVIDE ( rom_iq_est_enable = 0x40006430 );
PROVIDE ( rom_linear_to_db = 0x40006484 );
PROVIDE ( rom_linear_to_db = 0x40006484 );
PROVIDE ( rom_mhz2ieee = 0x400065a4 );
PROVIDE ( rom_mhz2ieee = 0x400065a4 );
PROVIDE ( rom_pbus_dco___SA2 = 0x40007bf0 );
PROVIDE ( rom_pbus_dco___SA2 = 0x40007bf0 );
PROVIDE ( rom_pbus_debugmode = 0x4000737c );
PROVIDE ( rom_pbus_debugmode = 0x4000737c );
PROVIDE ( rom_pbus_enter_debugmode = 0x40007410 );
PROVIDE ( rom_pbus_enter_debugmode = 0x40007410 );
PROVIDE ( rom_pbus_exit_debugmode = 0x40007448 );
PROVIDE ( rom_pbus_exit_debugmode = 0x40007448 );
PROVIDE ( rom_pbus_force_test = 0x4000747c );
PROVIDE ( rom_pbus_force_test = 0x4000747c );
PROVIDE ( rom_pbus_rd = 0x400074d8 );
PROVIDE ( rom_pbus_rd = 0x400074d8 );
PROVIDE ( rom_pbus_set_rxgain = 0x4000754c );
PROVIDE ( rom_pbus_set_rxgain = 0x4000754c );
PROVIDE ( rom_pbus_set_txgain = 0x40007610 );
PROVIDE ( rom_pbus_set_txgain = 0x40007610 );
PROVIDE ( rom_pbus_workmode = 0x40007648 );
PROVIDE ( rom_pbus_workmode = 0x40007648 );
PROVIDE ( rom_pbus_xpd_rx_off = 0x40007688 );
PROVIDE ( rom_pbus_xpd_rx_off = 0x40007688 );
PROVIDE ( rom_pbus_xpd_rx_on = 0x400076cc );
PROVIDE ( rom_pbus_xpd_rx_on = 0x400076cc );
PROVIDE ( rom_pbus_xpd_tx_off = 0x400076fc );
PROVIDE ( rom_pbus_xpd_tx_off = 0x400076fc );
PROVIDE ( rom_pbus_xpd_tx_on = 0x40007740 );
PROVIDE ( rom_pbus_xpd_tx_on = 0x40007740 );
PROVIDE ( rom_pbus_xpd_tx_on__low_gain = 0x400077a0 );
PROVIDE ( rom_pbus_xpd_tx_on__low_gain = 0x400077a0 );
PROVIDE ( rom_phy_reset_req = 0x40007804 );
PROVIDE ( rom_phy_reset_req = 0x40007804 );
PROVIDE ( rom_restart_cal = 0x4000781c );
PROVIDE ( rom_restart_cal = 0x4000781c );
PROVIDE ( rom_rfcal_pwrctrl = 0x40007eb4 );
PROVIDE ( rom_rfcal_pwrctrl = 0x40007eb4 );
PROVIDE ( rom_rfcal_rxiq = 0x4000804c );
PROVIDE ( rom_rfcal_rxiq = 0x4000804c );
PROVIDE ( rom_rfcal_rxiq_set_reg = 0x40008264 );
PROVIDE ( rom_rfcal_rxiq_set_reg = 0x40008264 );
PROVIDE ( rom_rfcal_txcap = 0x40008388 );
PROVIDE ( rom_rfcal_txcap = 0x40008388 );
PROVIDE ( rom_rfcal_txiq = 0x40008610 );
PROVIDE ( rom_rfcal_txiq = 0x40008610 );
PROVIDE ( rom_rfcal_txiq_cover = 0x400088b8 );
PROVIDE ( rom_rfcal_txiq_cover = 0x400088b8 );
PROVIDE ( rom_rfcal_txiq_set_reg = 0x40008a70 );
PROVIDE ( rom_rfcal_txiq_set_reg = 0x40008a70 );
PROVIDE ( rom_rfpll_reset = 0x40007868 );
PROVIDE ( rom_rfpll_reset = 0x40007868 );
PROVIDE ( rom_rfpll_set_freq = 0x40007968 );
PROVIDE ( rom_rfpll_set_freq = 0x40007968 );
PROVIDE ( rom_rxiq_cover_mg_mp = 0x40008b6c );
PROVIDE ( rom_rxiq_cover_mg_mp = 0x40008b6c );
PROVIDE ( rom_rxiq_get_mis = 0x40006628 );
PROVIDE ( rom_rxiq_get_mis = 0x40006628 );
PROVIDE ( rom_sar_init = 0x40006738 );
PROVIDE ( rom_sar_init = 0x40006738 );
PROVIDE ( rom_set_ana_inf_tx_scale = 0x4000678c );
PROVIDE ( rom_set_ana_inf_tx_scale = 0x4000678c );
PROVIDE ( rom_set_channel_freq = 0x40006c50 );
PROVIDE ( rom_set_channel_freq = 0x40006c50 );
PROVIDE ( rom_set_loopback_gain = 0x400067c8 );
PROVIDE ( rom_set_loopback_gain = 0x400067c8 );
PROVIDE ( rom_set_noise_floor = 0x40006830 );
PROVIDE ( rom_set_noise_floor = 0x40006830 );
PROVIDE ( rom_set_rxclk_en = 0x40006550 );
PROVIDE ( rom_set_rxclk_en = 0x40006550 );
PROVIDE ( rom_set_txbb_atten = 0x40008c6c );
PROVIDE ( rom_set_txbb_atten = 0x40008c6c );
PROVIDE ( rom_set_txclk_en = 0x4000650c );
PROVIDE ( rom_set_txclk_en = 0x4000650c );
PROVIDE ( rom_set_txiq_cal = 0x40008d34 );
PROVIDE ( rom_set_txiq_cal = 0x40008d34 );
PROVIDE ( rom_start_noisefloor = 0x40006874 );
PROVIDE ( rom_start_noisefloor = 0x40006874 );
PROVIDE ( rom_start_tx_tone = 0x400068b4 );
PROVIDE ( rom_start_tx_tone = 0x400068b4 );
PROVIDE ( rom_stop_tx_tone = 0x4000698c );
PROVIDE ( rom_stop_tx_tone = 0x4000698c );
PROVIDE ( rom_tx_mac_disable = 0x40006a98 );
PROVIDE ( rom_tx_mac_disable = 0x40006a98 );
PROVIDE ( rom_tx_mac_enable = 0x40006ad4 );
PROVIDE ( rom_tx_mac_enable = 0x40006ad4 );
PROVIDE ( rom_txtone_linear_pwr = 0x40006a1c );
PROVIDE ( rom_txtone_linear_pwr = 0x40006a1c );
PROVIDE ( rom_write_rfpll_sdm = 0x400078dc );
PROVIDE ( rom_write_rfpll_sdm = 0x400078dc );
PROVIDE ( roundup2 = 0x400031b4 );
PROVIDE ( roundup2 = 0x400031b4 );
PROVIDE ( rtc_enter_sleep = 0x40002870 );
PROVIDE ( rtc_enter_sleep = 0x40002870 );
PROVIDE ( rtc_get_reset_reason = 0x400025e0 );
PROVIDE ( rtc_get_reset_reason = 0x400025e0 );
PROVIDE ( rtc_intr_handler = 0x400029ec );
PROVIDE ( rtc_intr_handler = 0x400029ec );
PROVIDE ( rtc_set_sleep_mode = 0x40002668 );
PROVIDE ( rtc_set_sleep_mode = 0x40002668 );
PROVIDE ( save_rxbcn_mactime = 0x400027a4 );
PROVIDE ( save_rxbcn_mactime = 0x400027a4 );
PROVIDE ( save_tsf_us = 0x400027ac );
PROVIDE ( save_tsf_us = 0x400027ac );
PROVIDE ( send_packet = 0x40003c80 );
PROVIDE ( send_packet = 0x40003c80 );
PROVIDE ( sha1_prf = 0x4000ba48 );
PROVIDE ( sha1_prf = 0x4000ba48 );
PROVIDE ( sha1_vector = 0x4000a2ec );
PROVIDE ( sha1_vector = 0x4000a2ec );
PROVIDE ( sip_alloc_to_host_evt = 0x40005180 );
PROVIDE ( sip_alloc_to_host_evt = 0x40005180 );
PROVIDE ( sip_get_ptr = 0x400058a8 );
PROVIDE ( sip_get_ptr = 0x400058a8 );
PROVIDE ( sip_get_state = 0x40005668 );
PROVIDE ( sip_get_state = 0x40005668 );
PROVIDE ( sip_init_attach = 0x4000567c );
PROVIDE ( sip_init_attach = 0x4000567c );
PROVIDE ( sip_install_rx_ctrl_cb = 0x4000544c );
PROVIDE ( sip_install_rx_ctrl_cb = 0x4000544c );
PROVIDE ( sip_install_rx_data_cb = 0x4000545c );
PROVIDE ( sip_install_rx_data_cb = 0x4000545c );
PROVIDE ( sip_post = 0x400050fc );
PROVIDE ( sip_post = 0x400050fc );
PROVIDE ( sip_post_init = 0x400056c4 );
PROVIDE ( sip_post_init = 0x400056c4 );
PROVIDE ( sip_reclaim_from_host_cmd = 0x4000534c );
PROVIDE ( sip_reclaim_from_host_cmd = 0x4000534c );
PROVIDE ( sip_reclaim_tx_data_pkt = 0x400052c0 );
PROVIDE ( sip_reclaim_tx_data_pkt = 0x400052c0 );
PROVIDE ( sip_send = 0x40005808 );
PROVIDE ( sip_send = 0x40005808 );
PROVIDE ( sip_to_host_chain_append = 0x40005864 );
PROVIDE ( sip_to_host_chain_append = 0x40005864 );
PROVIDE ( sip_to_host_evt_send_done = 0x40005234 );
PROVIDE ( sip_to_host_evt_send_done = 0x40005234 );
PROVIDE ( slc_add_credits = 0x400060ac );
PROVIDE ( slc_add_credits = 0x400060ac );
PROVIDE ( slc_enable = 0x40005d90 );
PROVIDE ( slc_enable = 0x40005d90 );
PROVIDE ( slc_from_host_chain_fetch = 0x40005f24 );
PROVIDE ( slc_from_host_chain_fetch = 0x40005f24 );
PROVIDE ( slc_from_host_chain_recycle = 0x40005e94 );
PROVIDE ( slc_from_host_chain_recycle = 0x40005e94 );
PROVIDE ( slc_init_attach = 0x40005c50 );
PROVIDE ( slc_init_attach = 0x40005c50 );
PROVIDE ( slc_init_credit = 0x4000608c );
PROVIDE ( slc_init_credit = 0x4000608c );
PROVIDE ( slc_pause_from_host = 0x40006014 );
PROVIDE ( slc_pause_from_host = 0x40006014 );
PROVIDE ( slc_reattach = 0x40005c1c );
PROVIDE ( slc_reattach = 0x40005c1c );
PROVIDE ( slc_resume_from_host = 0x4000603c );
PROVIDE ( slc_resume_from_host = 0x4000603c );
PROVIDE ( slc_select_tohost_gpio = 0x40005dc0 );
PROVIDE ( slc_select_tohost_gpio = 0x40005dc0 );
PROVIDE ( slc_select_tohost_gpio_mode = 0x40005db8 );
PROVIDE ( slc_select_tohost_gpio_mode = 0x40005db8 );
PROVIDE ( slc_send_to_host_chain = 0x40005de4 );
PROVIDE ( slc_send_to_host_chain = 0x40005de4 );
PROVIDE ( slc_set_host_io_max_window = 0x40006068 );
PROVIDE ( slc_set_host_io_max_window = 0x40006068 );
PROVIDE ( slc_to_host_chain_recycle = 0x40005f10 );
PROVIDE ( slc_to_host_chain_recycle = 0x40005f10 );
PROVIDE ( software_reset = 0x4000264c );
PROVIDE ( software_reset = 0x4000264c );
PROVIDE ( spi_flash_attach = 0x40004644 );
PROVIDE ( spi_flash_attach = 0x40004644 );
PROVIDE ( srand = 0x400005f0 );
PROVIDE ( srand = 0x400005f0 );
PROVIDE ( strcmp = 0x4000bdc8 );
PROVIDE ( strcmp = 0x4000bdc8 );
PROVIDE ( strcpy = 0x4000bec8 );
PROVIDE ( strcpy = 0x4000bec8 );
PROVIDE ( strlen = 0x4000bf4c );
PROVIDE ( strlen = 0x4000bf4c );
PROVIDE ( strncmp = 0x4000bfa8 );
PROVIDE ( strncmp = 0x4000bfa8 );
PROVIDE ( strncpy = 0x4000c0a0 );
PROVIDE ( strncpy = 0x4000c0a0 );
PROVIDE ( strstr = 0x4000e1e0 );
PROVIDE ( strstr = 0x4000e1e0 );
PROVIDE ( timer_insert = 0x40002c64 );
PROVIDE ( timer_insert = 0x40002c64 );
PROVIDE ( uartAttach = 0x4000383c );
PROVIDE ( uartAttach = 0x4000383c );
PROVIDE ( uart_baudrate_detect = 0x40003924 );
PROVIDE ( uart_baudrate_detect = 0x40003924 );
PROVIDE ( uart_buff_switch = 0x400038a4 );
PROVIDE ( uart_buff_switch = 0x400038a4 );
PROVIDE ( uart_div_modify = 0x400039d8 );
PROVIDE ( uart_div_modify = 0x400039d8 );
PROVIDE ( uart_rx_intr_handler = 0x40003bbc );
PROVIDE ( uart_rx_intr_handler = 0x40003bbc );
PROVIDE ( uart_rx_one_char = 0x40003b8c );
PROVIDE ( uart_rx_one_char = 0x40003b8c );
PROVIDE ( uart_rx_one_char_block = 0x40003b64 );
PROVIDE ( uart_rx_one_char_block = 0x40003b64 );
PROVIDE ( uart_rx_readbuff = 0x40003ec8 );
PROVIDE ( uart_rx_readbuff = 0x40003ec8 );
PROVIDE ( uart_tx_one_char = 0x40003b30 );
PROVIDE ( uart_tx_one_char = 0x40003b30 );
PROVIDE ( wepkey_128 = 0x4000bc40 );
PROVIDE ( wepkey_128 = 0x4000bc40 );
PROVIDE ( wepkey_64 = 0x4000bb3c );
PROVIDE ( wepkey_64 = 0x4000bb3c );
PROVIDE ( xthal_bcopy = 0x40000688 );
PROVIDE ( xthal_bcopy = 0x40000688 );
PROVIDE ( xthal_copy123 = 0x4000074c );
PROVIDE ( xthal_copy123 = 0x4000074c );
PROVIDE ( xthal_get_ccompare = 0x4000dd4c );
PROVIDE ( xthal_get_ccompare = 0x4000dd4c );
PROVIDE ( xthal_get_ccount = 0x4000dd38 );
PROVIDE ( xthal_get_ccount = 0x4000dd38 );
PROVIDE ( xthal_get_interrupt = 0x4000dd58 );
PROVIDE ( xthal_get_interrupt = 0x4000dd58 );
PROVIDE ( xthal_get_intread = 0x4000dd58 );
PROVIDE ( xthal_get_intread = 0x4000dd58 );
PROVIDE ( xthal_memcpy = 0x400006c4 );
PROVIDE ( xthal_memcpy = 0x400006c4 );
PROVIDE ( xthal_set_ccompare = 0x4000dd40 );
PROVIDE ( xthal_set_ccompare = 0x4000dd40 );
PROVIDE ( xthal_set_intclear = 0x4000dd60 );
PROVIDE ( xthal_set_intclear = 0x4000dd60 );
PROVIDE ( xthal_spill_registers_into_stack_nw = 0x4000e320 );
PROVIDE ( xthal_spill_registers_into_stack_nw = 0x4000e320 );
PROVIDE ( xthal_window_spill = 0x4000e324 );
PROVIDE ( xthal_window_spill = 0x4000e324 );
PROVIDE ( xthal_window_spill_nw = 0x4000e320 );
PROVIDE ( xthal_window_spill_nw = 0x4000e320 );
PROVIDE ( Te0 = 0x3fffccf0 );
PROVIDE ( Te0 = 0x3fffccf0 );
PROVIDE ( UartDev = 0x3fffde10 );
PROVIDE ( UartDev = 0x3fffde10 );
PROVIDE ( flashchip = 0x3fffc714);
PROVIDE ( flashchip = 0x3fffc714);
sdk/esp_iot_sdk_v1.4.0/lib/libat.a
0 → 100644
View file @
a33e3a4a
File added
Prev
1
…
9
10
11
12
13
14
15
Next
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
.
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment