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ruanhaishen
Nodemcu Firmware
Commits
a33e3a4a
Commit
a33e3a4a
authored
Oct 17, 2015
by
Vowstar
Browse files
Merge pull request #687 from DiUS/dev140
Major upgrade to SDK 1.4.0 & open LWIP
parents
093a8959
8fba0f47
Changes
282
Show whitespace changes
Inline
Side-by-side
include/ping.h
→
sdk/esp_iot_sdk_v1.4.0/
include/ping.h
View file @
a33e3a4a
File moved
sdk/esp_iot_sdk_v1.4.0/include/pwm.h
0 → 100644
View file @
a33e3a4a
#ifndef __PWM_H__
#define __PWM_H__
/*pwm.h: function and macro definition of PWM API , driver level */
/*user_light.h: user interface for light API, user level*/
/*user_light_adj: API for color changing and lighting effects, user level*/
/*NOTE!! : DO NOT CHANGE THIS FILE*/
/*SUPPORT UP TO 8 PWM CHANNEL*/
#define PWM_CHANNEL_NUM_MAX 8
struct
pwm_param
{
uint32
period
;
uint32
freq
;
uint32
duty
[
PWM_CHANNEL_NUM_MAX
];
//PWM_CHANNEL<=8
};
/* pwm_init should be called only once, for now */
void
pwm_init
(
uint32
period
,
uint32
*
duty
,
uint32
pwm_channel_num
,
uint32
(
*
pin_info_list
)[
3
]);
void
pwm_start
(
void
);
void
pwm_set_duty
(
uint32
duty
,
uint8
channel
);
uint32
pwm_get_duty
(
uint8
channel
);
void
pwm_set_period
(
uint32
period
);
uint32
pwm_get_period
(
void
);
uint32
get_pwm_version
(
void
);
void
set_pwm_debug_en
(
uint8
print_en
);
#endif
include/queue.h
→
sdk/esp_iot_sdk_v1.4.0/
include/queue.h
View file @
a33e3a4a
File moved
include/smartconfig.h
→
sdk/esp_iot_sdk_v1.4.0/
include/smartconfig.h
View file @
a33e3a4a
...
...
@@ -6,23 +6,26 @@
#ifndef __SMARTCONFIG_H__
#define __SMARTCONFIG_H__
typedef
void
(
*
sc_callback_t
)(
void
*
data
);
typedef
enum
{
SC_STATUS_FIND_CHANNEL
=
0
,
SC_STATUS_WAIT
=
0
,
SC_STATUS_FIND_CHANNEL
,
SC_STATUS_GETTING_SSID_PSWD
,
SC_STATUS_GOT_SSID_PSWD
,
SC_STATUS_LINK
,
SC_STATUS_LINK_OVER
,
}
sc_status
;
typedef
enum
{
SC_TYPE_ESPTOUCH
=
0
,
SC_TYPE_AIRKISS
,
SC_TYPE_ESPTOUCH_AIRKISS
,
}
sc_type
;
sc_status
smartconfig_get_status
(
void
);
typedef
void
(
*
sc_callback_t
)(
sc_status
status
,
void
*
pdata
);
const
char
*
smartconfig_get_version
(
void
);
bool
smartconfig_start
(
sc_type
type
,
sc_callback_t
cb
);
bool
smartconfig_start
(
sc_callback_t
cb
,
...
);
bool
smartconfig_stop
(
void
);
bool
esptouch_set_timeout
(
uint8
time_s
);
//15s~255s, offset:45s
bool
smartconfig_set_type
(
sc_type
type
);
#endif
sdk/esp_iot_sdk_v1.4.0/include/sntp.h
0 → 100644
View file @
a33e3a4a
#ifndef __SNTP_H__
#define __SNTP_H__
#include "os_type.h"
#ifdef LWIP_OPEN_SRC
#include "lwip/ip_addr.h"
#else
#include "ip_addr.h"
#endif
/**
* get the seconds since Jan 01, 1970, 00:00 (GMT + 8)
*/
uint32
sntp_get_current_timestamp
();
/**
* get real time (GTM + 8 time zone)
*/
char
*
sntp_get_real_time
(
long
t
);
/**
* SNTP get time_zone default GMT + 8
*/
sint8
sntp_get_timezone
(
void
);
/**
* SNTP set time_zone (default GMT + 8)
*/
bool
sntp_set_timezone
(
sint8
timezone
);
/**
* Initialize this module.
* Send out request instantly or after SNTP_STARTUP_DELAY(_FUNC).
*/
void
sntp_init
(
void
);
/**
* Stop this module.
*/
void
sntp_stop
(
void
);
/**
* Initialize one of the NTP servers by IP address
*
* @param numdns the index of the NTP server to set must be < SNTP_MAX_SERVERS
* @param dnsserver IP address of the NTP server to set
*/
void
sntp_setserver
(
unsigned
char
idx
,
ip_addr_t
*
addr
);
/**
* Obtain one of the currently configured by IP address (or DHCP) NTP servers
*
* @param numdns the index of the NTP server
* @return IP address of the indexed NTP server or "ip_addr_any" if the NTP
* server has not been configured by address (or at all).
*/
ip_addr_t
sntp_getserver
(
unsigned
char
idx
);
/**
* Initialize one of the NTP servers by name
*
* @param numdns the index of the NTP server to set must be < SNTP_MAX_SERVERS,now sdk support SNTP_MAX_SERVERS = 3
* @param dnsserver DNS name of the NTP server to set, to be resolved at contact time
*/
void
sntp_setservername
(
unsigned
char
idx
,
char
*
server
);
/**
* Obtain one of the currently configured by name NTP servers.
*
* @param numdns the index of the NTP server
* @return IP address of the indexed NTP server or NULL if the NTP
* server has not been configured by name (or at all)
*/
char
*
sntp_getservername
(
unsigned
char
idx
);
#define sntp_servermode_dhcp(x)
#endif
include/spi_flash.h
→
sdk/esp_iot_sdk_v1.4.0/
include/spi_flash.h
View file @
a33e3a4a
...
...
@@ -28,4 +28,12 @@ SpiFlashOpResult spi_flash_erase_sector(uint16 sec);
SpiFlashOpResult
spi_flash_write
(
uint32
des_addr
,
uint32
*
src_addr
,
uint32
size
);
SpiFlashOpResult
spi_flash_read
(
uint32
src_addr
,
uint32
*
des_addr
,
uint32
size
);
typedef
SpiFlashOpResult
(
*
user_spi_flash_read
)(
SpiFlashChip
*
spi
,
uint32
src_addr
,
uint32
*
des_addr
,
uint32
size
);
void
spi_flash_set_read_func
(
user_spi_flash_read
read
);
#endif
include/upgrade.h
→
sdk/esp_iot_sdk_v1.4.0/
include/upgrade.h
View file @
a33e3a4a
...
...
@@ -2,6 +2,7 @@
#define __UPGRADE_H__
#define SPI_FLASH_SEC_SIZE 4096
#define LIMIT_ERASE_SIZE 0x10000
#define USER_BIN1 0x00
#define USER_BIN2 0x01
...
...
@@ -37,14 +38,12 @@ struct upgrade_server_info {
#define UPGRADE_FLAG_START 0x01
#define UPGRADE_FLAG_FINISH 0x02
//bool system_upgrade_start(struct upgrade_server_info *server);
bool
system_upgrade_start_ssl
(
struct
upgrade_server_info
*
server
);
void
system_upgrade_init
();
void
system_upgrade_deinit
();
bool
system_upgrade
(
uint8
*
data
,
uint16
len
);
#ifdef UPGRADE_SSL_ENABLE
bool
system_upgrade_start_ssl
(
struct
upgrade_server_info
*
server
);
bool
system_upgrade_start_ssl
(
struct
upgrade_server_info
*
server
);
// not supported now
#else
bool
system_upgrade_start
(
struct
upgrade_server_info
*
server
);
#endif
...
...
include/user_interface.h
→
sdk/esp_iot_sdk_v1.4.0/
include/user_interface.h
View file @
a33e3a4a
...
...
@@ -23,13 +23,17 @@
#endif
enum
rst_reason
{
DEFAULT_RST_FLAG
=
0
,
WDT_RST_FLAG
=
1
,
EXP_RST_FLAG
=
2
REASON_DEFAULT_RST
=
0
,
REASON_WDT_RST
=
1
,
REASON_EXCEPTION_RST
=
2
,
REASON_SOFT_WDT_RST
=
3
,
REASON_SOFT_RESTART
=
4
,
REASON_DEEP_SLEEP_AWAKE
=
5
,
REASON_EXT_SYS_RST
=
6
};
struct
rst_info
{
uint32
flag
;
uint32
reason
;
uint32
exccause
;
uint32
epc1
;
uint32
epc2
;
...
...
@@ -38,6 +42,8 @@ struct rst_info{
uint32
depc
;
};
struct
rst_info
*
system_get_rst_info
(
void
);
#define UPGRADE_FW_BIN1 0x00
#define UPGRADE_FW_BIN2 0x01
...
...
@@ -87,18 +93,61 @@ bool system_rtc_mem_read(uint8 src_addr, void *des_addr, uint16 load_size);
bool
system_rtc_mem_write
(
uint8
des_addr
,
const
void
*
src_addr
,
uint16
save_size
);
void
system_uart_swap
(
void
);
void
system_uart_de_swap
(
void
);
uint16
system_adc_read
(
void
);
uint16
system_get_vdd33
(
void
);
const
char
*
system_get_sdk_version
(
void
);
#define SYS_BOOT_ENHANCE_MODE 0
#define SYS_BOOT_NORMAL_MODE 1
#define SYS_BOOT_NORMAL_BIN 0
#define SYS_BOOT_TEST_BIN 1
uint8
system_get_boot_version
(
void
);
uint32
system_get_userbin_addr
(
void
);
uint8
system_get_boot_mode
(
void
);
bool
system_restart_enhance
(
uint8
bin_type
,
uint32
bin_addr
);
#define SYS_CPU_80MHZ 80
#define SYS_CPU_160MHZ 160
bool
system_update_cpu_freq
(
uint8
freq
);
uint8
system_get_cpu_freq
(
void
);
enum
flash_size_map
{
FLASH_SIZE_4M_MAP_256_256
=
0
,
FLASH_SIZE_2M
,
FLASH_SIZE_8M_MAP_512_512
,
FLASH_SIZE_16M_MAP_512_512
,
FLASH_SIZE_32M_MAP_512_512
,
FLASH_SIZE_16M_MAP_1024_1024
,
FLASH_SIZE_32M_MAP_1024_1024
};
enum
flash_size_map
system_get_flash_size_map
(
void
);
void
system_phy_set_max_tpw
(
uint8
max_tpw
);
void
system_phy_set_tpw_via_vdd33
(
uint16
vdd33
);
void
system_phy_set_rfoption
(
uint8
option
);
void
system_phy_set_powerup_option
(
uint8
option
);
bool
system_param_save_with_protect
(
uint16
start_sec
,
void
*
param
,
uint16
len
);
bool
system_param_load
(
uint16
start_sec
,
uint16
offset
,
void
*
param
,
uint16
len
);
void
system_soft_wdt_stop
(
void
);
void
system_soft_wdt_restart
(
void
);
void
system_soft_wdt_feed
(
void
);
void
system_show_malloc
(
void
);
#define NULL_MODE 0x00
#define STATION_MODE 0x01
#define SOFTAP_MODE 0x02
#define STATIONAP_MODE 0x03
typedef
enum
_auth_mode
{
AUTH_OPEN
=
0
,
AUTH_WEP
,
...
...
@@ -109,17 +158,25 @@ typedef enum _auth_mode {
}
AUTH_MODE
;
uint8
wifi_get_opmode
(
void
);
uint8
wifi_get_opmode_default
(
void
);
bool
wifi_set_opmode
(
uint8
opmode
);
bool
wifi_set_opmode_current
(
uint8
opmode
);
uint8
wifi_get_broadcast_if
(
void
);
bool
wifi_set_broadcast_if
(
uint8
interface
);
struct
bss_info
{
STAILQ_ENTRY
(
bss_info
)
next
;
uint8
bssid
[
6
];
uint8
ssid
[
32
];
uint8
ssid_len
;
uint8
channel
;
sint8
rssi
;
AUTH_MODE
authmode
;
uint8
is_hidden
;
sint16
freq_offset
;
sint16
freqcal_val
;
uint8
*
esp_mesh_ie
;
};
typedef
struct
_scaninfo
{
...
...
@@ -142,11 +199,15 @@ struct station_config {
};
bool
wifi_station_get_config
(
struct
station_config
*
config
);
bool
wifi_station_get_config_default
(
struct
station_config
*
config
);
bool
wifi_station_set_config
(
struct
station_config
*
config
);
bool
wifi_station_set_config_current
(
struct
station_config
*
config
);
bool
wifi_station_connect
(
void
);
bool
wifi_station_disconnect
(
void
);
sint8
wifi_station_get_rssi
(
void
);
struct
scan_config
{
uint8
*
ssid
;
// Note: ssid == NULL, don't filter ssid.
uint8
*
bssid
;
// Note: bssid == NULL, don't filter bssid.
...
...
@@ -159,6 +220,8 @@ bool wifi_station_scan(struct scan_config *config, scan_done_cb_t cb);
uint8
wifi_station_get_auto_connect
(
void
);
bool
wifi_station_set_auto_connect
(
uint8
set
);
bool
wifi_station_set_reconnect_policy
(
bool
set
);
enum
{
STATION_IDLE
=
0
,
STATION_CONNECTING
,
...
...
@@ -178,10 +241,15 @@ uint8 wifi_station_get_connect_status(void);
uint8
wifi_station_get_current_ap_id
(
void
);
bool
wifi_station_ap_change
(
uint8
current_ap_id
);
bool
wifi_station_ap_number_set
(
uint8
ap_number
);
uint8
wifi_station_get_ap_info
(
struct
station_config
config
[]);
bool
wifi_station_dhcpc_start
(
void
);
bool
wifi_station_dhcpc_stop
(
void
);
enum
dhcp_status
wifi_station_dhcpc_status
(
void
);
bool
wifi_station_dhcpc_set_maxtry
(
uint8
num
);
char
*
wifi_station_get_hostname
(
void
);
bool
wifi_station_set_hostname
(
char
*
name
);
struct
softap_config
{
uint8
ssid
[
32
];
...
...
@@ -195,7 +263,9 @@ struct softap_config {
};
bool
wifi_softap_get_config
(
struct
softap_config
*
config
);
bool
wifi_softap_get_config_default
(
struct
softap_config
*
config
);
bool
wifi_softap_set_config
(
struct
softap_config
*
config
);
bool
wifi_softap_set_config_current
(
struct
softap_config
*
config
);
struct
station_info
{
STAILQ_ENTRY
(
station_info
)
next
;
...
...
@@ -205,18 +275,32 @@ struct station_info {
};
struct
dhcps_lease
{
uint32
start_ip
;
uint32
end_ip
;
bool
enable
;
struct
ip_addr
start_ip
;
struct
ip_addr
end_ip
;
};
enum
dhcps_offer_option
{
OFFER_START
=
0x00
,
OFFER_ROUTER
=
0x01
,
OFFER_END
};
uint8
wifi_softap_get_station_num
(
void
);
struct
station_info
*
wifi_softap_get_station_info
(
void
);
void
wifi_softap_free_station_info
(
void
);
uint8
wifi_station_get_ap_info
(
struct
station_config
config
[]);
bool
wifi_softap_dhcps_start
(
void
);
bool
wifi_softap_dhcps_stop
(
void
);
bool
wifi_softap_set_dhcps_lease
(
struct
dhcps_lease
*
please
);
bool
wifi_softap_get_dhcps_lease
(
struct
dhcps_lease
*
please
);
uint32
wifi_softap_get_dhcps_lease_time
(
void
);
bool
wifi_softap_set_dhcps_lease_time
(
uint32
minute
);
bool
wifi_softap_reset_dhcps_lease_time
(
void
);
enum
dhcp_status
wifi_softap_dhcps_status
(
void
);
bool
wifi_softap_set_dhcps_offer_option
(
uint8
level
,
void
*
optarg
);
#define STATION_IF 0x00
#define SOFTAP_IF 0x01
...
...
@@ -242,9 +326,7 @@ typedef void (* wifi_promiscuous_cb_t)(uint8 *buf, uint16 len);
void
wifi_set_promiscuous_rx_cb
(
wifi_promiscuous_cb_t
cb
);
#define PHY_MODE_B 0x01
#define PHY_MODE_G 0x02
#define PHY_MODE_N 0x03
void
wifi_promiscuous_set_mac
(
const
uint8_t
*
address
);
enum
phy_mode
{
PHY_MODE_11B
=
1
,
...
...
@@ -264,4 +346,251 @@ enum sleep_type {
bool
wifi_set_sleep_type
(
enum
sleep_type
type
);
enum
sleep_type
wifi_get_sleep_type
(
void
);
void
wifi_fpm_open
(
void
);
void
wifi_fpm_close
(
void
);
void
wifi_fpm_do_wakeup
(
void
);
sint8
wifi_fpm_do_sleep
(
uint32
sleep_time_in_us
);
void
wifi_fpm_set_sleep_type
(
enum
sleep_type
type
);
enum
sleep_type
wifi_fpm_get_sleep_type
(
void
);
enum
{
EVENT_STAMODE_CONNECTED
=
0
,
EVENT_STAMODE_DISCONNECTED
,
EVENT_STAMODE_AUTHMODE_CHANGE
,
EVENT_STAMODE_GOT_IP
,
EVENT_STAMODE_DHCP_TIMEOUT
,
EVENT_SOFTAPMODE_STACONNECTED
,
EVENT_SOFTAPMODE_STADISCONNECTED
,
EVENT_SOFTAPMODE_PROBEREQRECVED
,
EVENT_MAX
};
enum
{
REASON_UNSPECIFIED
=
1
,
REASON_AUTH_EXPIRE
=
2
,
REASON_AUTH_LEAVE
=
3
,
REASON_ASSOC_EXPIRE
=
4
,
REASON_ASSOC_TOOMANY
=
5
,
REASON_NOT_AUTHED
=
6
,
REASON_NOT_ASSOCED
=
7
,
REASON_ASSOC_LEAVE
=
8
,
REASON_ASSOC_NOT_AUTHED
=
9
,
REASON_DISASSOC_PWRCAP_BAD
=
10
,
/* 11h */
REASON_DISASSOC_SUPCHAN_BAD
=
11
,
/* 11h */
REASON_IE_INVALID
=
13
,
/* 11i */
REASON_MIC_FAILURE
=
14
,
/* 11i */
REASON_4WAY_HANDSHAKE_TIMEOUT
=
15
,
/* 11i */
REASON_GROUP_KEY_UPDATE_TIMEOUT
=
16
,
/* 11i */
REASON_IE_IN_4WAY_DIFFERS
=
17
,
/* 11i */
REASON_GROUP_CIPHER_INVALID
=
18
,
/* 11i */
REASON_PAIRWISE_CIPHER_INVALID
=
19
,
/* 11i */
REASON_AKMP_INVALID
=
20
,
/* 11i */
REASON_UNSUPP_RSN_IE_VERSION
=
21
,
/* 11i */
REASON_INVALID_RSN_IE_CAP
=
22
,
/* 11i */
REASON_802_1X_AUTH_FAILED
=
23
,
/* 11i */
REASON_CIPHER_SUITE_REJECTED
=
24
,
/* 11i */
REASON_BEACON_TIMEOUT
=
200
,
REASON_NO_AP_FOUND
=
201
,
REASON_AUTH_FAIL
=
202
,
REASON_ASSOC_FAIL
=
203
,
REASON_HANDSHAKE_TIMEOUT
=
204
,
};
typedef
struct
{
uint8
ssid
[
32
];
uint8
ssid_len
;
uint8
bssid
[
6
];
uint8
channel
;
}
Event_StaMode_Connected_t
;
typedef
struct
{
uint8
ssid
[
32
];
uint8
ssid_len
;
uint8
bssid
[
6
];
uint8
reason
;
}
Event_StaMode_Disconnected_t
;
typedef
struct
{
uint8
old_mode
;
uint8
new_mode
;
}
Event_StaMode_AuthMode_Change_t
;
typedef
struct
{
struct
ip_addr
ip
;
struct
ip_addr
mask
;
struct
ip_addr
gw
;
}
Event_StaMode_Got_IP_t
;
typedef
struct
{
uint8
mac
[
6
];
uint8
aid
;
}
Event_SoftAPMode_StaConnected_t
;
typedef
struct
{
uint8
mac
[
6
];
uint8
aid
;
}
Event_SoftAPMode_StaDisconnected_t
;
typedef
struct
{
int
rssi
;
uint8
mac
[
6
];
}
Event_SoftAPMode_ProbeReqRecved_t
;
typedef
union
{
Event_StaMode_Connected_t
connected
;
Event_StaMode_Disconnected_t
disconnected
;
Event_StaMode_AuthMode_Change_t
auth_change
;
Event_StaMode_Got_IP_t
got_ip
;
Event_SoftAPMode_StaConnected_t
sta_connected
;
Event_SoftAPMode_StaDisconnected_t
sta_disconnected
;
Event_SoftAPMode_ProbeReqRecved_t
ap_probereqrecved
;
}
Event_Info_u
;
typedef
struct
_esp_event
{
uint32
event
;
Event_Info_u
event_info
;
}
System_Event_t
;
typedef
void
(
*
wifi_event_handler_cb_t
)(
System_Event_t
*
event
);
void
wifi_set_event_handler_cb
(
wifi_event_handler_cb_t
cb
);
typedef
enum
wps_type
{
WPS_TYPE_DISABLE
=
0
,
WPS_TYPE_PBC
,
WPS_TYPE_PIN
,
WPS_TYPE_DISPLAY
,
WPS_TYPE_MAX
,
}
WPS_TYPE_t
;
enum
wps_cb_status
{
WPS_CB_ST_SUCCESS
=
0
,
WPS_CB_ST_FAILED
,
WPS_CB_ST_TIMEOUT
,
WPS_CB_ST_WEP
,
};
bool
wifi_wps_enable
(
WPS_TYPE_t
wps_type
);
bool
wifi_wps_disable
(
void
);
bool
wifi_wps_start
(
void
);
typedef
void
(
*
wps_st_cb_t
)(
int
status
);
bool
wifi_set_wps_cb
(
wps_st_cb_t
cb
);
typedef
void
(
*
freedom_outside_cb_t
)(
uint8
status
);
int
wifi_register_send_pkt_freedom_cb
(
freedom_outside_cb_t
cb
);
void
wifi_unregister_send_pkt_freedom_cb
(
void
);
int
wifi_send_pkt_freedom
(
uint8
*
buf
,
int
len
,
bool
sys_seq
);
int
wifi_rfid_locp_recv_open
(
void
);
void
wifi_rfid_locp_recv_close
(
void
);
typedef
void
(
*
rfid_locp_cb_t
)(
uint8
*
frm
,
int
len
,
int
rssi
);
int
wifi_register_rfid_locp_recv_cb
(
rfid_locp_cb_t
cb
);
void
wifi_unregister_rfid_locp_recv_cb
(
void
);
enum
FIXED_RATE
{
PHY_RATE_48
=
0x8
,
PHY_RATE_24
=
0x9
,
PHY_RATE_12
=
0xA
,
PHY_RATE_6
=
0xB
,
PHY_RATE_54
=
0xC
,
PHY_RATE_36
=
0xD
,
PHY_RATE_18
=
0xE
,
PHY_RATE_9
=
0xF
,
};
#define FIXED_RATE_MASK_NONE 0x00
#define FIXED_RATE_MASK_STA 0x01
#define FIXED_RATE_MASK_AP 0x02
#define FIXED_RATE_MASK_ALL 0x03
int
wifi_set_user_fixed_rate
(
uint8
enable_mask
,
uint8
rate
);
int
wifi_get_user_fixed_rate
(
uint8
*
enable_mask
,
uint8
*
rate
);
enum
support_rate
{
RATE_11B5M
=
0
,
RATE_11B11M
=
1
,
RATE_11B1M
=
2
,
RATE_11B2M
=
3
,
RATE_11G6M
=
4
,
RATE_11G12M
=
5
,
RATE_11G24M
=
6
,
RATE_11G48M
=
7
,
RATE_11G54M
=
8
,
RATE_11G9M
=
9
,
RATE_11G18M
=
10
,
RATE_11G36M
=
11
,
};
int
wifi_set_user_sup_rate
(
uint8
min
,
uint8
max
);
enum
RATE_11B_ID
{
RATE_11B_B11M
=
0
,
RATE_11B_B5M
=
1
,
RATE_11B_B2M
=
2
,
RATE_11B_B1M
=
3
,
};
enum
RATE_11G_ID
{
RATE_11G_G54M
=
0
,
RATE_11G_G48M
=
1
,
RATE_11G_G36M
=
2
,
RATE_11G_G24M
=
3
,
RATE_11G_G18M
=
4
,
RATE_11G_G12M
=
5
,
RATE_11G_G9M
=
6
,
RATE_11G_G6M
=
7
,
RATE_11G_B5M
=
8
,
RATE_11G_B2M
=
9
,
RATE_11G_B1M
=
10
};
enum
RATE_11N_ID
{
RATE_11N_MCS7S
=
0
,
RATE_11N_MCS7
=
1
,
RATE_11N_MCS6
=
2
,
RATE_11N_MCS5
=
3
,
RATE_11N_MCS4
=
4
,
RATE_11N_MCS3
=
5
,
RATE_11N_MCS2
=
6
,
RATE_11N_MCS1
=
7
,
RATE_11N_MCS0
=
8
,
RATE_11N_B5M
=
9
,
RATE_11N_B2M
=
10
,
RATE_11N_B1M
=
11
};
#define RC_LIMIT_11B 0
#define RC_LIMIT_11G 1
#define RC_LIMIT_11N 2
#define RC_LIMIT_P2P_11G 3
#define RC_LIMIT_P2P_11N 4
#define RC_LIMIT_NUM 5
#define LIMIT_RATE_MASK_NONE 0x00
#define LIMIT_RATE_MASK_STA 0x01
#define LIMIT_RATE_MASK_AP 0x02
#define LIMIT_RATE_MASK_ALL 0x03
bool
wifi_set_user_rate_limit
(
uint8
mode
,
uint8
ifidx
,
uint8
max
,
uint8
min
);
uint8
wifi_get_user_limit_rate_mask
(
void
);
bool
wifi_set_user_limit_rate_mask
(
uint8
enable_mask
);
enum
{
USER_IE_BEACON
=
0
,
USER_IE_PROBE_REQ
,
USER_IE_PROBE_RESP
,
USER_IE_ASSOC_REQ
,
USER_IE_ASSOC_RESP
,
USER_IE_MAX
};
typedef
void
(
*
user_ie_manufacturer_recv_cb_t
)(
uint8
type
,
const
uint8
sa
[
6
],
const
uint8
m_oui
[
3
],
uint8
*
ie
,
uint8
ie_len
,
int
rssi
);
bool
wifi_set_user_ie
(
bool
enable
,
uint8
*
m_oui
,
uint8
type
,
uint8
*
user_ie
,
uint8
len
);
int
wifi_register_user_ie_manufacturer_recv_cb
(
user_ie_manufacturer_recv_cb_t
cb
);
void
wifi_unregister_user_ie_manufacturer_recv_cb
(
void
);
#endif
ld/eagle.app.v6.ld
→
sdk/esp_iot_sdk_v1.4.0/
ld/eagle.app.v6.ld
View file @
a33e3a4a
...
...
@@ -5,7 +5,7 @@ MEMORY
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = 0x8000
irom0_0_seg :
org = 0x402
1
0000, len = 0x
8
000
0
irom0_0_seg :
org = 0x402
4
0000, len = 0x
3C
000
}
PHDRS
...
...
@@ -19,7 +19,12 @@ PHDRS
/* Default entry point: */
ENTRY(user_start_trampoline)
ENTRY(call_user_start)
EXTERN(_DebugExceptionVector)
EXTERN(_DoubleExceptionVector)
EXTERN(_KernelExceptionVector)
EXTERN(_NMIExceptionVector)
EXTERN(_UserExceptionVector)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wb_base = 0x00000110;
...
...
@@ -66,45 +71,6 @@ SECTIONS
_dport0_data_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.irom0.text : ALIGN(4)
{
_irom0_text_start = ABSOLUTE(.);
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
*(.literal.* .text.*)
/* Trade some performance for lots of ram. At the time of writing the
* available Lua heap went from 18248 to 34704. */
*(.rodata*)
_irom0_text_end = ABSOLUTE(.);
_flash_used_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr
.text : ALIGN(4)
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.entry.text)
*(.init.literal)
*(.init)
/* *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) */
*(.literal .text .iram0.text .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr
.lit4 : ALIGN(4)
{
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
} >iram1_0_seg :iram1_0_phdr
.data : ALIGN(4)
{
_data_start = ABSOLUTE(.);
...
...
@@ -125,7 +91,11 @@ SECTIONS
.rodata : ALIGN(4)
{
_rodata_start = ABSOLUTE(.);
*(.sdk.version)
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
*(.rodata1)
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table)
...
...
@@ -181,6 +151,60 @@ SECTIONS
} >dram0_0_seg :dram0_0_bss_phdr
/* __stack = 0x3ffc8000; */
.text : ALIGN(4)
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.UserEnter.text)
. = ALIGN(16);
*(.DebugExceptionVector.text)
. = ALIGN(16);
*(.NMIExceptionVector.text)
. = ALIGN(16);
*(.KernelExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.UserExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.DoubleExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr
.lit4 : ALIGN(4)
{
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
} >iram1_0_seg :iram1_0_phdr
.irom0.text : ALIGN(4)
{
_irom0_text_start = ABSOLUTE(.);
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
_irom0_text_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr
}
/* get ROM code address */
...
...
ld/eagle.app.v6.app1.ld
→
sdk/esp_iot_sdk_v1.4.0/
ld/eagle.app.v6.
new.1024.
app1.ld
View file @
a33e3a4a
...
...
@@ -5,7 +5,7 @@ MEMORY
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = 0x8000
irom0_0_seg :
org = 0x402
1100
0, len = 0x
2
B000
irom0_0_seg :
org = 0x402
0101
0, len = 0x
6
B000
}
PHDRS
...
...
@@ -20,6 +20,11 @@ PHDRS
/* Default entry point: */
ENTRY(call_user_start)
EXTERN(_DebugExceptionVector)
EXTERN(_DoubleExceptionVector)
EXTERN(_KernelExceptionVector)
EXTERN(_NMIExceptionVector)
EXTERN(_UserExceptionVector)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wb_base = 0x00000110;
...
...
@@ -86,6 +91,7 @@ SECTIONS
.rodata : ALIGN(4)
{
_rodata_start = ABSOLUTE(.);
*(.sdk.version)
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
...
...
@@ -149,6 +155,30 @@ SECTIONS
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.UserEnter.text)
. = ALIGN(16);
*(.DebugExceptionVector.text)
. = ALIGN(16);
*(.NMIExceptionVector.text)
. = ALIGN(16);
*(.KernelExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.UserExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.DoubleExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
...
...
sdk/esp_iot_sdk_v1.4.0/ld/eagle.app.v6.new.1024.app2.ld
0 → 100644
View file @
a33e3a4a
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */
MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = 0x8000
irom0_0_seg : org = 0x40281010, len = 0x6B000
}
PHDRS
{
dport0_0_phdr PT_LOAD;
dram0_0_phdr PT_LOAD;
dram0_0_bss_phdr PT_LOAD;
iram1_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
}
/* Default entry point: */
ENTRY(call_user_start)
EXTERN(_DebugExceptionVector)
EXTERN(_DoubleExceptionVector)
EXTERN(_KernelExceptionVector)
EXTERN(_NMIExceptionVector)
EXTERN(_UserExceptionVector)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wb_base = 0x00000110;
_memmap_cacheattr_wt_base = 0x00000110;
_memmap_cacheattr_bp_base = 0x00000220;
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
_memmap_cacheattr_wb_trapnull = 0x2222211F;
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
_memmap_cacheattr_wb_allvalid = 0x22222112;
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_allvalid = 0x22222222;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
.dport0.rodata : ALIGN(4)
{
_dport0_rodata_start = ABSOLUTE(.);
*(.dport0.rodata)
*(.dport.rodata)
_dport0_rodata_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.literal : ALIGN(4)
{
_dport0_literal_start = ABSOLUTE(.);
*(.dport0.literal)
*(.dport.literal)
_dport0_literal_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.data : ALIGN(4)
{
_dport0_data_start = ABSOLUTE(.);
*(.dport0.data)
*(.dport.data)
_dport0_data_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.data : ALIGN(4)
{
_data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
_data_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.rodata : ALIGN(4)
{
_rodata_start = ABSOLUTE(.);
*(.sdk.version)
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
*(.rodata1)
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame)
/* C++ constructor and destructor tables, properly ordered: */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
. = ALIGN(4); /* this table MUST be 4-byte aligned */
_bss_table_start = ABSOLUTE(.);
LONG(_bss_start)
LONG(_bss_end)
_bss_table_end = ABSOLUTE(.);
_rodata_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
{
. = ALIGN (8);
_bss_start = ABSOLUTE(.);
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
_bss_end = ABSOLUTE(.);
_heap_start = ABSOLUTE(.);
/* _stack_sentry = ALIGN(0x8); */
} >dram0_0_seg :dram0_0_bss_phdr
/* __stack = 0x3ffc8000; */
.text : ALIGN(4)
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.UserEnter.text)
. = ALIGN(16);
*(.DebugExceptionVector.text)
. = ALIGN(16);
*(.NMIExceptionVector.text)
. = ALIGN(16);
*(.KernelExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.UserExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.DoubleExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr
.lit4 : ALIGN(4)
{
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
} >iram1_0_seg :iram1_0_phdr
.irom0.text : ALIGN(4)
{
_irom0_text_start = ABSOLUTE(.);
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
_irom0_text_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr
}
/* get ROM code address */
INCLUDE "../ld/eagle.rom.addr.v6.ld"
sdk/esp_iot_sdk_v1.4.0/ld/eagle.app.v6.new.2048.ld
0 → 100644
View file @
a33e3a4a
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */
MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = 0x8000
irom0_0_seg : org = 0x40201010, len = 0xE0000
}
PHDRS
{
dport0_0_phdr PT_LOAD;
dram0_0_phdr PT_LOAD;
dram0_0_bss_phdr PT_LOAD;
iram1_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
}
/* Default entry point: */
ENTRY(call_user_start)
EXTERN(_DebugExceptionVector)
EXTERN(_DoubleExceptionVector)
EXTERN(_KernelExceptionVector)
EXTERN(_NMIExceptionVector)
EXTERN(_UserExceptionVector)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wb_base = 0x00000110;
_memmap_cacheattr_wt_base = 0x00000110;
_memmap_cacheattr_bp_base = 0x00000220;
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
_memmap_cacheattr_wb_trapnull = 0x2222211F;
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
_memmap_cacheattr_wb_allvalid = 0x22222112;
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_allvalid = 0x22222222;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
.dport0.rodata : ALIGN(4)
{
_dport0_rodata_start = ABSOLUTE(.);
*(.dport0.rodata)
*(.dport.rodata)
_dport0_rodata_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.literal : ALIGN(4)
{
_dport0_literal_start = ABSOLUTE(.);
*(.dport0.literal)
*(.dport.literal)
_dport0_literal_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.data : ALIGN(4)
{
_dport0_data_start = ABSOLUTE(.);
*(.dport0.data)
*(.dport.data)
_dport0_data_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.data : ALIGN(4)
{
_data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
_data_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.rodata : ALIGN(4)
{
_rodata_start = ABSOLUTE(.);
*(.sdk.version)
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
*(.rodata1)
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame)
/* C++ constructor and destructor tables, properly ordered: */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
. = ALIGN(4); /* this table MUST be 4-byte aligned */
_bss_table_start = ABSOLUTE(.);
LONG(_bss_start)
LONG(_bss_end)
_bss_table_end = ABSOLUTE(.);
_rodata_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
{
. = ALIGN (8);
_bss_start = ABSOLUTE(.);
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
_bss_end = ABSOLUTE(.);
_heap_start = ABSOLUTE(.);
/* _stack_sentry = ALIGN(0x8); */
} >dram0_0_seg :dram0_0_bss_phdr
/* __stack = 0x3ffc8000; */
.text : ALIGN(4)
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.UserEnter.text)
. = ALIGN(16);
*(.DebugExceptionVector.text)
. = ALIGN(16);
*(.NMIExceptionVector.text)
. = ALIGN(16);
*(.KernelExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.UserExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.DoubleExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr
.lit4 : ALIGN(4)
{
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
} >iram1_0_seg :iram1_0_phdr
.irom0.text : ALIGN(4)
{
_irom0_text_start = ABSOLUTE(.);
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
_irom0_text_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr
}
/* get ROM code address */
INCLUDE "../ld/eagle.rom.addr.v6.ld"
sdk/esp_iot_sdk_v1.4.0/ld/eagle.app.v6.new.512.app1.ld
0 → 100644
View file @
a33e3a4a
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */
MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = 0x8000
irom0_0_seg : org = 0x40201010, len = 0x2B000
}
PHDRS
{
dport0_0_phdr PT_LOAD;
dram0_0_phdr PT_LOAD;
dram0_0_bss_phdr PT_LOAD;
iram1_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
}
/* Default entry point: */
ENTRY(call_user_start)
EXTERN(_DebugExceptionVector)
EXTERN(_DoubleExceptionVector)
EXTERN(_KernelExceptionVector)
EXTERN(_NMIExceptionVector)
EXTERN(_UserExceptionVector)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wb_base = 0x00000110;
_memmap_cacheattr_wt_base = 0x00000110;
_memmap_cacheattr_bp_base = 0x00000220;
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
_memmap_cacheattr_wb_trapnull = 0x2222211F;
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
_memmap_cacheattr_wb_allvalid = 0x22222112;
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_allvalid = 0x22222222;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
.dport0.rodata : ALIGN(4)
{
_dport0_rodata_start = ABSOLUTE(.);
*(.dport0.rodata)
*(.dport.rodata)
_dport0_rodata_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.literal : ALIGN(4)
{
_dport0_literal_start = ABSOLUTE(.);
*(.dport0.literal)
*(.dport.literal)
_dport0_literal_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.data : ALIGN(4)
{
_dport0_data_start = ABSOLUTE(.);
*(.dport0.data)
*(.dport.data)
_dport0_data_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.data : ALIGN(4)
{
_data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
_data_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.rodata : ALIGN(4)
{
_rodata_start = ABSOLUTE(.);
*(.sdk.version)
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
*(.rodata1)
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame)
/* C++ constructor and destructor tables, properly ordered: */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
. = ALIGN(4); /* this table MUST be 4-byte aligned */
_bss_table_start = ABSOLUTE(.);
LONG(_bss_start)
LONG(_bss_end)
_bss_table_end = ABSOLUTE(.);
_rodata_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
{
. = ALIGN (8);
_bss_start = ABSOLUTE(.);
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
_bss_end = ABSOLUTE(.);
_heap_start = ABSOLUTE(.);
/* _stack_sentry = ALIGN(0x8); */
} >dram0_0_seg :dram0_0_bss_phdr
/* __stack = 0x3ffc8000; */
.text : ALIGN(4)
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.UserEnter.text)
. = ALIGN(16);
*(.DebugExceptionVector.text)
. = ALIGN(16);
*(.NMIExceptionVector.text)
. = ALIGN(16);
*(.KernelExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.UserExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.DoubleExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr
.lit4 : ALIGN(4)
{
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
} >iram1_0_seg :iram1_0_phdr
.irom0.text : ALIGN(4)
{
_irom0_text_start = ABSOLUTE(.);
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
_irom0_text_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr
}
/* get ROM code address */
INCLUDE "../ld/eagle.rom.addr.v6.ld"
sdk/esp_iot_sdk_v1.4.0/ld/eagle.app.v6.new.512.app2.ld
0 → 100644
View file @
a33e3a4a
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */
MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = 0x8000
irom0_0_seg : org = 0x40241010, len = 0x2B000
}
PHDRS
{
dport0_0_phdr PT_LOAD;
dram0_0_phdr PT_LOAD;
dram0_0_bss_phdr PT_LOAD;
iram1_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
}
/* Default entry point: */
ENTRY(call_user_start)
EXTERN(_DebugExceptionVector)
EXTERN(_DoubleExceptionVector)
EXTERN(_KernelExceptionVector)
EXTERN(_NMIExceptionVector)
EXTERN(_UserExceptionVector)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wb_base = 0x00000110;
_memmap_cacheattr_wt_base = 0x00000110;
_memmap_cacheattr_bp_base = 0x00000220;
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
_memmap_cacheattr_wb_trapnull = 0x2222211F;
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
_memmap_cacheattr_wb_allvalid = 0x22222112;
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_allvalid = 0x22222222;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
.dport0.rodata : ALIGN(4)
{
_dport0_rodata_start = ABSOLUTE(.);
*(.dport0.rodata)
*(.dport.rodata)
_dport0_rodata_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.literal : ALIGN(4)
{
_dport0_literal_start = ABSOLUTE(.);
*(.dport0.literal)
*(.dport.literal)
_dport0_literal_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.data : ALIGN(4)
{
_dport0_data_start = ABSOLUTE(.);
*(.dport0.data)
*(.dport.data)
_dport0_data_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.data : ALIGN(4)
{
_data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
_data_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.rodata : ALIGN(4)
{
_rodata_start = ABSOLUTE(.);
*(.sdk.version)
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
*(.rodata1)
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame)
/* C++ constructor and destructor tables, properly ordered: */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
. = ALIGN(4); /* this table MUST be 4-byte aligned */
_bss_table_start = ABSOLUTE(.);
LONG(_bss_start)
LONG(_bss_end)
_bss_table_end = ABSOLUTE(.);
_rodata_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
{
. = ALIGN (8);
_bss_start = ABSOLUTE(.);
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
_bss_end = ABSOLUTE(.);
_heap_start = ABSOLUTE(.);
/* _stack_sentry = ALIGN(0x8); */
} >dram0_0_seg :dram0_0_bss_phdr
/* __stack = 0x3ffc8000; */
.text : ALIGN(4)
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.UserEnter.text)
. = ALIGN(16);
*(.DebugExceptionVector.text)
. = ALIGN(16);
*(.NMIExceptionVector.text)
. = ALIGN(16);
*(.KernelExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.UserExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.DoubleExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr
.lit4 : ALIGN(4)
{
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
} >iram1_0_seg :iram1_0_phdr
.irom0.text : ALIGN(4)
{
_irom0_text_start = ABSOLUTE(.);
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
_irom0_text_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr
}
/* get ROM code address */
INCLUDE "../ld/eagle.rom.addr.v6.ld"
sdk/esp_iot_sdk_v1.4.0/ld/eagle.app.v6.old.1024.app1.ld
0 → 100644
View file @
a33e3a4a
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */
MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = 0x8000
irom0_0_seg : org = 0x40211000, len = 0x6B000
}
PHDRS
{
dport0_0_phdr PT_LOAD;
dram0_0_phdr PT_LOAD;
dram0_0_bss_phdr PT_LOAD;
iram1_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
}
/* Default entry point: */
ENTRY(call_user_start)
EXTERN(_DebugExceptionVector)
EXTERN(_DoubleExceptionVector)
EXTERN(_KernelExceptionVector)
EXTERN(_NMIExceptionVector)
EXTERN(_UserExceptionVector)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wb_base = 0x00000110;
_memmap_cacheattr_wt_base = 0x00000110;
_memmap_cacheattr_bp_base = 0x00000220;
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
_memmap_cacheattr_wb_trapnull = 0x2222211F;
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
_memmap_cacheattr_wb_allvalid = 0x22222112;
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_allvalid = 0x22222222;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
.dport0.rodata : ALIGN(4)
{
_dport0_rodata_start = ABSOLUTE(.);
*(.dport0.rodata)
*(.dport.rodata)
_dport0_rodata_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.literal : ALIGN(4)
{
_dport0_literal_start = ABSOLUTE(.);
*(.dport0.literal)
*(.dport.literal)
_dport0_literal_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.data : ALIGN(4)
{
_dport0_data_start = ABSOLUTE(.);
*(.dport0.data)
*(.dport.data)
_dport0_data_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.data : ALIGN(4)
{
_data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
_data_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.rodata : ALIGN(4)
{
_rodata_start = ABSOLUTE(.);
*(.sdk.version)
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
*(.rodata1)
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame)
/* C++ constructor and destructor tables, properly ordered: */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
. = ALIGN(4); /* this table MUST be 4-byte aligned */
_bss_table_start = ABSOLUTE(.);
LONG(_bss_start)
LONG(_bss_end)
_bss_table_end = ABSOLUTE(.);
_rodata_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
{
. = ALIGN (8);
_bss_start = ABSOLUTE(.);
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
_bss_end = ABSOLUTE(.);
_heap_start = ABSOLUTE(.);
/* _stack_sentry = ALIGN(0x8); */
} >dram0_0_seg :dram0_0_bss_phdr
/* __stack = 0x3ffc8000; */
.text : ALIGN(4)
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.UserEnter.text)
. = ALIGN(16);
*(.DebugExceptionVector.text)
. = ALIGN(16);
*(.NMIExceptionVector.text)
. = ALIGN(16);
*(.KernelExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.UserExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.DoubleExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr
.lit4 : ALIGN(4)
{
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
} >iram1_0_seg :iram1_0_phdr
.irom0.text : ALIGN(4)
{
_irom0_text_start = ABSOLUTE(.);
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
_irom0_text_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr
}
/* get ROM code address */
INCLUDE "../ld/eagle.rom.addr.v6.ld"
sdk/esp_iot_sdk_v1.4.0/ld/eagle.app.v6.old.1024.app2.ld
0 → 100644
View file @
a33e3a4a
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */
MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = 0x8000
irom0_0_seg : org = 0x40291000, len = 0x6B000
}
PHDRS
{
dport0_0_phdr PT_LOAD;
dram0_0_phdr PT_LOAD;
dram0_0_bss_phdr PT_LOAD;
iram1_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
}
/* Default entry point: */
ENTRY(call_user_start)
EXTERN(_DebugExceptionVector)
EXTERN(_DoubleExceptionVector)
EXTERN(_KernelExceptionVector)
EXTERN(_NMIExceptionVector)
EXTERN(_UserExceptionVector)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wb_base = 0x00000110;
_memmap_cacheattr_wt_base = 0x00000110;
_memmap_cacheattr_bp_base = 0x00000220;
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
_memmap_cacheattr_wb_trapnull = 0x2222211F;
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
_memmap_cacheattr_wb_allvalid = 0x22222112;
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_allvalid = 0x22222222;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
.dport0.rodata : ALIGN(4)
{
_dport0_rodata_start = ABSOLUTE(.);
*(.dport0.rodata)
*(.dport.rodata)
_dport0_rodata_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.literal : ALIGN(4)
{
_dport0_literal_start = ABSOLUTE(.);
*(.dport0.literal)
*(.dport.literal)
_dport0_literal_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.data : ALIGN(4)
{
_dport0_data_start = ABSOLUTE(.);
*(.dport0.data)
*(.dport.data)
_dport0_data_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.data : ALIGN(4)
{
_data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
_data_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.rodata : ALIGN(4)
{
_rodata_start = ABSOLUTE(.);
*(.sdk.version)
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
*(.rodata1)
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame)
/* C++ constructor and destructor tables, properly ordered: */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
. = ALIGN(4); /* this table MUST be 4-byte aligned */
_bss_table_start = ABSOLUTE(.);
LONG(_bss_start)
LONG(_bss_end)
_bss_table_end = ABSOLUTE(.);
_rodata_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
{
. = ALIGN (8);
_bss_start = ABSOLUTE(.);
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
_bss_end = ABSOLUTE(.);
_heap_start = ABSOLUTE(.);
/* _stack_sentry = ALIGN(0x8); */
} >dram0_0_seg :dram0_0_bss_phdr
/* __stack = 0x3ffc8000; */
.text : ALIGN(4)
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.UserEnter.text)
. = ALIGN(16);
*(.DebugExceptionVector.text)
. = ALIGN(16);
*(.NMIExceptionVector.text)
. = ALIGN(16);
*(.KernelExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.UserExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.DoubleExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr
.lit4 : ALIGN(4)
{
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
} >iram1_0_seg :iram1_0_phdr
.irom0.text : ALIGN(4)
{
_irom0_text_start = ABSOLUTE(.);
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
_irom0_text_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr
}
/* get ROM code address */
INCLUDE "../ld/eagle.rom.addr.v6.ld"
sdk/esp_iot_sdk_v1.4.0/ld/eagle.app.v6.old.512.app1.ld
0 → 100644
View file @
a33e3a4a
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */
MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
iram1_0_seg : org = 0x40100000, len = 0x8000
irom0_0_seg : org = 0x40211000, len = 0x2B000
}
PHDRS
{
dport0_0_phdr PT_LOAD;
dram0_0_phdr PT_LOAD;
dram0_0_bss_phdr PT_LOAD;
iram1_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
}
/* Default entry point: */
ENTRY(call_user_start)
EXTERN(_DebugExceptionVector)
EXTERN(_DoubleExceptionVector)
EXTERN(_KernelExceptionVector)
EXTERN(_NMIExceptionVector)
EXTERN(_UserExceptionVector)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wb_base = 0x00000110;
_memmap_cacheattr_wt_base = 0x00000110;
_memmap_cacheattr_bp_base = 0x00000220;
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
_memmap_cacheattr_wb_trapnull = 0x2222211F;
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
_memmap_cacheattr_wb_allvalid = 0x22222112;
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_allvalid = 0x22222222;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
.dport0.rodata : ALIGN(4)
{
_dport0_rodata_start = ABSOLUTE(.);
*(.dport0.rodata)
*(.dport.rodata)
_dport0_rodata_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.literal : ALIGN(4)
{
_dport0_literal_start = ABSOLUTE(.);
*(.dport0.literal)
*(.dport.literal)
_dport0_literal_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.data : ALIGN(4)
{
_dport0_data_start = ABSOLUTE(.);
*(.dport0.data)
*(.dport.data)
_dport0_data_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.data : ALIGN(4)
{
_data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
_data_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.rodata : ALIGN(4)
{
_rodata_start = ABSOLUTE(.);
*(.sdk.version)
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
*(.rodata1)
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame)
/* C++ constructor and destructor tables, properly ordered: */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
. = ALIGN(4); /* this table MUST be 4-byte aligned */
_bss_table_start = ABSOLUTE(.);
LONG(_bss_start)
LONG(_bss_end)
_bss_table_end = ABSOLUTE(.);
_rodata_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
{
. = ALIGN (8);
_bss_start = ABSOLUTE(.);
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
_bss_end = ABSOLUTE(.);
_heap_start = ABSOLUTE(.);
/* _stack_sentry = ALIGN(0x8); */
} >dram0_0_seg :dram0_0_bss_phdr
/* __stack = 0x3ffc8000; */
.text : ALIGN(4)
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.UserEnter.text)
. = ALIGN(16);
*(.DebugExceptionVector.text)
. = ALIGN(16);
*(.NMIExceptionVector.text)
. = ALIGN(16);
*(.KernelExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.UserExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.DoubleExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr
.lit4 : ALIGN(4)
{
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
} >iram1_0_seg :iram1_0_phdr
.irom0.text : ALIGN(4)
{
_irom0_text_start = ABSOLUTE(.);
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
_irom0_text_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr
}
/* get ROM code address */
INCLUDE "../ld/eagle.rom.addr.v6.ld"
ld/eagle.app.v6.app2.ld
→
sdk/esp_iot_sdk_v1.4.0/
ld/eagle.app.v6.
old.512.
app2.ld
View file @
a33e3a4a
...
...
@@ -20,6 +20,11 @@ PHDRS
/* Default entry point: */
ENTRY(call_user_start)
EXTERN(_DebugExceptionVector)
EXTERN(_DoubleExceptionVector)
EXTERN(_KernelExceptionVector)
EXTERN(_NMIExceptionVector)
EXTERN(_UserExceptionVector)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wb_base = 0x00000110;
...
...
@@ -86,6 +91,7 @@ SECTIONS
.rodata : ALIGN(4)
{
_rodata_start = ABSOLUTE(.);
*(.sdk.version)
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
...
...
@@ -149,6 +155,30 @@ SECTIONS
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.UserEnter.text)
. = ALIGN(16);
*(.DebugExceptionVector.text)
. = ALIGN(16);
*(.NMIExceptionVector.text)
. = ALIGN(16);
*(.KernelExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.UserExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.DoubleExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
...
...
ld/eagle.rom.addr.v6.ld
→
sdk/esp_iot_sdk_v1.4.0/
ld/eagle.rom.addr.v6.ld
View file @
a33e3a4a
sdk/esp_iot_sdk_v1.4.0/lib/libat.a
0 → 100644
View file @
a33e3a4a
File added
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