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ruanhaishen
Nodemcu Firmware
Commits
b440b686
Commit
b440b686
authored
Jan 30, 2015
by
devsaurus
Browse files
u8glib v1.17
parent
33601462
Changes
93
Show whitespace changes
Inline
Side-by-side
app/u8glib/u8g_dev_st7565_64128n.c
0 → 100644
View file @
b440b686
/*
u8g_dev_st7565_64128n.c (Displaytech)
Universal 8bit Graphics Library
Copyright (c) 2011, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8g.h"
#define WIDTH 128
#define HEIGHT 64
#define PAGE_HEIGHT 8
/* init sequence from https://github.com/adafruit/ST7565-LCD/blob/master/ST7565/ST7565.cpp */
static
const
uint8_t
u8g_dev_st7565_64128n_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
U8G_ESC_RST
(
15
),
/* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
0x0A2
,
/* 0x0a2: LCD bias 1/9 (according to Displaytech 64128N datasheet) */
0x0A0
,
/* Normal ADC Select (according to Displaytech 64128N datasheet) */
0x0c8
,
/* common output mode: set scan direction normal operation/SHL Select, 0x0c0 --> SHL = 0, normal, 0x0c8 --> SHL = 1 */
0x040
,
/* Display start line for Displaytech 64128N */
0x028
|
0x04
,
/* power control: turn on voltage converter */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
0x028
|
0x06
,
/* power control: turn on voltage regulator */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
0x028
|
0x07
,
/* power control: turn on voltage follower */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
0x010
,
/* Set V0 voltage resistor ratio. Setting for controlling brightness of Displaytech 64128N */
0x0a6
,
/* display normal, bit val 0: LCD pixel off. */
0x081
,
/* set contrast */
0x01e
,
/* Contrast value. Setting for controlling brightness of Displaytech 64128N */
0x0af
,
/* display on */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0a5
,
/* display all points, ST7565 */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0a4
,
/* normal display */
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_st7565_64128n_data_start
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x010
,
/* set upper 4 bit of the col adr to 0x10 */
0x000
,
/* set lower 4 bit of the col adr to 0x00. Changed for DisplayTech 64128N */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_st7565_64128n_sleep_on
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x0ac
,
/* static indicator off */
0x000
,
/* indicator register set (not sure if this is required) */
0x0ae
,
/* display off */
0x0a5
,
/* all points on */
U8G_ESC_CS
(
0
),
/* disable chip, bugfix 12 nov 2014 */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_st7565_64128n_sleep_off
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x0a4
,
/* all points off */
0x0af
,
/* display on */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
U8G_ESC_CS
(
0
),
/* disable chip, bugfix 12 nov 2014 */
U8G_ESC_END
/* end of sequence */
};
uint8_t
u8g_dev_st7565_64128n_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_400NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_64128n_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_64128n_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
pb
->
p
.
page
);
/* select current page (ST7565R) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
if
(
u8g_pb_WriteBuffer
(
pb
,
u8g
,
dev
)
==
0
)
return
0
;
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
2
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
return
1
;
case
U8G_DEV_MSG_SLEEP_ON
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_64128n_sleep_on
);
return
1
;
case
U8G_DEV_MSG_SLEEP_OFF
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_64128n_sleep_off
);
return
1
;
}
return
u8g_dev_pb8v1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
uint8_t
u8g_dev_st7565_64128n_2x_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_400NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_64128n_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_64128n_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
(
2
*
pb
->
p
.
page
));
/* select current page (ST7565R) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
pb
->
width
,
pb
->
buf
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_64128n_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
(
2
*
pb
->
p
.
page
+
1
));
/* select current page (ST7565R) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
pb
->
width
,
(
uint8_t
*
)(
pb
->
buf
)
+
pb
->
width
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
2
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
return
1
;
case
U8G_DEV_MSG_SLEEP_ON
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_64128n_sleep_on
);
return
1
;
case
U8G_DEV_MSG_SLEEP_OFF
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_64128n_sleep_off
);
return
1
;
}
return
u8g_dev_pb16v1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
U8G_PB_DEV
(
u8g_dev_st7565_64128n_sw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7565_64128n_fn
,
U8G_COM_SW_SPI
);
U8G_PB_DEV
(
u8g_dev_st7565_64128n_hw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7565_64128n_fn
,
U8G_COM_HW_SPI
);
U8G_PB_DEV
(
u8g_dev_st7565_64128n_parallel
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7565_64128n_fn
,
U8G_COM_PARALLEL
);
uint8_t
u8g_dev_st7565_64128n_2x_buf
[
WIDTH
*
2
]
U8G_NOCOMMON
;
u8g_pb_t
u8g_dev_st7565_64128n_2x_pb
=
{
{
16
,
HEIGHT
,
0
,
0
,
0
},
WIDTH
,
u8g_dev_st7565_64128n_2x_buf
};
u8g_dev_t
u8g_dev_st7565_64128n_2x_sw_spi
=
{
u8g_dev_st7565_64128n_2x_fn
,
&
u8g_dev_st7565_64128n_2x_pb
,
U8G_COM_SW_SPI
};
u8g_dev_t
u8g_dev_st7565_64128n_2x_hw_spi
=
{
u8g_dev_st7565_64128n_2x_fn
,
&
u8g_dev_st7565_64128n_2x_pb
,
U8G_COM_HW_SPI
};
u8g_dev_t
u8g_dev_st7565_64128n_2x_hw_parallel
=
{
u8g_dev_st7565_64128n_2x_fn
,
&
u8g_dev_st7565_64128n_2x_pb
,
U8G_COM_PARALLEL
};
app/u8glib/u8g_dev_st7565_dogm128.c
0 → 100644
View file @
b440b686
/*
u8g_dev_st7565_dogm128.c
Universal 8bit Graphics Library
Copyright (c) 2011, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8g.h"
#define WIDTH 128
#define HEIGHT 64
#define PAGE_HEIGHT 8
const
uint8_t
u8g_dev_st7565_dogm128_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_RST
(
1
),
/* do reset low pulse with (1*16)+2 milliseconds */
U8G_ESC_CS
(
1
),
/* enable chip */
0x040
,
/* set display start line */
0x0a1
,
/* ADC set to reverse */
0x0c0
,
/* common output mode: set scan direction normal operation */
0x0a6
,
/* display normal (none reverse) */
0x0a2
,
/* LCD bias 1/9 */
0x02f
,
/* all power control circuits on */
0x0f8
,
/* set booster ratio to */
0x000
,
/* 4x */
0x027
,
/* set V0 voltage resistor ratio to large */
0x081
,
/* set contrast */
0x018
,
/* contrast value, EA default: 0x016 */
0x0ac
,
/* indicator */
0x000
,
/* disable */
0x0a4
,
/* normal display (not all on) */
0x0af
,
/* display on */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_st7565_dogm128_data_start
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x010
,
/* set upper 4 bit of the col adr to 0 */
0x000
,
/* set lower 4 bit of the col adr to 0 */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_st7565_dogm128_sleep_on
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x0ac
,
/* static indicator off */
0x000
,
/* indicator register set (not sure if this is required) */
0x0ae
,
/* display off */
0x0a5
,
/* all points on */
U8G_ESC_CS
(
0
),
/* disable chip, bugfix 12 nov 2014 */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_st7565_dogm128_sleep_off
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x0a4
,
/* all points off */
0x0af
,
/* display on */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
U8G_ESC_CS
(
0
),
/* disable chip, bugfix 12 nov 2014 */
U8G_ESC_END
/* end of sequence */
};
uint8_t
u8g_dev_st7565_dogm128_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_400NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_dogm128_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_dogm128_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
pb
->
p
.
page
);
/* select current page (ST7565R) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
if
(
u8g_pb_WriteBuffer
(
pb
,
u8g
,
dev
)
==
0
)
return
0
;
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
2
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
return
1
;
case
U8G_DEV_MSG_SLEEP_ON
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_dogm128_sleep_on
);
return
1
;
case
U8G_DEV_MSG_SLEEP_OFF
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_dogm128_sleep_off
);
return
1
;
}
return
u8g_dev_pb8v1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
uint8_t
u8g_dev_st7565_dogm128_2x_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_400NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_dogm128_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_dogm128_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
(
2
*
pb
->
p
.
page
));
/* select current page (ST7565R) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
pb
->
width
,
pb
->
buf
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_dogm128_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
(
2
*
pb
->
p
.
page
+
1
));
/* select current page (ST7565R) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
pb
->
width
,
(
uint8_t
*
)(
pb
->
buf
)
+
pb
->
width
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
2
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
return
1
;
case
U8G_DEV_MSG_SLEEP_ON
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_dogm128_sleep_on
);
return
1
;
case
U8G_DEV_MSG_SLEEP_OFF
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_dogm128_sleep_off
);
return
1
;
}
return
u8g_dev_pb16v1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
U8G_PB_DEV
(
u8g_dev_st7565_dogm128_sw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7565_dogm128_fn
,
U8G_COM_SW_SPI
);
U8G_PB_DEV
(
u8g_dev_st7565_dogm128_hw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7565_dogm128_fn
,
U8G_COM_HW_SPI
);
U8G_PB_DEV
(
u8g_dev_st7565_dogm128_parallel
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7565_dogm128_fn
,
U8G_COM_PARALLEL
);
uint8_t
u8g_dev_st7565_dogm128_2x_buf
[
WIDTH
*
2
]
U8G_NOCOMMON
;
u8g_pb_t
u8g_dev_st7565_dogm128_2x_pb
=
{
{
16
,
HEIGHT
,
0
,
0
,
0
},
WIDTH
,
u8g_dev_st7565_dogm128_2x_buf
};
u8g_dev_t
u8g_dev_st7565_dogm128_2x_sw_spi
=
{
u8g_dev_st7565_dogm128_2x_fn
,
&
u8g_dev_st7565_dogm128_2x_pb
,
U8G_COM_SW_SPI
};
u8g_dev_t
u8g_dev_st7565_dogm128_2x_hw_spi
=
{
u8g_dev_st7565_dogm128_2x_fn
,
&
u8g_dev_st7565_dogm128_2x_pb
,
U8G_COM_HW_SPI
};
u8g_dev_t
u8g_dev_st7565_dogm128_2x_parallel
=
{
u8g_dev_st7565_dogm128_2x_fn
,
&
u8g_dev_st7565_dogm128_2x_pb
,
U8G_COM_PARALLEL
};
app/u8glib/u8g_dev_st7565_dogm132.c
0 → 100644
View file @
b440b686
/*
u8g_dev_st7565_dogm132.c
Universal 8bit Graphics Library
Copyright (c) 2011, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8g.h"
#define WIDTH 132
#define HEIGHT 32
#define PAGE_HEIGHT 8
static
const
uint8_t
u8g_dev_st7565_dogm132_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_RST
(
1
),
/* do reset low pulse with (1*16)+2 milliseconds */
U8G_ESC_CS
(
1
),
/* enable chip */
0x040
,
/* set display start line to 0 */
0x0a1
,
/* ADC set to reverse */
0x0c0
,
/* common output mode */
0x0a6
,
/* display normal, bit val 0: LCD pixel off. */
0x0a2
,
/* LCD bias 1/9 */
0x02f
,
/* all power control circuits on */
0x0f8
,
/* set booster ratio to */
0x000
,
/* 4x */
0x023
,
/* set V0 voltage resistor ratio to large */
0x081
,
/* set contrast */
0x01f
,
/* contrast value, EA default: 0x01f */
0x0ac
,
/* indicator */
0x000
,
/* disable */
0x0af
,
/* display on */
#ifdef OBSOLETE_DOGM128
0x040
,
/* set display start line */
0x0c8
,
/* set scan direction inverse operation */
0x0a2
,
/* LCD bias 1/9 */
0x02f
,
/* all power control circuits on */
0x0f8
,
/* set booster ratio to */
0x000
,
/* 4x */
0x027
,
/* set V0 voltage resistor ratio to large */
0x081
,
/* set contrast */
0x018
,
/* contrast value, EA default: 0x016 */
0x0ac
,
/* indicator */
0x000
,
/* disable */
0x0af
,
/* display on */
#endif
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0a5
,
/* display all points, ST7565 */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0a4
,
/* normal display */
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_st7565_dogm132_data_start
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x010
,
/* set upper 4 bit of the col adr to 0 */
0x000
,
/* set lower 4 bit of the col adr to 0 */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_st7565_dogm132_sleep_on
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x0ac
,
/* static indicator off */
0x000
,
/* indicator register set (not sure if this is required) */
0x0ae
,
/* display off */
0x0a5
,
/* all points on */
U8G_ESC_CS
(
0
),
/* disable chip, bugfix 12 nov 2014 */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_st7565_dogm132_sleep_off
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x0a4
,
/* all points off */
0x0af
,
/* display on */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
U8G_ESC_CS
(
0
),
/* disable chip, bugfix 12 nov 2014 */
U8G_ESC_END
/* end of sequence */
};
uint8_t
u8g_dev_st7565_dogm132_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_400NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_dogm132_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_dogm132_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
pb
->
p
.
page
);
/* select current page (ST7565R) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
if
(
u8g_pb_WriteBuffer
(
pb
,
u8g
,
dev
)
==
0
)
return
0
;
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
2
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
return
1
;
case
U8G_DEV_MSG_SLEEP_ON
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_dogm132_sleep_on
);
return
1
;
case
U8G_DEV_MSG_SLEEP_OFF
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_dogm132_sleep_off
);
return
1
;
}
return
u8g_dev_pb8v1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
U8G_PB_DEV
(
u8g_dev_st7565_dogm132_sw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7565_dogm132_fn
,
U8G_COM_SW_SPI
);
U8G_PB_DEV
(
u8g_dev_st7565_dogm132_hw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7565_dogm132_fn
,
U8G_COM_HW_SPI
);
app/u8glib/u8g_dev_st7565_lm6059.c
0 → 100644
View file @
b440b686
/*
u8g_dev_st7565_lm6059.c (Adafruit display)
Universal 8bit Graphics Library
Copyright (c) 2011, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8g.h"
#define WIDTH 128
#define HEIGHT 64
#define PAGE_HEIGHT 8
/* init sequence from https://github.com/adafruit/ST7565-LCD/blob/master/ST7565/ST7565.cpp */
static
const
uint8_t
u8g_dev_st7565_lm6059_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
U8G_ESC_RST
(
15
),
/* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
0x0a3
,
/* 0x0a2: LCD bias 1/9 (suggested for the LM6063), 0x0a3: Used by Adafruit, 0x0a2 does not work */
/* the LM6059 vs LM6063, ADC and SHL have inverted settings */
0x0a0
,
/* 0x0a1: ADC set to normal (suggested for the LM6059), 0x0a0: Used by Adafruit -> normal mode */
0x0c8
,
/* common output mode: set scan direction normal operation/SHL Select, 0x0c0 --> SHL = 0, normal, 0x0c8 --> SHL = 1 */
0x060
,
/* set display start line */
0x028
|
0x04
,
/* power control: turn on voltage converter */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
0x028
|
0x06
,
/* power control: turn on voltage regulator */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
0x028
|
0x07
,
/* power control: turn on voltage follower */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
0x026
,
/* set V0 voltage resistor ratio to 6 (Adafruit Value, no info from LM6063 Manual) */
0x0a6
,
/* display normal, bit val 0: LCD pixel off. */
0x081
,
/* set contrast */
0x018
,
/* contrast value*/
/*0x0ac,*/
/* indicator */
/*0x000,*/
/* disable */
0x0af
,
/* display on */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0a5
,
/* display all points, ST7565 */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0a4
,
/* normal display */
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_st7565_lm6059_data_start
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x010
,
/* set upper 4 bit of the col adr to 0 */
0x001
,
/* set lower 4 bit of the col adr */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_st7565_lm6059_sleep_on
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x0ac
,
/* static indicator off */
0x000
,
/* indicator register set (not sure if this is required) */
0x0ae
,
/* display off */
0x0a5
,
/* all points on */
U8G_ESC_CS
(
0
),
/* disable chip, bugfix 12 nov 2014 */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_st7565_lm6059_sleep_off
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x0a4
,
/* all points off */
0x0af
,
/* display on */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
U8G_ESC_CS
(
0
),
/* disable chip, bugfix 12 nov 2014 */
U8G_ESC_END
/* end of sequence */
};
uint8_t
u8g_dev_st7565_lm6059_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_400NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_lm6059_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_lm6059_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
pb
->
p
.
page
);
/* select current page (ST7565R) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
if
(
u8g_pb_WriteBuffer
(
pb
,
u8g
,
dev
)
==
0
)
return
0
;
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
2
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
return
1
;
case
U8G_DEV_MSG_SLEEP_ON
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_lm6059_sleep_on
);
return
1
;
case
U8G_DEV_MSG_SLEEP_OFF
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_lm6059_sleep_off
);
return
1
;
}
return
u8g_dev_pb8v1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
uint8_t
u8g_dev_st7565_lm6059_2x_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_400NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_lm6059_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_lm6059_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
(
2
*
pb
->
p
.
page
));
/* select current page (ST7565R) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
pb
->
width
,
pb
->
buf
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_lm6059_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
(
2
*
pb
->
p
.
page
+
1
));
/* select current page (ST7565R) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
pb
->
width
,
(
uint8_t
*
)(
pb
->
buf
)
+
pb
->
width
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
2
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
return
1
;
case
U8G_DEV_MSG_SLEEP_ON
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_lm6059_sleep_on
);
return
1
;
case
U8G_DEV_MSG_SLEEP_OFF
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_lm6059_sleep_off
);
return
1
;
}
return
u8g_dev_pb16v1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
U8G_PB_DEV
(
u8g_dev_st7565_lm6059_sw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7565_lm6059_fn
,
U8G_COM_SW_SPI
);
U8G_PB_DEV
(
u8g_dev_st7565_lm6059_hw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7565_lm6059_fn
,
U8G_COM_HW_SPI
);
uint8_t
u8g_dev_st7565_lm6059_2x_buf
[
WIDTH
*
2
]
U8G_NOCOMMON
;
u8g_pb_t
u8g_dev_st7565_lm6059_2x_pb
=
{
{
16
,
HEIGHT
,
0
,
0
,
0
},
WIDTH
,
u8g_dev_st7565_lm6059_2x_buf
};
u8g_dev_t
u8g_dev_st7565_lm6059_2x_sw_spi
=
{
u8g_dev_st7565_lm6059_2x_fn
,
&
u8g_dev_st7565_lm6059_2x_pb
,
U8G_COM_SW_SPI
};
u8g_dev_t
u8g_dev_st7565_lm6059_2x_hw_spi
=
{
u8g_dev_st7565_lm6059_2x_fn
,
&
u8g_dev_st7565_lm6059_2x_pb
,
U8G_COM_HW_SPI
};
app/u8glib/u8g_dev_st7565_lm6063.c
0 → 100644
View file @
b440b686
/*
u8g_dev_st7565_lm6063.c
Universal 8bit Graphics Library
Copyright (c) 2011, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8g.h"
#define WIDTH 128
#define HEIGHT 64
#define PAGE_HEIGHT 8
#ifdef OLD_ADAFRUIT_CODE
static
const
uint8_t
OLD_u8g_dev_st7565_lm6063_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_RST
(
1
),
/* do reset low pulse with (1*16)+2 milliseconds */
U8G_ESC_CS
(
1
),
/* enable chip */
0x040
,
/* set display start line */
0x0a1
,
/* ADC set to reverse */
0x0c8
,
/* common output mode: set scan direction normal operation/SHL Select / 17 Jan: seems to be a bug, must be 0x0c0 */
0x0a6
,
/* display normal, bit val 0: LCD pixel off. */
0x0a2
,
/* LCD bias 1/9 */
0x02f
,
/* all power control circuits on */
/*0x0f8,*/
/* set booster ratio to */
/*0x000, */
/* 4x */
/*0x027,*/
/* set V0 voltage resistor ratio to large */
0x081
,
/* set contrast */
0x018
,
/* contrast value*/
0x0ac
,
/* indicator */
0x000
,
/* disable */
0x0af
,
/* display on */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0a5
,
/* display all points, ST7565 */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0a4
,
/* normal display */
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
#endif
/* init sequence from https://github.com/adafruit/ST7565-LCD/blob/master/ST7565/ST7565.cpp */
static
const
uint8_t
u8g_dev_st7565_lm6063_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
U8G_ESC_RST
(
15
),
/* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
0x0a3
,
/* 0x0a2: LCD bias 1/9 (suggested for the LM6063), 0x0a3: Used by Adafruit */
0x0a1
,
/* 0x0a1: ADC set to reverse (suggested for the LM6063), 0x0a0: Used by Adafruit -> normal mode */
0x0c0
,
/* common output mode: set scan direction normal operation/SHL Select, 0x0c0 --> SHL = 0, normal, 0x0c8 --> SHL = 1 */
0x040
,
/* set display start line */
0x028
|
0x04
,
/* power control: turn on voltage converter */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
0x028
|
0x06
,
/* power control: turn on voltage regulator */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
0x028
|
0x07
,
/* power control: turn on voltage follower */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
0x026
,
/* set V0 voltage resistor ratio to 6 (Adafruit Value, no info from LM6063 Manual) */
0x0a6
,
/* display normal, bit val 0: LCD pixel off. */
0x081
,
/* set contrast */
0x018
,
/* contrast value*/
/*0x0ac,*/
/* indicator */
/*0x000,*/
/* disable */
0x0af
,
/* display on */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0a5
,
/* display all points, ST7565 */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0a4
,
/* normal display */
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_st7565_lm6063_data_start
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x010
,
/* set upper 4 bit of the col adr to 0 */
0x000
,
/* set lower 4 bit of the col adr to 0 */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_st7565_st7565_sleep_on
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x0ac
,
/* static indicator off */
0x000
,
/* indicator register set (not sure if this is required) */
0x0ae
,
/* display off */
0x0a5
,
/* all points on */
U8G_ESC_CS
(
0
),
/* disable chip, bugfix 12 nov 2014 */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_st7565_st7565_sleep_off
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x0a4
,
/* all points off */
0x0af
,
/* display on */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
U8G_ESC_CS
(
0
),
/* disable chip, bugfix 12 nov 2014 */
U8G_ESC_END
/* end of sequence */
};
uint8_t
u8g_dev_st7565_lm6063_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_400NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_lm6063_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_lm6063_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
pb
->
p
.
page
);
/* select current page (ST7565R) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
if
(
u8g_pb_WriteBuffer
(
pb
,
u8g
,
dev
)
==
0
)
return
0
;
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
2
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
return
1
;
case
U8G_DEV_MSG_SLEEP_ON
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_st7565_sleep_on
);
return
1
;
case
U8G_DEV_MSG_SLEEP_OFF
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_st7565_sleep_off
);
return
1
;
}
return
u8g_dev_pb8v1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
uint8_t
u8g_dev_st7565_lm6063_2x_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_400NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_lm6063_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_lm6063_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
(
2
*
pb
->
p
.
page
));
/* select current page (ST7565R) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
pb
->
width
,
pb
->
buf
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_lm6063_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
(
2
*
pb
->
p
.
page
+
1
));
/* select current page (ST7565R) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
pb
->
width
,
(
uint8_t
*
)(
pb
->
buf
)
+
pb
->
width
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
2
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
return
1
;
case
U8G_DEV_MSG_SLEEP_ON
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_st7565_sleep_on
);
return
1
;
case
U8G_DEV_MSG_SLEEP_OFF
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_st7565_sleep_off
);
return
1
;
}
return
u8g_dev_pb16v1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
U8G_PB_DEV
(
u8g_dev_st7565_lm6063_sw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7565_lm6063_fn
,
U8G_COM_SW_SPI
);
U8G_PB_DEV
(
u8g_dev_st7565_lm6063_hw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7565_lm6063_fn
,
U8G_COM_HW_SPI
);
uint8_t
u8g_dev_st7565_lm6063_2x_buf
[
WIDTH
*
2
]
U8G_NOCOMMON
;
u8g_pb_t
u8g_dev_st7565_lm6063_2x_pb
=
{
{
16
,
HEIGHT
,
0
,
0
,
0
},
WIDTH
,
u8g_dev_st7565_lm6063_2x_buf
};
u8g_dev_t
u8g_dev_st7565_lm6063_2x_sw_spi
=
{
u8g_dev_st7565_lm6063_2x_fn
,
&
u8g_dev_st7565_lm6063_2x_pb
,
U8G_COM_SW_SPI
};
u8g_dev_t
u8g_dev_st7565_lm6063_2x_hw_spi
=
{
u8g_dev_st7565_lm6063_2x_fn
,
&
u8g_dev_st7565_lm6063_2x_pb
,
U8G_COM_HW_SPI
};
app/u8glib/u8g_dev_st7565_nhd_c12832.c
0 → 100644
View file @
b440b686
/*
u8g_dev_st7565_nhd_c12832.c
Universal 8bit Graphics Library
Copyright (c) 2011, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8g.h"
#define WIDTH 128
#define HEIGHT 32
#define PAGE_HEIGHT 8
static
const
uint8_t
u8g_dev_st7565_c12832_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_RST
(
1
),
/* do reset low pulse with (1*16)+2 milliseconds */
U8G_ESC_CS
(
1
),
/* enable chip */
0x040
,
/* set display start line to 0 */
0x0a0
,
/* ADC set, values: a0=normal, a1=reverse */
0x0c8
,
/* common output mode: c0=normal, c8=reverse */
0x0a6
,
/* display normal, bit val 0: LCD pixel off. */
0x0a2
,
/* LCD bias 1/9 */
0x02f
,
/* all power control circuits on */
0x0f8
,
/* set booster ratio to */
0x000
,
/* 4x */
0x023
,
/* set V0 voltage resistor ratio to large */
0x081
,
/* set contrast */
0x00a
,
/* contrast value */
0x0ac
,
/* indicator */
0x000
,
/* disable */
0x0af
,
/* display on */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0a5
,
/* display all points, ST7565 */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0a4
,
/* normal display */
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_st7565_c12832_data_start
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x010
,
/* set upper 4 bit of the col adr to 0 */
0x000
,
/* set lower 4 bit of the col adr to 0 */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_st7565_c12832_sleep_on
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x0ac
,
/* static indicator off */
0x000
,
/* indicator register set (not sure if this is required) */
0x0ae
,
/* display off */
0x0a5
,
/* all points on */
U8G_ESC_CS
(
0
),
/* disable chip, bugfix 12 nov 2014 */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_st7565_c12832_sleep_off
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x0a4
,
/* all points off */
0x0af
,
/* display on */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
U8G_ESC_CS
(
0
),
/* disable chip, bugfix 12 nov 2014 */
U8G_ESC_END
/* end of sequence */
};
uint8_t
u8g_dev_st7565_c12832_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_400NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_c12832_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_c12832_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
pb
->
p
.
page
);
/* select current page (ST7565R) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
if
(
u8g_pb_WriteBuffer
(
pb
,
u8g
,
dev
)
==
0
)
return
0
;
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
2
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
return
1
;
case
U8G_DEV_MSG_SLEEP_ON
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_c12832_sleep_on
);
return
1
;
case
U8G_DEV_MSG_SLEEP_OFF
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_c12832_sleep_off
);
return
1
;
}
return
u8g_dev_pb8v1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
U8G_PB_DEV
(
u8g_dev_st7565_nhd_c12832_sw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7565_c12832_fn
,
U8G_COM_SW_SPI
);
U8G_PB_DEV
(
u8g_dev_st7565_nhd_c12832_hw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7565_c12832_fn
,
U8G_COM_HW_SPI
);
U8G_PB_DEV
(
u8g_dev_st7565_nhd_c12832_parallel
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7565_c12832_fn
,
U8G_COM_PARALLEL
);
U8G_PB_DEV
(
u8g_dev_st7565_nhd_c12832_hw_usart_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7565_c12832_fn
,
U8G_COM_HW_USART_SPI
);
app/u8glib/u8g_dev_st7565_nhd_c12864.c
0 → 100644
View file @
b440b686
/*
u8g_dev_st7565_nhd_c12864.c
Support for the NHD-C12864A1Z-FSB-FBW (Newhaven Display)
Universal 8bit Graphics Library
Copyright (c) 2012, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8g.h"
#define WIDTH 128
#define HEIGHT 64
#define PAGE_HEIGHT 8
const
uint8_t
u8g_dev_st7565_nhd_c12864_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_RST
(
10
),
/* do reset low pulse with (10*16)+2 milliseconds */
U8G_ESC_CS
(
1
),
/* enable chip */
0x040
,
/* set display start line */
0x0a1
,
/* ADC set to reverse */
0x0c0
,
/* common output mode: set scan direction normal operation */
0x0a6
,
/* display normal, bit val 0: LCD pixel off. */
0x0a2
,
/* LCD bias 1/9 */
0x02f
,
/* all power control circuits on */
0x0f8
,
/* set booster ratio to */
0x000
,
/* 4x */
0x027
,
/* set V0 voltage resistor ratio to large */
0x081
,
/* set contrast */
0x008
,
/* contrast: 0x008 is a good value for NHD C12864, Nov 2012: User reports that 0x1a is much better */
0x0ac
,
/* indicator */
0x000
,
/* disable */
0x0af
,
/* display on */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0a5
,
/* display all points, ST7565 */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0a4
,
/* normal display */
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_st7565_nhd_c12864_data_start
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x010
,
/* set upper 4 bit of the col adr to 0 */
0x004
,
/* set lower 4 bit of the col adr to 4 (NHD C12864) */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_st7565_c12864_sleep_on
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x0ac
,
/* static indicator off */
0x000
,
/* indicator register set (not sure if this is required) */
0x0ae
,
/* display off */
0x0a5
,
/* all points on */
U8G_ESC_CS
(
0
),
/* disable chip, bugfix 12 nov 2014 */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_st7565_c12864_sleep_off
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x0a4
,
/* all points off */
0x0af
,
/* display on */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
U8G_ESC_CS
(
0
),
/* disable chip, bugfix 12 nov 2014 */
U8G_ESC_END
/* end of sequence */
};
uint8_t
u8g_dev_st7565_nhd_c12864_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_400NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_nhd_c12864_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_nhd_c12864_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
pb
->
p
.
page
);
/* select current page (ST7565R) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
if
(
u8g_pb_WriteBuffer
(
pb
,
u8g
,
dev
)
==
0
)
return
0
;
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
2
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
return
1
;
case
U8G_DEV_MSG_SLEEP_ON
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_c12864_sleep_on
);
return
1
;
case
U8G_DEV_MSG_SLEEP_OFF
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_c12864_sleep_off
);
return
1
;
}
return
u8g_dev_pb8v1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
uint8_t
u8g_dev_st7565_nhd_c12864_2x_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_400NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_nhd_c12864_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_nhd_c12864_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
(
2
*
pb
->
p
.
page
));
/* select current page (ST7565R) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
pb
->
width
,
pb
->
buf
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_nhd_c12864_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
(
2
*
pb
->
p
.
page
+
1
));
/* select current page (ST7565R) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
pb
->
width
,
(
uint8_t
*
)(
pb
->
buf
)
+
pb
->
width
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
2
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
return
1
;
case
U8G_DEV_MSG_SLEEP_ON
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_c12864_sleep_on
);
return
1
;
case
U8G_DEV_MSG_SLEEP_OFF
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7565_c12864_sleep_off
);
return
1
;
}
return
u8g_dev_pb16v1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
U8G_PB_DEV
(
u8g_dev_st7565_nhd_c12864_sw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7565_nhd_c12864_fn
,
U8G_COM_SW_SPI
);
U8G_PB_DEV
(
u8g_dev_st7565_nhd_c12864_hw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7565_nhd_c12864_fn
,
U8G_COM_HW_SPI
);
uint8_t
u8g_dev_st7565_nhd_c12864_2x_buf
[
WIDTH
*
2
]
U8G_NOCOMMON
;
u8g_pb_t
u8g_dev_st7565_nhd_c12864_2x_pb
=
{
{
16
,
HEIGHT
,
0
,
0
,
0
},
WIDTH
,
u8g_dev_st7565_nhd_c12864_2x_buf
};
u8g_dev_t
u8g_dev_st7565_nhd_c12864_2x_sw_spi
=
{
u8g_dev_st7565_nhd_c12864_2x_fn
,
&
u8g_dev_st7565_nhd_c12864_2x_pb
,
U8G_COM_SW_SPI
};
u8g_dev_t
u8g_dev_st7565_nhd_c12864_2x_hw_spi
=
{
u8g_dev_st7565_nhd_c12864_2x_fn
,
&
u8g_dev_st7565_nhd_c12864_2x_pb
,
U8G_COM_HW_SPI
};
app/u8glib/u8g_dev_st7687_c144mvgd.c
0 → 100644
View file @
b440b686
/*
u8g_dev_st7687_c144mvgd.c (1.44" TFT)
Status: Started, but not finished
Universal 8bit Graphics Library
Copyright (c) 2012, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8g.h"
#define WIDTH 128
#define HEIGHT 128
#define PAGE_HEIGHT 8
#ifdef FIRST_VERSION
/*
see also: read.pudn.com/downloads115/sourcecode/app/484503/LCM_Display.c__.htm
http://en.pudn.com/downloads115/sourcecode/app/detail484503_en.html
*/
static
const
uint8_t
u8g_dev_st7687_c144mvgd_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
U8G_ESC_RST
(
15
),
/* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
0x001
,
/* A0=0, SW reset */
U8G_ESC_DLY
(
200
),
/* delay 200 ms */
0x0d7
,
/* EEPROM data auto re-load control */
U8G_ESC_ADR
(
1
),
/* data mode */
0x09f
,
/* ARD = 1 */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0e0
,
/* EEPROM control in */
U8G_ESC_ADR
(
1
),
/* data mode */
0x000
,
/* */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
#ifdef NOT_REQUIRED
0x0fa
,
/* EEPROM function selection 8.1.66 */
U8G_ESC_ADR
(
1
),
/* data mode */
0x000
,
/* */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
#endif
0x0e3
,
/* Read from EEPROM, 8.1.55 */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0e1
,
/* EEPROM control out, 8.1.53 */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
//0x028, /* display off */
0x011
,
/* Sleep out & booster on */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0c0
,
/* Vop setting, 8.1.42 */
U8G_ESC_ADR
(
1
),
/* data mode */
0x000
,
/* */
0x001
,
/* 3.6 + 256*0.04 = 13.84 Volt */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0c3
,
/* Bias selection, 8.1.45 */
U8G_ESC_ADR
(
1
),
/* data mode */
0x003
,
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x0c4
,
/* Booster setting 8.1.46 */
U8G_ESC_ADR
(
1
),
/* data mode */
0x007
,
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x0c5
,
/* ??? */
U8G_ESC_ADR
(
1
),
/* data mode */
0x001
,
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x0cb
,
/* FV3 with Booster x2 control, 8.1.47 */
U8G_ESC_ADR
(
1
),
/* data mode */
0x001
,
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x036
,
/* Memory data access control, 8.1.28 */
U8G_ESC_ADR
(
1
),
/* data mode */
0x080
,
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x0b5
,
/* N-line control, 8.1.37 */
U8G_ESC_ADR
(
1
),
/* data mode */
0x089
,
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x0d0
,
/* Analog circuit setting, 8.1.49 */
U8G_ESC_ADR
(
1
),
/* data mode */
0x01d
,
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x0b7
,
/* Com/Seg Scan Direction, 8.1.38 */
U8G_ESC_ADR
(
1
),
/* data mode */
0x040
,
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x025
,
/* Write contrast, 8.1.17 */
U8G_ESC_ADR
(
1
),
/* data mode */
0x03f
,
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x03a
,
/* Interface pixel format, 8.1.32 */
U8G_ESC_ADR
(
1
),
/* data mode */
0x004
,
/* 3: 12 bit per pixel Type A, 4: 12 bit Type B, 5: 16bit per pixel */
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x0b0
,
/* Display Duty setting, 8.1.34 */
U8G_ESC_ADR
(
1
),
/* data mode */
0x07f
,
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x0f0
,
/* Frame Freq. in Temp range A,B,C and D, 8.1.59 */
U8G_ESC_ADR
(
1
),
/* data mode */
0x007
,
0x00c
,
0x00c
,
0x015
,
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x0f9
,
/* Frame RGB Value, 8.1.65 */
U8G_ESC_ADR
(
1
),
/* data mode */
0x000
,
0x005
,
0x008
,
0x00a
,
0x00c
,
0x00e
,
0x010
,
0x011
,
0x012
,
0x013
,
0x014
,
0x015
,
0x016
,
0x018
,
0x01a
,
0x01b
,
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x0f9
,
/* Frame RGB Value, 8.1.65 */
U8G_ESC_ADR
(
1
),
/* data mode */
0x000
,
0x000
,
0x000
,
0x000
,
0x033
,
0x055
,
0x055
,
0x055
,
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x029
,
/* display on */
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
#else
/*
http://www.waitingforfriday.com/images/e/e3/FTM144D01N_test.zip
*/
static
const
uint8_t
u8g_dev_st7687_c144mvgd_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
U8G_ESC_RST
(
15
),
/* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
0x011
,
/* Sleep out & booster on */
U8G_ESC_DLY
(
5
),
/* delay 5 ms */
0x03a
,
/* Interface pixel format, 8.1.32 */
U8G_ESC_ADR
(
1
),
/* data mode */
0x004
,
/* 3: 12 bit per pixel Type A, 4: 12 bit Type B, 5: 16bit per pixel */
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x026
,
/* SET_GAMMA_CURVE */
U8G_ESC_ADR
(
1
),
/* data mode */
0x004
,
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x0f2
,
/* GAM_R_SEL */
U8G_ESC_ADR
(
1
),
/* data mode */
0x001
,
/* enable gamma adj */
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x0e0
,
/* POSITIVE_GAMMA_CORRECT */
U8G_ESC_ADR
(
1
),
/* data mode */
0x3f
,
0x25
,
0x1c
,
0x1e
,
0x20
,
0x12
,
0x2a
,
0x90
,
0x24
,
0x11
,
0x00
,
0x00
,
0x00
,
0x00
,
0x00
,
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x0e1
,
/* NEGATIVE_GAMMA_CORRECT */
U8G_ESC_ADR
(
1
),
/* data mode */
0x20
,
0x20
,
0x20
,
0x20
,
0x05
,
0x00
,
0x15
,
0xa7
,
0x3d
,
0x18
,
0x25
,
0x2a
,
0x2b
,
0x2b
,
0x3a
,
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x0b1
,
/* FRAME_RATE_CONTROL1 */
U8G_ESC_ADR
(
1
),
/* data mode */
0x008
,
/* DIVA = 8 */
0x008
,
/* VPA = 8 */
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x0b4
,
/* DISPLAY_INVERSION */
U8G_ESC_ADR
(
1
),
/* data mode */
0x007
,
/* NLA = 1, NLB = 1, NLC = 1 (all on Frame Inversion) */
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x0c0
,
/* POWER_CONTROL1 */
U8G_ESC_ADR
(
1
),
/* data mode */
0x00a
,
/* VRH = 10: GVDD = 4.30 */
0x002
,
/* VC = 2: VCI1 = 2.65 */
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x0c1
,
/* POWER_CONTROL2 */
U8G_ESC_ADR
(
1
),
/* data mode */
0x002
,
/* BT = 2: AVDD = 2xVCI1, VCL = -1xVCI1, VGH = 5xVCI1, VGL = -2xVCI1 */
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x0c5
,
/* VCOM_CONTROL1 */
U8G_ESC_ADR
(
1
),
/* data mode */
0x050
,
/* VMH = 80: VCOMH voltage = 4.5 */
0x05b
,
/* VML = 91: VCOML voltage = -0.225 */
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x0c7
,
/* VCOM_OFFSET_CONTROL */
U8G_ESC_ADR
(
1
),
/* data mode */
0x040
,
/* nVM = 0, VMF = 64: VCOMH output = VMH, VCOML output = VML */
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x02a
,
/* SET_COLUMN_ADDRESS */
U8G_ESC_ADR
(
1
),
/* data mode */
0x000
,
/* */
0x000
,
/* */
0x000
,
/* */
0x07f
,
/* */
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x02b
,
/* SET_PAGE_ADDRESS */
U8G_ESC_ADR
(
1
),
/* data mode */
0x000
,
/* */
0x000
,
/* */
0x000
,
/* */
0x07f
,
/* */
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x036
,
/* SET_ADDRESS_MODE */
U8G_ESC_ADR
(
1
),
/* data mode */
0x000
,
/* Select display orientation */
U8G_ESC_ADR
(
0
),
/* instruction mode */
0x029
,
/* display on */
0x02c
,
/* write start */
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
#endif
/* calculate bytes for Type B 4096 color display */
static
uint8_t
get_byte_1
(
uint8_t
v
)
{
v
>>=
4
;
v
&=
0x0e
;
return
v
;
}
static
uint8_t
get_byte_2
(
uint8_t
v
)
{
uint8_t
w
;
w
=
v
;
w
&=
3
;
w
=
(
w
<<
2
)
|
w
;
v
<<=
3
;
v
&=
0x0e0
;
w
|=
v
;
return
w
;
}
uint8_t
u8g_dev_st7687_c144mvgd_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_400NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7687_c144mvgd_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
uint8_t
y
,
i
,
j
;
uint8_t
*
ptr
;
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* cmd mode */
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
y
=
pb
->
p
.
page_y0
;
ptr
=
pb
->
buf
;
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* cmd mode */
u8g_WriteByte
(
u8g
,
dev
,
0x02a
);
/* Column address set 8.1.20 */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteByte
(
u8g
,
dev
,
0x000
);
/* x0 */
u8g_WriteByte
(
u8g
,
dev
,
WIDTH
-
1
);
/* x1 */
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* cmd mode */
u8g_WriteByte
(
u8g
,
dev
,
0x02b
);
/* Row address set 8.1.21 */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteByte
(
u8g
,
dev
,
y
);
/* y0 */
u8g_WriteByte
(
u8g
,
dev
,
y
+
PAGE_HEIGHT
-
1
);
/* y1 */
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* cmd mode */
u8g_WriteByte
(
u8g
,
dev
,
0x02c
);
/* Memory write 8.1.22 */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
for
(
i
=
0
;
i
<
PAGE_HEIGHT
;
i
++
)
{
for
(
j
=
0
;
j
<
WIDTH
;
j
++
)
{
u8g_WriteByte
(
u8g
,
dev
,
get_byte_1
(
*
ptr
)
);
u8g_WriteByte
(
u8g
,
dev
,
get_byte_2
(
*
ptr
)
);
ptr
++
;
}
}
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* cmd mode */
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
}
return
u8g_dev_pb8h8_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
uint8_t
u8g_st7687_c144mvgd_8h8_buf
[
WIDTH
*
8
]
U8G_NOCOMMON
;
u8g_pb_t
u8g_st7687_c144mvgd_8h8_pb
=
{
{
8
,
HEIGHT
,
0
,
0
,
0
},
WIDTH
,
u8g_st7687_c144mvgd_8h8_buf
};
u8g_dev_t
u8g_dev_st7687_c144mvgd_sw_spi
=
{
u8g_dev_st7687_c144mvgd_fn
,
&
u8g_st7687_c144mvgd_8h8_pb
,
u8g_com_arduino_sw_spi_fn
};
u8g_dev_t
u8g_dev_st7687_c144mvgd_8bit
=
{
u8g_dev_st7687_c144mvgd_fn
,
&
u8g_st7687_c144mvgd_8h8_pb
,
U8G_COM_PARALLEL
};
app/u8glib/u8g_dev_st7920_128x64.c
0 → 100644
View file @
b440b686
/*
u8g_dev_st7920_128x64.c
Universal 8bit Graphics Library
Copyright (c) 2011, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8g.h"
#define WIDTH 128
#define HEIGHT 64
#define PAGE_HEIGHT 8
/* init sequence from https://github.com/adafruit/ST7565-LCD/blob/master/ST7565/ST7565.cpp */
static
const
uint8_t
u8g_dev_st7920_128x64_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_RST
(
15
),
/* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
U8G_ESC_DLY
(
100
),
/* 8 Dez 2012: additional delay 100 ms because of reset*/
U8G_ESC_CS
(
1
),
/* enable chip */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
0x038
,
/* 8 Bit interface (DL=1), basic instruction set (RE=0) */
0x00c
,
/* display on, cursor & blink off; 0x08: all off */
0x006
,
/* Entry mode: Cursor move to right ,DDRAM address counter (AC) plus 1, no shift */
0x002
,
/* disable scroll, enable CGRAM adress */
0x001
,
/* clear RAM, needs 1.6 ms */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
uint8_t
u8g_dev_st7920_128x64_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_400NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7920_128x64_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
uint8_t
y
,
i
;
uint8_t
*
ptr
;
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* cmd mode */
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
y
=
pb
->
p
.
page_y0
;
ptr
=
pb
->
buf
;
for
(
i
=
0
;
i
<
8
;
i
++
)
{
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* cmd mode */
u8g_WriteByte
(
u8g
,
dev
,
0x03e
);
/* enable extended mode */
if
(
y
<
32
)
{
u8g_WriteByte
(
u8g
,
dev
,
0x080
|
y
);
/* y pos */
u8g_WriteByte
(
u8g
,
dev
,
0x080
);
/* set x pos to 0*/
}
else
{
u8g_WriteByte
(
u8g
,
dev
,
0x080
|
(
y
-
32
)
);
/* y pos */
u8g_WriteByte
(
u8g
,
dev
,
0x080
|
8
);
/* set x pos to 64*/
}
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
WIDTH
/
8
,
ptr
);
ptr
+=
WIDTH
/
8
;
y
++
;
}
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
}
return
u8g_dev_pb8h1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
uint8_t
u8g_dev_st7920_128x64_4x_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_400NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7920_128x64_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
uint8_t
y
,
i
;
uint8_t
*
ptr
;
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* cmd mode */
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
y
=
pb
->
p
.
page_y0
;
ptr
=
pb
->
buf
;
for
(
i
=
0
;
i
<
32
;
i
++
)
{
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* cmd mode */
u8g_WriteByte
(
u8g
,
dev
,
0x03e
);
/* enable extended mode */
if
(
y
<
32
)
{
u8g_WriteByte
(
u8g
,
dev
,
0x080
|
y
);
/* y pos */
u8g_WriteByte
(
u8g
,
dev
,
0x080
);
/* set x pos to 0*/
}
else
{
u8g_WriteByte
(
u8g
,
dev
,
0x080
|
(
y
-
32
)
);
/* y pos */
u8g_WriteByte
(
u8g
,
dev
,
0x080
|
8
);
/* set x pos to 64*/
}
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
WIDTH
/
8
,
ptr
);
ptr
+=
WIDTH
/
8
;
y
++
;
}
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
}
return
u8g_dev_pb32h1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
U8G_PB_DEV
(
u8g_dev_st7920_128x64_sw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7920_128x64_fn
,
U8G_COM_ST7920_SW_SPI
);
U8G_PB_DEV
(
u8g_dev_st7920_128x64_hw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7920_128x64_fn
,
U8G_COM_ST7920_HW_SPI
);
U8G_PB_DEV
(
u8g_dev_st7920_128x64_8bit
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7920_128x64_fn
,
U8G_COM_FAST_PARALLEL
);
U8G_PB_DEV
(
u8g_dev_st7920_128x64_custom
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7920_128x64_fn
,
u8g_com_arduino_st7920_custom_fn
);
#define QWIDTH (WIDTH*4)
uint8_t
u8g_dev_st7920_128x64_4x_buf
[
QWIDTH
]
U8G_NOCOMMON
;
u8g_pb_t
u8g_dev_st7920_128x64_4x_pb
=
{
{
32
,
HEIGHT
,
0
,
0
,
0
},
WIDTH
,
u8g_dev_st7920_128x64_4x_buf
};
u8g_dev_t
u8g_dev_st7920_128x64_4x_sw_spi
=
{
u8g_dev_st7920_128x64_4x_fn
,
&
u8g_dev_st7920_128x64_4x_pb
,
U8G_COM_ST7920_SW_SPI
};
u8g_dev_t
u8g_dev_st7920_128x64_4x_hw_spi
=
{
u8g_dev_st7920_128x64_4x_fn
,
&
u8g_dev_st7920_128x64_4x_pb
,
U8G_COM_ST7920_HW_SPI
};
u8g_dev_t
u8g_dev_st7920_128x64_4x_8bit
=
{
u8g_dev_st7920_128x64_4x_fn
,
&
u8g_dev_st7920_128x64_4x_pb
,
U8G_COM_FAST_PARALLEL
};
u8g_dev_t
u8g_dev_st7920_128x64_4x_custom
=
{
u8g_dev_st7920_128x64_4x_fn
,
&
u8g_dev_st7920_128x64_4x_pb
,
u8g_com_arduino_st7920_custom_fn
};
app/u8glib/u8g_dev_st7920_192x32.c
0 → 100644
View file @
b440b686
/*
u8g_dev_st7920_192x32.c
Universal 8bit Graphics Library
Copyright (c) 2011, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8g.h"
#define WIDTH 192
#define HEIGHT 32
/* init sequence from https://github.com/adafruit/ST7565-LCD/blob/master/ST7565/ST7565.cpp */
static
const
uint8_t
u8g_dev_st7920_192x32_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_RST
(
15
),
/* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
U8G_ESC_DLY
(
100
),
/* 8 Dez 2012: additional delay 100 ms because of reset*/
U8G_ESC_CS
(
1
),
/* enable chip */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
0x038
,
/* 8 Bit interface (DL=1), basic instruction set (RE=0) */
0x00c
,
/* display on, cursor & blink off; 0x08: all off */
0x006
,
/* Entry mode: Cursor move to right ,DDRAM address counter (AC) plus 1, no shift */
0x002
,
/* disable scroll, enable CGRAM adress */
0x001
,
/* clear RAM, needs 1.6 ms */
U8G_ESC_DLY
(
100
),
/* delay 10 ms */
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
uint8_t
u8g_dev_st7920_192x32_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_400NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7920_192x32_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
uint8_t
y
,
i
;
uint8_t
*
ptr
;
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* cmd mode */
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
y
=
pb
->
p
.
page_y0
;
ptr
=
pb
->
buf
;
for
(
i
=
0
;
i
<
8
;
i
++
)
{
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* cmd mode */
u8g_WriteByte
(
u8g
,
dev
,
0x03e
);
/* enable extended mode */
u8g_WriteByte
(
u8g
,
dev
,
0x080
|
y
);
/* y pos */
u8g_WriteByte
(
u8g
,
dev
,
0x080
);
/* set x pos to 0*/
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
WIDTH
/
8
,
ptr
);
ptr
+=
WIDTH
/
8
;
y
++
;
}
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
}
return
u8g_dev_pb8h1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
uint8_t
u8g_dev_st7920_192x32_4x_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_400NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7920_192x32_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
uint8_t
y
,
i
;
uint8_t
*
ptr
;
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* cmd mode */
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
y
=
pb
->
p
.
page_y0
;
ptr
=
pb
->
buf
;
for
(
i
=
0
;
i
<
32
;
i
++
)
{
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* cmd mode */
u8g_WriteByte
(
u8g
,
dev
,
0x03e
);
/* enable extended mode */
u8g_WriteByte
(
u8g
,
dev
,
0x080
|
y
);
/* y pos */
u8g_WriteByte
(
u8g
,
dev
,
0x080
);
/* set x pos to 0*/
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
WIDTH
/
8
,
ptr
);
ptr
+=
WIDTH
/
8
;
y
++
;
}
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
}
return
u8g_dev_pb32h1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
U8G_PB_DEV
(
u8g_dev_st7920_192x32_sw_spi
,
WIDTH
,
HEIGHT
,
8
,
u8g_dev_st7920_192x32_fn
,
U8G_COM_ST7920_SW_SPI
);
U8G_PB_DEV
(
u8g_dev_st7920_192x32_hw_spi
,
WIDTH
,
HEIGHT
,
8
,
u8g_dev_st7920_192x32_fn
,
U8G_COM_ST7920_HW_SPI
);
U8G_PB_DEV
(
u8g_dev_st7920_192x32_8bit
,
WIDTH
,
HEIGHT
,
8
,
u8g_dev_st7920_192x32_fn
,
U8G_COM_FAST_PARALLEL
);
#define QWIDTH (WIDTH*4)
uint8_t
u8g_dev_st7920_192x32_4x_buf
[
QWIDTH
]
U8G_NOCOMMON
;
u8g_pb_t
u8g_dev_st7920_192x32_4x_pb
=
{
{
32
,
HEIGHT
,
0
,
0
,
0
},
WIDTH
,
u8g_dev_st7920_192x32_4x_buf
};
u8g_dev_t
u8g_dev_st7920_192x32_4x_sw_spi
=
{
u8g_dev_st7920_192x32_4x_fn
,
&
u8g_dev_st7920_192x32_4x_pb
,
U8G_COM_ST7920_SW_SPI
};
u8g_dev_t
u8g_dev_st7920_192x32_4x_hw_spi
=
{
u8g_dev_st7920_192x32_4x_fn
,
&
u8g_dev_st7920_192x32_4x_pb
,
U8G_COM_ST7920_HW_SPI
};
u8g_dev_t
u8g_dev_st7920_192x32_4x_8bit
=
{
u8g_dev_st7920_192x32_4x_fn
,
&
u8g_dev_st7920_192x32_4x_pb
,
U8G_COM_FAST_PARALLEL
};
app/u8glib/u8g_dev_st7920_202x32.c
0 → 100644
View file @
b440b686
/*
u8g_dev_st7920_202x32.c
tested with CFAG20232
Universal 8bit Graphics Library
Copyright (c) 2011, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8g.h"
#define WIDTH 202
#define HEIGHT 32
#define PAGE_HEIGHT 8
/* init sequence from https://github.com/adafruit/ST7565-LCD/blob/master/ST7565/ST7565.cpp */
static
const
uint8_t
u8g_dev_st7920_202x32_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_RST
(
15
),
/* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
U8G_ESC_DLY
(
100
),
/* 8 Dez 2012: additional delay 100 ms because of reset*/
U8G_ESC_CS
(
1
),
/* enable chip */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
0x038
,
/* 8 Bit interface (DL=1), basic instruction set (RE=0) */
0x00c
,
/* display on, cursor & blink off; 0x08: all off */
0x006
,
/* Entry mode: Cursor move to right ,DDRAM address counter (AC) plus 1, no shift */
0x002
,
/* disable scroll, enable CGRAM adress */
0x001
,
/* clear RAM, needs 1.6 ms */
U8G_ESC_DLY
(
100
),
/* delay 10 ms */
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
uint8_t
u8g_dev_st7920_202x32_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_400NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7920_202x32_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
uint8_t
y
,
i
;
uint8_t
*
ptr
;
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* cmd mode */
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
y
=
pb
->
p
.
page_y0
;
ptr
=
pb
->
buf
;
for
(
i
=
0
;
i
<
8
;
i
++
)
{
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* cmd mode */
u8g_WriteByte
(
u8g
,
dev
,
0x03e
);
/* enable extended mode */
u8g_WriteByte
(
u8g
,
dev
,
0x080
|
y
);
/* y pos */
u8g_WriteByte
(
u8g
,
dev
,
0x080
);
/* set x pos to 0*/
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
WIDTH
/
8
,
ptr
);
ptr
+=
WIDTH
/
8
;
y
++
;
}
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
}
return
u8g_dev_pb8h1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
uint8_t
u8g_dev_st7920_202x32_4x_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_400NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_st7920_202x32_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
uint8_t
y
,
i
;
uint8_t
*
ptr
;
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* cmd mode */
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
y
=
pb
->
p
.
page_y0
;
ptr
=
pb
->
buf
;
for
(
i
=
0
;
i
<
32
;
i
++
)
{
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* cmd mode */
u8g_WriteByte
(
u8g
,
dev
,
0x03e
);
/* enable extended mode */
u8g_WriteByte
(
u8g
,
dev
,
0x080
|
y
);
/* y pos */
u8g_WriteByte
(
u8g
,
dev
,
0x080
);
/* set x pos to 0*/
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
WIDTH
/
8
,
ptr
);
ptr
+=
WIDTH
/
8
;
y
++
;
}
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
}
return
u8g_dev_pb32h1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
U8G_PB_DEV
(
u8g_dev_st7920_202x32_sw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7920_202x32_fn
,
U8G_COM_ST7920_SW_SPI
);
U8G_PB_DEV
(
u8g_dev_st7920_202x32_hw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7920_202x32_fn
,
U8G_COM_ST7920_HW_SPI
);
U8G_PB_DEV
(
u8g_dev_st7920_202x32_8bit
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_st7920_202x32_fn
,
U8G_COM_FAST_PARALLEL
);
#define QWIDTH (WIDTH*4)
uint8_t
u8g_dev_st7920_202x32_4x_buf
[
QWIDTH
]
U8G_NOCOMMON
;
u8g_pb_t
u8g_dev_st7920_202x32_4x_pb
=
{
{
32
,
HEIGHT
,
0
,
0
,
0
},
WIDTH
,
u8g_dev_st7920_202x32_4x_buf
};
u8g_dev_t
u8g_dev_st7920_202x32_4x_sw_spi
=
{
u8g_dev_st7920_202x32_4x_fn
,
&
u8g_dev_st7920_202x32_4x_pb
,
U8G_COM_ST7920_SW_SPI
};
u8g_dev_t
u8g_dev_st7920_202x32_4x_hw_spi
=
{
u8g_dev_st7920_202x32_4x_fn
,
&
u8g_dev_st7920_202x32_4x_pb
,
U8G_COM_ST7920_HW_SPI
};
u8g_dev_t
u8g_dev_st7920_202x32_4x_8bit
=
{
u8g_dev_st7920_202x32_4x_fn
,
&
u8g_dev_st7920_202x32_4x_pb
,
U8G_COM_FAST_PARALLEL
};
app/u8glib/u8g_dev_t6963_128x128.c
0 → 100644
View file @
b440b686
/*
u8g_dev_t6963_128x128.c
Universal 8bit Graphics Library
Copyright (c) 2013, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Application Notes for the MGLS 128x128
www.baso.no/content/pdf/T6963C_Application.pdf
Hitachi App Notes:
https://www.sparkfun.com/datasheets/LCD/Monochrome/AN-029-Toshiba_T6963C.pdf
Notes:
The font selection pins should generate the 8x8 font.
For the MGLS240128TZ only FS1 is available on pin 18.
FS1 must be low to generate the 8x8 font.
*/
#include "u8g.h"
#define WIDTH 128
#define HEIGHT 128
#define PAGE_HEIGHT 16
/*
http://www.mark-products.com/graphics.htm#240x64%20Pixel%20Format
*/
/* text is not used, so settings are not relevant */
static
const
uint8_t
u8g_dev_t6963_128x128_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_ADR
(
0
),
/* data mode */
U8G_ESC_RST
(
15
),
/* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
U8G_ESC_CS
(
1
),
/* enable chip */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
U8G_ESC_ADR
(
0
),
/* data mode */
0x000
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x021
,
/* set cursor position */
U8G_ESC_ADR
(
0
),
/* data mode */
0x000
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x022
,
/* set offset */
U8G_ESC_ADR
(
0
),
/* data mode */
0x000
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x040
,
/* text home */
U8G_ESC_ADR
(
0
),
/* data mode */
WIDTH
/
8
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x041
,
/* text columns */
U8G_ESC_ADR
(
0
),
/* data mode */
0x000
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x042
,
/* graphics home */
U8G_ESC_ADR
(
0
),
/* data mode */
WIDTH
/
8
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x043
,
/* graphics columns */
// mode set
// 0x080: Internal CG, OR Mode
// 0x081: Internal CG, EXOR Mode
// 0x083: Internal CG, AND Mode
// 0x088: External CG, OR Mode
// 0x089: External CG, EXOR Mode
// 0x08B: External CG, AND Mode
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x080
,
/* mode register: OR Mode, Internal Character Mode */
U8G_ESC_ADR
(
1
),
/* instruction mode */
// display mode
// 0x090: Display off
// 0x094: Graphic off, text on, cursor off, blink off
// 0x096: Graphic off, text on, cursor on, blink off
// 0x097: Graphic off, text on, cursor on, blink on
// 0x098: Graphic on, text off, cursor off, blink off
// 0x09a: Graphic on, text off, cursor on, blink off
// ...
// 0x09c: Graphic on, text on, cursor off, blink off
// 0x09f: Graphic on, text on, cursor on, blink on
0x098
,
/* mode register: Display Mode, Graphics on, Text off, Cursor off */
U8G_ESC_ADR
(
0
),
/* data mode */
0x000
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x024
,
/* set adr pointer */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
U8G_ESC_ADR
(
0
),
/* data mode */
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
uint8_t
u8g_dev_t6963_128x128_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_NONE
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_t6963_128x128_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
uint8_t
y
,
i
;
uint16_t
disp_ram_adr
;
uint8_t
*
ptr
;
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* data mode */
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
y
=
pb
->
p
.
page_y0
;
ptr
=
pb
->
buf
;
disp_ram_adr
=
WIDTH
/
8
;
disp_ram_adr
*=
y
;
for
(
i
=
0
;
i
<
PAGE_HEIGHT
;
i
++
)
{
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* data mode */
u8g_WriteByte
(
u8g
,
dev
,
disp_ram_adr
&
255
);
/* address low byte */
u8g_WriteByte
(
u8g
,
dev
,
disp_ram_adr
>>
8
);
/* address hight byte */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* cmd mode */
u8g_WriteByte
(
u8g
,
dev
,
0x024
);
/* set adr ptr */
u8g_WriteSequence
(
u8g
,
dev
,
WIDTH
/
8
,
ptr
);
ptr
+=
WIDTH
/
8
;
disp_ram_adr
+=
WIDTH
/
8
;
}
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* data mode */
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
}
return
u8g_dev_pb16h1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
// U8G_PB_DEV(u8g_dev_t6963_128x128_8bit, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_t6963_128x128_fn, U8G_COM_T6963);
uint8_t
u8g_dev_t6963_128x128_2x_bw_buf
[
WIDTH
/
8
*
PAGE_HEIGHT
]
U8G_NOCOMMON
;
u8g_pb_t
u8g_dev_t6963_128x128_2x_bw_pb
=
{
{
PAGE_HEIGHT
,
HEIGHT
,
0
,
0
,
0
},
WIDTH
,
u8g_dev_t6963_128x128_2x_bw_buf
};
u8g_dev_t
u8g_dev_t6963_128x128_8bit
=
{
u8g_dev_t6963_128x128_fn
,
&
u8g_dev_t6963_128x128_2x_bw_pb
,
U8G_COM_T6963
};
app/u8glib/u8g_dev_t6963_128x64.c
0 → 100644
View file @
b440b686
/*
u8g_dev_t6963_128x64.c
Tested with Varitronix MGLS240128TZ
Universal 8bit Graphics Library
Copyright (c) 2013, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Application Notes for the MGLS 240x128
www.baso.no/content/pdf/T6963C_Application.pdf
Hitachi App Notes:
https://www.sparkfun.com/datasheets/LCD/Monochrome/AN-029-Toshiba_T6963C.pdf
Notes:
The font selection pins should generate the 8x8 font.
For the MGLS240128TZ only FS1 is available on pin 18.
FS1 must be low to generate the 8x8 font.
*/
#include "u8g.h"
#define WIDTH 128
#define HEIGHT 64
#define PAGE_HEIGHT 16
/* text is not used, so settings are not relevant */
static
const
uint8_t
u8g_dev_t6963_128x64_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_ADR
(
0
),
/* data mode */
U8G_ESC_RST
(
15
),
/* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
U8G_ESC_CS
(
1
),
/* enable chip */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
U8G_ESC_ADR
(
0
),
/* data mode */
0x000
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x021
,
/* set cursor position */
U8G_ESC_ADR
(
0
),
/* data mode */
0x000
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x022
,
/* set offset */
U8G_ESC_ADR
(
0
),
/* data mode */
0x000
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x040
,
/* text home */
U8G_ESC_ADR
(
0
),
/* data mode */
WIDTH
/
8
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x041
,
/* text columns */
U8G_ESC_ADR
(
0
),
/* data mode */
0x000
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x042
,
/* graphics home */
U8G_ESC_ADR
(
0
),
/* data mode */
WIDTH
/
8
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x043
,
/* graphics columns */
// mode set
// 0x080: Internal CG, OR Mode
// 0x081: Internal CG, EXOR Mode
// 0x083: Internal CG, AND Mode
// 0x088: External CG, OR Mode
// 0x089: External CG, EXOR Mode
// 0x08B: External CG, AND Mode
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x080
,
/* mode register: OR Mode, Internal Character Mode */
U8G_ESC_ADR
(
1
),
/* instruction mode */
// display mode
// 0x090: Display off
// 0x094: Graphic off, text on, cursor off, blink off
// 0x096: Graphic off, text on, cursor on, blink off
// 0x097: Graphic off, text on, cursor on, blink on
// 0x098: Graphic on, text off, cursor off, blink off
// 0x09a: Graphic on, text off, cursor on, blink off
// ...
// 0x09c: Graphic on, text on, cursor off, blink off
// 0x09f: Graphic on, text on, cursor on, blink on
0x098
,
/* mode register: Display Mode, Graphics on, Text off, Cursor off */
U8G_ESC_ADR
(
0
),
/* data mode */
0x000
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x024
,
/* set adr pointer */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
U8G_ESC_ADR
(
0
),
/* data mode */
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
uint8_t
u8g_dev_t6963_128x64_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_NONE
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_t6963_128x64_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
uint8_t
y
,
i
;
uint16_t
disp_ram_adr
;
uint8_t
*
ptr
;
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* data mode */
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
y
=
pb
->
p
.
page_y0
;
ptr
=
pb
->
buf
;
disp_ram_adr
=
WIDTH
/
8
;
disp_ram_adr
*=
y
;
for
(
i
=
0
;
i
<
PAGE_HEIGHT
;
i
++
)
{
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* data mode */
u8g_WriteByte
(
u8g
,
dev
,
disp_ram_adr
&
255
);
/* address low byte */
u8g_WriteByte
(
u8g
,
dev
,
disp_ram_adr
>>
8
);
/* address hight byte */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* cmd mode */
u8g_WriteByte
(
u8g
,
dev
,
0x024
);
/* set adr ptr */
u8g_WriteSequence
(
u8g
,
dev
,
WIDTH
/
8
,
ptr
);
ptr
+=
WIDTH
/
8
;
disp_ram_adr
+=
WIDTH
/
8
;
}
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* data mode */
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
}
return
u8g_dev_pb16h1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
// U8G_PB_DEV(u8g_dev_t6963_128x64_8bit, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_t6963_128x64_fn, U8G_COM_T6963);
uint8_t
u8g_dev_t6963_128x64_2x_bw_buf
[
WIDTH
/
8
*
PAGE_HEIGHT
]
U8G_NOCOMMON
;
u8g_pb_t
u8g_dev_t6963_128x64_2x_bw_pb
=
{
{
PAGE_HEIGHT
,
HEIGHT
,
0
,
0
,
0
},
WIDTH
,
u8g_dev_t6963_128x64_2x_bw_buf
};
u8g_dev_t
u8g_dev_t6963_128x64_8bit
=
{
u8g_dev_t6963_128x64_fn
,
&
u8g_dev_t6963_128x64_2x_bw_pb
,
U8G_COM_T6963
};
app/u8glib/u8g_dev_t6963_240x128.c
0 → 100644
View file @
b440b686
/*
u8g_dev_t6963_240x128.c
Tested with Varitronix MGLS240128TZ
Universal 8bit Graphics Library
Copyright (c) 2013, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Application Notes for the MGLS 240x128
www.baso.no/content/pdf/T6963C_Application.pdf
Hitachi App Notes:
https://www.sparkfun.com/datasheets/LCD/Monochrome/AN-029-Toshiba_T6963C.pdf
Notes:
The font selection pins should generate the 8x8 font.
For the MGLS240128TZ only FS1 is available on pin 18.
FS1 must be low to generate the 8x8 font.
*/
#include "u8g.h"
#define WIDTH 240
#define HEIGHT 128
#define PAGE_HEIGHT 16
/*
http://www.mark-products.com/graphics.htm#240x64%20Pixel%20Format
*/
/* text is not used, so settings are not relevant */
static
const
uint8_t
u8g_dev_t6963_240x128_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_ADR
(
0
),
/* data mode */
U8G_ESC_RST
(
15
),
/* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
U8G_ESC_CS
(
1
),
/* enable chip */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
U8G_ESC_ADR
(
0
),
/* data mode */
0x000
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x021
,
/* set cursor position */
U8G_ESC_ADR
(
0
),
/* data mode */
0x000
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x022
,
/* set offset */
U8G_ESC_ADR
(
0
),
/* data mode */
0x000
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x040
,
/* text home */
U8G_ESC_ADR
(
0
),
/* data mode */
WIDTH
/
8
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x041
,
/* text columns */
U8G_ESC_ADR
(
0
),
/* data mode */
0x000
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x042
,
/* graphics home */
U8G_ESC_ADR
(
0
),
/* data mode */
WIDTH
/
8
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x043
,
/* graphics columns */
// mode set
// 0x080: Internal CG, OR Mode
// 0x081: Internal CG, EXOR Mode
// 0x083: Internal CG, AND Mode
// 0x088: External CG, OR Mode
// 0x089: External CG, EXOR Mode
// 0x08B: External CG, AND Mode
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x080
,
/* mode register: OR Mode, Internal Character Mode */
U8G_ESC_ADR
(
1
),
/* instruction mode */
// display mode
// 0x090: Display off
// 0x094: Graphic off, text on, cursor off, blink off
// 0x096: Graphic off, text on, cursor on, blink off
// 0x097: Graphic off, text on, cursor on, blink on
// 0x098: Graphic on, text off, cursor off, blink off
// 0x09a: Graphic on, text off, cursor on, blink off
// ...
// 0x09c: Graphic on, text on, cursor off, blink off
// 0x09f: Graphic on, text on, cursor on, blink on
0x098
,
/* mode register: Display Mode, Graphics on, Text off, Cursor off */
U8G_ESC_ADR
(
0
),
/* data mode */
0x000
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x024
,
/* set adr pointer */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
U8G_ESC_ADR
(
0
),
/* data mode */
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
uint8_t
u8g_dev_t6963_240x128_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_NONE
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_t6963_240x128_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
uint8_t
y
,
i
;
uint16_t
disp_ram_adr
;
uint8_t
*
ptr
;
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* data mode */
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
y
=
pb
->
p
.
page_y0
;
ptr
=
pb
->
buf
;
disp_ram_adr
=
WIDTH
/
8
;
disp_ram_adr
*=
y
;
for
(
i
=
0
;
i
<
PAGE_HEIGHT
;
i
++
)
{
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* data mode */
u8g_WriteByte
(
u8g
,
dev
,
disp_ram_adr
&
255
);
/* address low byte */
u8g_WriteByte
(
u8g
,
dev
,
disp_ram_adr
>>
8
);
/* address hight byte */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* cmd mode */
u8g_WriteByte
(
u8g
,
dev
,
0x024
);
/* set adr ptr */
u8g_WriteSequence
(
u8g
,
dev
,
WIDTH
/
8
,
ptr
);
ptr
+=
WIDTH
/
8
;
disp_ram_adr
+=
WIDTH
/
8
;
}
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* data mode */
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
}
return
u8g_dev_pb16h1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
// U8G_PB_DEV(u8g_dev_t6963_240x128_8bit, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_t6963_240x128_fn, U8G_COM_T6963);
uint8_t
u8g_dev_t6963_240x128_2x_bw_buf
[
WIDTH
/
8
*
PAGE_HEIGHT
]
U8G_NOCOMMON
;
u8g_pb_t
u8g_dev_t6963_240x128_2x_bw_pb
=
{
{
PAGE_HEIGHT
,
HEIGHT
,
0
,
0
,
0
},
WIDTH
,
u8g_dev_t6963_240x128_2x_bw_buf
};
u8g_dev_t
u8g_dev_t6963_240x128_8bit
=
{
u8g_dev_t6963_240x128_fn
,
&
u8g_dev_t6963_240x128_2x_bw_pb
,
U8G_COM_T6963
};
app/u8glib/u8g_dev_t6963_240x64.c
0 → 100644
View file @
b440b686
/*
u8g_dev_t6963_240x64.c
Tested with Varitronix MGLS240128TZ
Universal 8bit Graphics Library
Copyright (c) 2013, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Application Notes for the MGLS 240x128
www.baso.no/content/pdf/T6963C_Application.pdf
Hitachi App Notes:
https://www.sparkfun.com/datasheets/LCD/Monochrome/AN-029-Toshiba_T6963C.pdf
Notes:
The font selection pins should generate the 8x8 font.
For the MGLS240128TZ only FS1 is available on pin 18.
FS1 must be low to generate the 8x8 font.
*/
#include "u8g.h"
#define WIDTH 240
#define HEIGHT 64
#define PAGE_HEIGHT 16
/*
http://www.mark-products.com/graphics.htm#240x64%20Pixel%20Format
*/
/* text is not used, so settings are not relevant */
static
const
uint8_t
u8g_dev_t6963_240x64_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_ADR
(
0
),
/* data mode */
U8G_ESC_RST
(
15
),
/* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
U8G_ESC_CS
(
1
),
/* enable chip */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
U8G_ESC_ADR
(
0
),
/* data mode */
0x000
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x021
,
/* set cursor position */
U8G_ESC_ADR
(
0
),
/* data mode */
0x000
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x022
,
/* set offset */
U8G_ESC_ADR
(
0
),
/* data mode */
0x000
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x040
,
/* text home */
U8G_ESC_ADR
(
0
),
/* data mode */
WIDTH
/
8
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x041
,
/* text columns */
U8G_ESC_ADR
(
0
),
/* data mode */
0x000
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x042
,
/* graphics home */
U8G_ESC_ADR
(
0
),
/* data mode */
WIDTH
/
8
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x043
,
/* graphics columns */
// mode set
// 0x080: Internal CG, OR Mode
// 0x081: Internal CG, EXOR Mode
// 0x083: Internal CG, AND Mode
// 0x088: External CG, OR Mode
// 0x089: External CG, EXOR Mode
// 0x08B: External CG, AND Mode
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x080
,
/* mode register: OR Mode, Internal Character Mode */
U8G_ESC_ADR
(
1
),
/* instruction mode */
// display mode
// 0x090: Display off
// 0x094: Graphic off, text on, cursor off, blink off
// 0x096: Graphic off, text on, cursor on, blink off
// 0x097: Graphic off, text on, cursor on, blink on
// 0x098: Graphic on, text off, cursor off, blink off
// 0x09a: Graphic on, text off, cursor on, blink off
// ...
// 0x09c: Graphic on, text on, cursor off, blink off
// 0x09f: Graphic on, text on, cursor on, blink on
0x098
,
/* mode register: Display Mode, Graphics on, Text off, Cursor off */
U8G_ESC_ADR
(
0
),
/* data mode */
0x000
,
/* low byte */
0x000
,
/* height byte */
U8G_ESC_ADR
(
1
),
/* instruction mode */
0x024
,
/* set adr pointer */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
U8G_ESC_ADR
(
0
),
/* data mode */
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
uint8_t
u8g_dev_t6963_240x64_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_NONE
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_t6963_240x64_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
uint8_t
y
,
i
;
uint16_t
disp_ram_adr
;
uint8_t
*
ptr
;
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* data mode */
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
y
=
pb
->
p
.
page_y0
;
ptr
=
pb
->
buf
;
disp_ram_adr
=
WIDTH
/
8
;
disp_ram_adr
*=
y
;
for
(
i
=
0
;
i
<
PAGE_HEIGHT
;
i
++
)
{
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* data mode */
u8g_WriteByte
(
u8g
,
dev
,
disp_ram_adr
&
255
);
/* address low byte */
u8g_WriteByte
(
u8g
,
dev
,
disp_ram_adr
>>
8
);
/* address hight byte */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* cmd mode */
u8g_WriteByte
(
u8g
,
dev
,
0x024
);
/* set adr ptr */
u8g_WriteSequence
(
u8g
,
dev
,
WIDTH
/
8
,
ptr
);
ptr
+=
WIDTH
/
8
;
disp_ram_adr
+=
WIDTH
/
8
;
}
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* data mode */
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
}
return
u8g_dev_pb16h1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
// U8G_PB_DEV(u8g_dev_t6963_240x64_8bit, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_t6963_240x64_fn, U8G_COM_T6963);
uint8_t
u8g_dev_t6963_240x64_2x_bw_buf
[
WIDTH
/
8
*
PAGE_HEIGHT
]
U8G_NOCOMMON
;
u8g_pb_t
u8g_dev_t6963_240x64_2x_bw_pb
=
{
{
PAGE_HEIGHT
,
HEIGHT
,
0
,
0
,
0
},
WIDTH
,
u8g_dev_t6963_240x64_2x_bw_buf
};
u8g_dev_t
u8g_dev_t6963_240x64_8bit
=
{
u8g_dev_t6963_240x64_fn
,
&
u8g_dev_t6963_240x64_2x_bw_pb
,
U8G_COM_T6963
};
app/u8glib/u8g_dev_tls8204_84x48.c
0 → 100644
View file @
b440b686
/*
u8g_dev_tls8204_84x48.c
Display: Nokia 84x48
Status: Tested with TLS8204V12 Display by Olimex MOD-LCD3310
Contributed: http://code.google.com/p/u8glib/issues/detail?id=126
Universal 8bit Graphics Library
Copyright (c) 2011, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8g.h"
#define WIDTH 84
#define HEIGHT 48
#define PAGE_HEIGHT 8
static
const
uint8_t
u8g_dev_tls8204_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_RST
(
1
),
/* do reset low pulse with (1*16)+2 milliseconds */
U8G_ESC_CS
(
1
),
/* enable chip */
0x021
,
/* activate chip (PD=0), horizontal increment (V=0), enter extended command set (H=1) */
0x006
,
/* temp. control: b10 = 2 */
0x04
|
!!
((
66
-
1
)
&
(
1u
<<
6
)),
0x40
|
((
66
-
2
)
&
((
1u
<<
6
)
-
1
)),
0x013
,
/* bias system 1:48 */
0x0c0
,
/* medium Vop */
0x020
,
/* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
0x00c
,
/* display on, normal operation */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x020
,
/* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
0x00d
,
/* display on, invert */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x020
,
/* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
0x00c
,
/* display on, normal */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
uint8_t
u8g_dev_tls8204_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_400NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_tls8204_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* command mode */
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_WriteByte
(
u8g
,
dev
,
0x020
);
/* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
u8g_WriteByte
(
u8g
,
dev
,
0x080
);
/* set X address */
u8g_WriteByte
(
u8g
,
dev
,
0x040
|
pb
->
p
.
page
);
/* set Y address */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
if
(
u8g_pb_WriteBuffer
(
pb
,
u8g
,
dev
)
==
0
)
return
0
;
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
/* the contrast adjustment does not work, needs to be analysed */
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_WriteByte
(
u8g
,
dev
,
0x021
);
/* command mode, extended function set */
u8g_WriteByte
(
u8g
,
dev
,
0x080
|
(
(
*
(
uint8_t
*
)
arg
)
>>
1
)
);
u8g_WriteByte
(
u8g
,
dev
,
0x020
);
/* command mode, extended function set */
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
return
1
;
}
return
u8g_dev_pb8v1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
U8G_PB_DEV
(
u8g_dev_tls8204_84x48_sw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_tls8204_fn
,
U8G_COM_SW_SPI
);
app/u8glib/u8g_dev_uc1601_c128032.c
0 → 100644
View file @
b440b686
/*
u8g_dev_uc1601_c128032.c
LCD-AG-C128032R-DIW W/KK E6 PBF from http://www.artronic.pl/o_produkcie.php?id=1343
Universal 8bit Graphics Library
Copyright (c) 2013, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8g.h"
#define WIDTH 128
#define HEIGHT 32
#define PAGE_HEIGHT 8
/* init sequence */
static
const
uint8_t
u8g_dev_uc1601_c128032_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
U8G_ESC_RST
(
15
),
/* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
0x0a3
,
/* 0x0a3: LCD bias 1/7 , 0x0a2: LCD bias 1/9 */
0x0a0
,
/* 0x0a0: ADC set to normal, 0x0a1 ADC set to inverted */
0x0c8
,
/* common output mode: set scan direction normal operation/SHL Select, 0x0c0 --> SHL = 0, normal, 0x0c8 --> SHL = 1 */
0x0c2
,
/* 22 May 2013: mirror x */
0x040
,
/* set display start line */
0x028
|
0x04
,
/* power control: turn on voltage converter */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
0x028
|
0x06
,
/* power control: turn on voltage regulator */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
0x028
|
0x07
,
/* power control: turn on voltage follower */
U8G_ESC_DLY
(
10
),
/* delay 10 ms */
0x020
|
0x06
,
/* set V0 voltage resistor ratio to 6 */
0x0af
,
/* display on */
//0x081, /* set contrast */
//0x018, /* contrast value*/
0x0a6
,
/* display normal, bit val 0: LCD pixel off. */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_uc1601_c128032_data_start
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x010
,
/* set upper 4 bit of the col adr to 0 */
0x004
,
/* set lower 4 bit of the col adr */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_uc1601_c128032_sleep_on
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x0ac
,
/* static indicator off */
0x000
,
/* indicator register set (not sure if this is required) */
0x0ae
,
/* display off */
0x0a5
,
/* all points on */
U8G_ESC_CS
(
1
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_uc1601_c128032_sleep_off
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x0a4
,
/* all points off */
0x0af
,
/* display on */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
U8G_ESC_CS
(
1
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
uint8_t
u8g_dev_uc1601_c128032_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_300NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1601_c128032_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1601_c128032_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
pb
->
p
.
page
);
/* select current page (UC1601) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
if
(
u8g_pb_WriteBuffer
(
pb
,
u8g
,
dev
)
==
0
)
return
0
;
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
2
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
return
1
;
case
U8G_DEV_MSG_SLEEP_ON
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1601_c128032_sleep_on
);
return
1
;
case
U8G_DEV_MSG_SLEEP_OFF
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1601_c128032_sleep_off
);
return
1
;
}
return
u8g_dev_pb8v1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
uint8_t
u8g_dev_uc1601_c128032_2x_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_300NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1601_c128032_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1601_c128032_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
(
2
*
pb
->
p
.
page
));
/* select current page (UC1601) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
pb
->
width
,
pb
->
buf
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1601_c128032_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
(
2
*
pb
->
p
.
page
+
1
));
/* select current page (UC1601) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
pb
->
width
,
(
uint8_t
*
)(
pb
->
buf
)
+
pb
->
width
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
2
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
return
1
;
case
U8G_DEV_MSG_SLEEP_ON
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1601_c128032_sleep_on
);
return
1
;
case
U8G_DEV_MSG_SLEEP_OFF
:
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1601_c128032_sleep_off
);
return
1
;
}
return
u8g_dev_pb16v1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
U8G_PB_DEV
(
u8g_dev_uc1601_c128032_sw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_uc1601_c128032_fn
,
U8G_COM_SW_SPI
);
U8G_PB_DEV
(
u8g_dev_uc1601_c128032_hw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_uc1601_c128032_fn
,
U8G_COM_HW_SPI
);
uint8_t
u8g_dev_uc1601_c128032_2x_buf
[
WIDTH
*
2
]
U8G_NOCOMMON
;
u8g_pb_t
u8g_dev_uc1601_c128032_2x_pb
=
{
{
16
,
HEIGHT
,
0
,
0
,
0
},
WIDTH
,
u8g_dev_uc1601_c128032_2x_buf
};
u8g_dev_t
u8g_dev_uc1601_c128032_2x_sw_spi
=
{
u8g_dev_uc1601_c128032_2x_fn
,
&
u8g_dev_uc1601_c128032_2x_pb
,
U8G_COM_SW_SPI
};
u8g_dev_t
u8g_dev_uc1601_c128032_2x_hw_spi
=
{
u8g_dev_uc1601_c128032_2x_fn
,
&
u8g_dev_uc1601_c128032_2x_pb
,
U8G_COM_HW_SPI
};
app/u8glib/u8g_dev_uc1608_240x128.c
0 → 100644
View file @
b440b686
/*
u8g_dev_uc1608_240x128.c
Universal 8bit Graphics Library
Copyright (c) 2013, olikraus@gmail.com (original 240x64 library)
Modified by thieringpeti@gmail.com for Raystar rx240128 family displays
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
Display: http://www.tme.eu/en/details/rx240128a-ghw/lcd-graphic-displays/raystar-optronics/
Connection: HW / SW SPI.
To get this display working, You need some extra capacitors:
connect 4.7uF caps between:
PIN1 & PIN2 VB1 +-
PIN3 & PIN4 VB0 -+
connect 0.1uF caps between:
VLCD and VSS
VBIAS and VSS
You can find some schematics with a 10M resistor parallellized with the VLCD capacitor.
Select 4-bit SPI mode.
Connect D7 (PIN9) To VDD (+3.3V)
Connect D1, D2, D4, D5, D6 to GND (PINS 10,11,12,14,15)
Connect WR0, WR1, BM0, BM1 to GND (PINS 17,18,22,23)
D0: (PIN16) AVR's SCK pin (HW SPI)
D3: (PIN13) AVR's MOSI pin (HW SPI)
CD: (PIN19) used as A0 in the library
CS: (PIN21) Connect to the defined CS pin, and You can re-use the HW SPI in different routines.
RST: (PIN20) optional reset, can be defined in the function, resets on initialization.
Adjust contrast if necessary. Default: 0x072.
*/
#include "u8g.h"
#define WIDTH 240
#define HEIGHT 128
#define PAGE_HEIGHT 8
/* see also ERC24064-1 for init sequence example */
static
const
uint8_t
u8g_dev_uc1608_240x128_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
1
),
/* disable chip (UC1608 has positive logic for CS) */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_RST
(
1
),
/* do reset low pulse with (15*16)+2 milliseconds */
U8G_ESC_CS
(
0
),
/* enable chip */
0x0e2
,
/* soft reset */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x026
,
/* MUX rate and temperature compensation */
0x0c8
,
/* Map control, Bit 3: MY=1, Bit 2: MX=0, Bit 0: MSF =0 */
0x0eb
,
/* LCD bias Bits 0/1: 00=10.7 01=10.3, 10=12.0, 11=12.7*/
/* default 0x0ea for 240x128 */
0x081
,
/* set contrast (bits 0..5) and gain (bits 6/7) */
0x072
,
/* default for 240x128 displays: 0x072*/
0x02f
,
/* power on, Bit 2 PC2=1 (internal charge pump), Bits 0/1: cap of panel */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
0x040
,
/* set display start line to 0 */
0x090
,
/* no fixed lines */
0x089
,
/* RAM access control */
0x0af
,
/* disable sleep mode */
0x0a4
,
/* normal display */
0x0a5
,
/* display all points, ST7565, UC1610 */
// 0x0a7, /* inverse display */
0x0a6
,
/* normal display */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0a4
,
/* normal display */
U8G_ESC_CS
(
1
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_uc1608_240x128_data_start
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
0
),
/* enable chip */
0x010
,
/* set upper 4 bit of the col adr to 0 (UC1608) */
0x000
,
/* set lower 4 bit of the col adr to 0 */
U8G_ESC_END
/* end of sequence */
};
uint8_t
u8g_dev_uc1608_240x128_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_300NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1608_240x128_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1608_240x128_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
pb
->
p
.
page
);
/* select current page (UC1608) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
if
(
u8g_pb_WriteBuffer
(
pb
,
u8g
,
dev
)
==
0
)
return
0
;
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
2
);
/* set contrast from, keep gain at 0 */
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
return
1
;
}
return
u8g_dev_pb8v1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
uint8_t
u8g_dev_uc1608_240x128_2x_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_300NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1608_240x128_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1608_240x128_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
(
2
*
pb
->
p
.
page
));
/* select current page (ST7565R) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
pb
->
width
,
pb
->
buf
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1608_240x128_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
(
2
*
pb
->
p
.
page
+
1
));
/* select current page (ST7565R) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
pb
->
width
,
(
uint8_t
*
)(
pb
->
buf
)
+
pb
->
width
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
2
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
return
1
;
}
return
u8g_dev_pb16v1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
U8G_PB_DEV
(
u8g_dev_uc1608_240x128_sw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_uc1608_240x128_fn
,
U8G_COM_SW_SPI
);
U8G_PB_DEV
(
u8g_dev_uc1608_240x128_hw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_uc1608_240x128_fn
,
U8G_COM_HW_SPI
);
uint8_t
u8g_dev_uc1608_240x128_2x_buf
[
WIDTH
*
2
]
U8G_NOCOMMON
;
u8g_pb_t
u8g_dev_uc1608_240x128_2x_pb
=
{
{
16
,
HEIGHT
,
0
,
0
,
0
},
WIDTH
,
u8g_dev_uc1608_240x128_2x_buf
};
u8g_dev_t
u8g_dev_uc1608_240x128_2x_sw_spi
=
{
u8g_dev_uc1608_240x128_2x_fn
,
&
u8g_dev_uc1608_240x128_2x_pb
,
U8G_COM_SW_SPI
};
u8g_dev_t
u8g_dev_uc1608_240x128_2x_hw_spi
=
{
u8g_dev_uc1608_240x128_2x_fn
,
&
u8g_dev_uc1608_240x128_2x_pb
,
U8G_COM_HW_SPI
};
app/u8glib/u8g_dev_uc1608_240x64.c
0 → 100644
View file @
b440b686
/*
u8g_dev_uc1608_240x64.c
Universal 8bit Graphics Library
Copyright (c) 2013, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8g.h"
#define WIDTH 240
#define HEIGHT 64
#define PAGE_HEIGHT 8
/* see also ERC24064-1 for init sequence example */
static
const
uint8_t
u8g_dev_uc1608_240x64_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
1
),
/* disable chip (UC1608 has positive logic for CS) */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_RST
(
1
),
/* do reset low pulse with (15*16)+2 milliseconds */
U8G_ESC_CS
(
0
),
/* enable chip */
0x0e2
,
/* soft reset */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
#if HEIGHT <= 96
0x023
,
/* Bit 0/1: Temp compenstation, Bit 2: Multiplex Rate 0=96, 1=128 */
#else
/* 30 Nov 2013: not tested */
0x027
,
/* Bit 0/1: Temp compenstation, Bit 2: Multiplex Rate 0=96, 1=128 */
#endif
0x0c8
,
/* Map control, Bit 3: MY=1, Bit 2: MX=0, Bit 0: MSF =0 */
0x0e8
,
/* LCD bias Bits 0/1: 00=10.7 01=10.3, 10=12.0, 11=12.7*/
0x081
,
/* set contrast (bits 0..5) and gain (bits 6/7) */
0x014
,
/* ECR24064-1 default: 0x040*/
0x02f
,
/* power on, Bit 2 PC2=1 (internal charge pump), Bits 0/1: cap of panel */
U8G_ESC_DLY
(
50
),
/* delay 50 ms */
0x040
,
/* set display start line to 0 */
0x090
,
/* no fixed lines */
0x089
,
/* RAM access control */
0x0af
,
/* disable sleep mode */
0x0a4
,
/* normal display */
0x0a5
,
/* display all points, ST7565, UC1610 */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0a4
,
/* normal display */
U8G_ESC_CS
(
1
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_uc1608_240x64_data_start
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
0
),
/* enable chip */
0x010
,
/* set upper 4 bit of the col adr to 0 (UC1608) */
0x000
,
/* set lower 4 bit of the col adr to 0 */
U8G_ESC_END
/* end of sequence */
};
uint8_t
u8g_dev_uc1608_240x64_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_300NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1608_240x64_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1608_240x64_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
pb
->
p
.
page
);
/* select current page (UC1608) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
if
(
u8g_pb_WriteBuffer
(
pb
,
u8g
,
dev
)
==
0
)
return
0
;
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
2
);
/* set contrast from, keep gain at 0 */
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
return
1
;
}
return
u8g_dev_pb8v1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
uint8_t
u8g_dev_uc1608_240x64_2x_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_300NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1608_240x64_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1608_240x64_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
(
2
*
pb
->
p
.
page
));
/* select current page (ST7565R) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
pb
->
width
,
pb
->
buf
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1608_240x64_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x0b0
|
(
2
*
pb
->
p
.
page
+
1
));
/* select current page (ST7565R) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
u8g_WriteSequence
(
u8g
,
dev
,
pb
->
width
,
(
uint8_t
*
)(
pb
->
buf
)
+
pb
->
width
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
2
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
return
1
;
}
return
u8g_dev_pb16v1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
U8G_PB_DEV
(
u8g_dev_uc1608_240x64_sw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_uc1608_240x64_fn
,
U8G_COM_SW_SPI
);
U8G_PB_DEV
(
u8g_dev_uc1608_240x64_hw_spi
,
WIDTH
,
HEIGHT
,
PAGE_HEIGHT
,
u8g_dev_uc1608_240x64_fn
,
U8G_COM_HW_SPI
);
uint8_t
u8g_dev_uc1608_240x64_2x_buf
[
WIDTH
*
2
]
U8G_NOCOMMON
;
u8g_pb_t
u8g_dev_uc1608_240x64_2x_pb
=
{
{
16
,
HEIGHT
,
0
,
0
,
0
},
WIDTH
,
u8g_dev_uc1608_240x64_2x_buf
};
u8g_dev_t
u8g_dev_uc1608_240x64_2x_sw_spi
=
{
u8g_dev_uc1608_240x64_2x_fn
,
&
u8g_dev_uc1608_240x64_2x_pb
,
U8G_COM_SW_SPI
};
u8g_dev_t
u8g_dev_uc1608_240x64_2x_hw_spi
=
{
u8g_dev_uc1608_240x64_2x_fn
,
&
u8g_dev_uc1608_240x64_2x_pb
,
U8G_COM_HW_SPI
};
app/u8glib/u8g_dev_uc1610_dogxl160.c
0 → 100644
View file @
b440b686
/*
u8g_dev_uc1610_dogxl160.c
Universal 8bit Graphics Library
Copyright (c) 2011, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8g.h"
#define WIDTH 160
#define HEIGHT 104
static
const
uint8_t
u8g_dev_uc1610_dogxl160_init_seq
[]
PROGMEM
=
{
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_RST
(
1
),
/* do reset low pulse with (1*16)+2 milliseconds */
U8G_ESC_CS
(
1
),
/* enable chip */
0x0f1
,
/* set display height-1 */
0x067
,
/* */
0x0c0
,
/* SEG & COM normal */
0x040
,
/* set display start line */
0x050
,
/* */
0x02b
,
/* set panelloading */
0x0eb
,
/* set bias 1/2 */
0x081
,
/* set contrast */
0x05f
,
/* */
0x089
,
/* set auto increment */
0x0a6
,
/* normal pixel mode */
0x0d3
,
/* 0xd3=40% RMS separation for gray levels */
0x0af
,
/* display on */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0a5
,
/* display all points, ST7565, UC1610 */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
U8G_ESC_DLY
(
100
),
/* delay 100 ms */
0x0a4
,
/* normal display */
U8G_ESC_CS
(
0
),
/* disable chip */
U8G_ESC_END
/* end of sequence */
};
static
const
uint8_t
u8g_dev_uc1610_dogxl160_data_start
[]
PROGMEM
=
{
U8G_ESC_ADR
(
0
),
/* instruction mode */
U8G_ESC_CS
(
1
),
/* enable chip */
0x010
,
/* set upper 4 bit of the col adr to 0 */
0x000
,
/* set lower 4 bit of the col adr to 0 */
U8G_ESC_END
/* end of sequence */
};
static
uint8_t
u8g_dev_1to2
(
uint8_t
n
)
{
register
uint8_t
a
,
b
,
c
;
a
=
n
;
a
&=
1
;
n
<<=
1
;
b
=
n
;
b
&=
4
;
n
<<=
1
;
c
=
n
;
c
&=
16
;
n
<<=
1
;
n
&=
64
;
n
|=
a
;
n
|=
b
;
n
|=
c
;
n
|=
n
<<
1
;
return
n
;
}
uint8_t
u8g_dev_uc1610_dogxl160_bw_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_300NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1610_dogxl160_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
int
i
;
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1610_dogxl160_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x060
|
(
pb
->
p
.
page
*
2
)
);
/* select current page 1/2 (UC1610) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
for
(
i
=
0
;
i
<
WIDTH
;
i
++
)
{
u8g_WriteByte
(
u8g
,
dev
,
u8g_dev_1to2
(
((
uint8_t
*
)(
pb
->
buf
))[
i
]
)
);
}
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1610_dogxl160_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x060
|
(
pb
->
p
.
page
*
2
+
1
)
);
/* select current page 2/2 (UC1610) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
for
(
i
=
0
;
i
<
WIDTH
;
i
++
)
{
u8g_WriteByte
(
u8g
,
dev
,
u8g_dev_1to2
(
((
uint8_t
*
)(
pb
->
buf
))[
i
]
>>
4
)
);
}
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
1
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
return
1
;
}
return
u8g_dev_pb8v1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
uint8_t
u8g_dev_uc1610_dogxl160_gr_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_300NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1610_dogxl160_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1610_dogxl160_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x060
|
(
pb
->
p
.
page
)
);
/* select current page (UC1610) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
if
(
u8g_pb_WriteBuffer
(
pb
,
u8g
,
dev
)
==
0
)
return
0
;
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
1
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
return
1
;
}
return
u8g_dev_pb8v2_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
uint8_t
u8g_dev_uc1610_dogxl160_2x_bw_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_300NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1610_dogxl160_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
int
i
;
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1610_dogxl160_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x060
|
(
pb
->
p
.
page
*
4
)
);
/* select current page 1/2 (UC1610) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
for
(
i
=
0
;
i
<
WIDTH
;
i
++
)
{
u8g_WriteByte
(
u8g
,
dev
,
u8g_dev_1to2
(
((
uint8_t
*
)(
pb
->
buf
))[
i
]
)
);
}
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1610_dogxl160_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x060
|
(
pb
->
p
.
page
*
4
+
1
)
);
/* select current page 2/2 (UC1610) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
for
(
i
=
0
;
i
<
WIDTH
;
i
++
)
{
u8g_WriteByte
(
u8g
,
dev
,
u8g_dev_1to2
(
((
uint8_t
*
)(
pb
->
buf
))[
i
]
>>
4
)
);
}
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1610_dogxl160_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x060
|
(
pb
->
p
.
page
*
4
+
2
)
);
/* select current page 1/2 (UC1610) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
for
(
i
=
0
;
i
<
WIDTH
;
i
++
)
{
u8g_WriteByte
(
u8g
,
dev
,
u8g_dev_1to2
(
((
uint8_t
*
)((
uint8_t
*
)(
pb
->
buf
)
+
WIDTH
))[
i
]
)
);
}
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1610_dogxl160_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x060
|
(
pb
->
p
.
page
*
4
+
3
)
);
/* select current page 2/2 (UC1610) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
for
(
i
=
0
;
i
<
WIDTH
;
i
++
)
{
u8g_WriteByte
(
u8g
,
dev
,
u8g_dev_1to2
(
((
uint8_t
*
)((
uint8_t
*
)(
pb
->
buf
)
+
WIDTH
))[
i
]
>>
4
)
);
}
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
1
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
return
1
;
}
return
u8g_dev_pb16v1_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
uint8_t
u8g_dev_uc1610_dogxl160_2x_gr_fn
(
u8g_t
*
u8g
,
u8g_dev_t
*
dev
,
uint8_t
msg
,
void
*
arg
)
{
switch
(
msg
)
{
case
U8G_DEV_MSG_INIT
:
u8g_InitCom
(
u8g
,
dev
,
U8G_SPI_CLK_CYCLE_300NS
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1610_dogxl160_init_seq
);
break
;
case
U8G_DEV_MSG_STOP
:
break
;
case
U8G_DEV_MSG_PAGE_NEXT
:
{
u8g_pb_t
*
pb
=
(
u8g_pb_t
*
)(
dev
->
dev_mem
);
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1610_dogxl160_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x060
|
(
pb
->
p
.
page
*
2
)
);
/* select current page (UC1610) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
if
(
u8g_WriteSequence
(
u8g
,
dev
,
WIDTH
,
pb
->
buf
)
==
0
)
return
0
;
u8g_WriteEscSeqP
(
u8g
,
dev
,
u8g_dev_uc1610_dogxl160_data_start
);
u8g_WriteByte
(
u8g
,
dev
,
0x060
|
(
pb
->
p
.
page
*
2
+
1
)
);
/* select current page (UC1610) */
u8g_SetAddress
(
u8g
,
dev
,
1
);
/* data mode */
if
(
u8g_WriteSequence
(
u8g
,
dev
,
WIDTH
,
(
uint8_t
*
)(
pb
->
buf
)
+
WIDTH
)
==
0
)
return
0
;
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
}
break
;
case
U8G_DEV_MSG_CONTRAST
:
u8g_SetChipSelect
(
u8g
,
dev
,
1
);
u8g_SetAddress
(
u8g
,
dev
,
0
);
/* instruction mode */
u8g_WriteByte
(
u8g
,
dev
,
0x081
);
u8g_WriteByte
(
u8g
,
dev
,
(
*
(
uint8_t
*
)
arg
)
>>
1
);
u8g_SetChipSelect
(
u8g
,
dev
,
0
);
return
1
;
}
return
u8g_dev_pb16v2_base_fn
(
u8g
,
dev
,
msg
,
arg
);
}
U8G_PB_DEV
(
u8g_dev_uc1610_dogxl160_bw_sw_spi
,
WIDTH
,
HEIGHT
,
8
,
u8g_dev_uc1610_dogxl160_bw_fn
,
U8G_COM_SW_SPI
);
U8G_PB_DEV
(
u8g_dev_uc1610_dogxl160_bw_hw_spi
,
WIDTH
,
HEIGHT
,
8
,
u8g_dev_uc1610_dogxl160_bw_fn
,
U8G_COM_HW_SPI
);
U8G_PB_DEV
(
u8g_dev_uc1610_dogxl160_gr_sw_spi
,
WIDTH
,
HEIGHT
,
4
,
u8g_dev_uc1610_dogxl160_gr_fn
,
U8G_COM_SW_SPI
);
U8G_PB_DEV
(
u8g_dev_uc1610_dogxl160_gr_hw_spi
,
WIDTH
,
HEIGHT
,
4
,
u8g_dev_uc1610_dogxl160_gr_fn
,
U8G_COM_HW_SPI
);
uint8_t
u8g_dev_uc1610_dogxl160_2x_bw_buf
[
WIDTH
*
2
]
U8G_NOCOMMON
;
u8g_pb_t
u8g_dev_uc1610_dogxl160_2x_bw_pb
=
{
{
16
,
HEIGHT
,
0
,
0
,
0
},
WIDTH
,
u8g_dev_uc1610_dogxl160_2x_bw_buf
};
u8g_dev_t
u8g_dev_uc1610_dogxl160_2x_bw_sw_spi
=
{
u8g_dev_uc1610_dogxl160_2x_bw_fn
,
&
u8g_dev_uc1610_dogxl160_2x_bw_pb
,
U8G_COM_SW_SPI
};
u8g_dev_t
u8g_dev_uc1610_dogxl160_2x_bw_hw_spi
=
{
u8g_dev_uc1610_dogxl160_2x_bw_fn
,
&
u8g_dev_uc1610_dogxl160_2x_bw_pb
,
U8G_COM_HW_SPI
};
uint8_t
u8g_dev_uc1610_dogxl160_2x_gr_buf
[
WIDTH
*
2
]
U8G_NOCOMMON
;
u8g_pb_t
u8g_dev_uc1610_dogxl160_2x_gr_pb
=
{
{
8
,
HEIGHT
,
0
,
0
,
0
},
WIDTH
,
u8g_dev_uc1610_dogxl160_2x_gr_buf
};
u8g_dev_t
u8g_dev_uc1610_dogxl160_2x_gr_sw_spi
=
{
u8g_dev_uc1610_dogxl160_2x_gr_fn
,
&
u8g_dev_uc1610_dogxl160_2x_gr_pb
,
U8G_COM_SW_SPI
};
u8g_dev_t
u8g_dev_uc1610_dogxl160_2x_gr_hw_spi
=
{
u8g_dev_uc1610_dogxl160_2x_gr_fn
,
&
u8g_dev_uc1610_dogxl160_2x_gr_pb
,
U8G_COM_HW_SPI
};
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