Commit f3e2a3af authored by Johny Mattsson's avatar Johny Mattsson
Browse files

Initial pass at switching to RTOS SDK.

This compiles, links, and starts the RTOS without crashing and burning.

Lua environment does not yet start due to the different task architecture.

Known pain points:

  - task implementation needs to be rewritten for RTOS (next up on my TODO)

  - secure espconn does not exist, all secure espconn stuff has been #if 0'd

  - lwip now built from within the RTOS SDK, but does not appear to include
    MDNS support. Investigation needed.

  - there is no access to FRC1 NMI, not sure if we ever actually used that
    however. Also #if 0'd out for now.

  - new timing constraints introduced by the RTOS, all use of ets_delay_us()
    and os_delay_us() needs to be reviewed (the tsl2561 driver in particular).

  - even more confusion with ets_ vs os_ vs c_ vs non-prefixed versions.
    In the long run everything should be switched to non-prefixed versions.

  - system_set_os_print() not available, needs to be reimplemented

  - all the RTOS rodata is loaded into RAM, as it apparently uses some
    constants while the flash isn't mapped, so our exception handler can't
    work its magic. This should be narrowed down to the minimum possible
    at some point.

  - with each task having its own stack in RTOS, we probably need change
    flash-page buffers from the stack to the heap in a bunch of places.
    A single, shared, page buffer *might* be possible if we limit ourselves
    to running NodeMCU in a single task.

  - there's a ton of junk in the sdk-overrides now; over time the core code
    should be updated to not need those shims
parent afd974c5
#include "pin_map.h" #include "pin_map.h"
#include "eagle_soc.h" #include "eagle_soc.h"
#include "mem.h"
#include "osapi.h" #include "osapi.h"
uint32_t pin_mux[GPIO_PIN_NUM]; uint32_t pin_mux[GPIO_PIN_NUM];
......
...@@ -3,6 +3,7 @@ ...@@ -3,6 +3,7 @@
#include "c_string.h" #include "c_string.h"
#include "user_interface.h" #include "user_interface.h"
#include "smart.h" #include "smart.h"
#include "esp_wifi.h"
#define ADDR_MAP_NUM 10 #define ADDR_MAP_NUM 10
......
...@@ -23,6 +23,7 @@ LOCAL task_callback_t *task_func; ...@@ -23,6 +23,7 @@ LOCAL task_callback_t *task_func;
LOCAL int task_count; LOCAL int task_count;
LOCAL void task_dispatch (os_event_t *e) { LOCAL void task_dispatch (os_event_t *e) {
#if 0
task_handle_t handle = e->sig; task_handle_t handle = e->sig;
if ( (handle & TASK_HANDLE_MASK) == TASK_HANDLE_MONIKER) { if ( (handle & TASK_HANDLE_MASK) == TASK_HANDLE_MONIKER) {
uint16 entry = (handle & TASK_HANDLE_UNMASK) >> TASK_HANDLE_SHIFT; uint16 entry = (handle & TASK_HANDLE_UNMASK) >> TASK_HANDLE_SHIFT;
...@@ -35,6 +36,7 @@ LOCAL void task_dispatch (os_event_t *e) { ...@@ -35,6 +36,7 @@ LOCAL void task_dispatch (os_event_t *e) {
} }
/* Invalid signals are ignored */ /* Invalid signals are ignored */
NODE_DBG ( "Invalid signal issued: %08x", handle); NODE_DBG ( "Invalid signal issued: %08x", handle);
#endif
} }
/* /*
...@@ -42,6 +44,7 @@ LOCAL void task_dispatch (os_event_t *e) { ...@@ -42,6 +44,7 @@ LOCAL void task_dispatch (os_event_t *e) {
* to be called explicitly as the get_id function will call this lazily. * to be called explicitly as the get_id function will call this lazily.
*/ */
bool task_init_handler(uint8 priority, uint8 qlen) { bool task_init_handler(uint8 priority, uint8 qlen) {
#if 0
if (priority <= TASK_PRIORITY_HIGH && task_Q[priority] == NULL) { if (priority <= TASK_PRIORITY_HIGH && task_Q[priority] == NULL) {
task_Q[priority] = (os_event_t *) os_malloc( sizeof(os_event_t)*qlen ); task_Q[priority] = (os_event_t *) os_malloc( sizeof(os_event_t)*qlen );
os_memset (task_Q[priority], 0, sizeof(os_event_t)*qlen); os_memset (task_Q[priority], 0, sizeof(os_event_t)*qlen);
...@@ -49,10 +52,12 @@ bool task_init_handler(uint8 priority, uint8 qlen) { ...@@ -49,10 +52,12 @@ bool task_init_handler(uint8 priority, uint8 qlen) {
return system_os_task( task_dispatch, priority, task_Q[priority], qlen ); return system_os_task( task_dispatch, priority, task_Q[priority], qlen );
} }
} }
#endif
return false; return false;
} }
task_handle_t task_get_id(task_callback_t t) { task_handle_t task_get_id(task_callback_t t) {
#if 0
int p = TASK_PRIORITY_COUNT; int p = TASK_PRIORITY_COUNT;
/* Initialise and uninitialised Qs with the default Q len */ /* Initialise and uninitialised Qs with the default Q len */
while(p--) if (!task_Q[p]) { while(p--) if (!task_Q[p]) {
...@@ -69,4 +74,5 @@ task_handle_t task_get_id(task_callback_t t) { ...@@ -69,4 +74,5 @@ task_handle_t task_get_id(task_callback_t t) {
task_func[task_count++] = t; task_func[task_count++] = t;
return TASK_HANDLE_MONIKER + ((task_count-1) << TASK_HANDLE_SHIFT); return TASK_HANDLE_MONIKER + ((task_count-1) << TASK_HANDLE_SHIFT);
#endif
} }
...@@ -230,13 +230,13 @@ tsl2561Error_t tsl2561GetLuminosity(uint16_t *broadband, uint16_t *ir) { ...@@ -230,13 +230,13 @@ tsl2561Error_t tsl2561GetLuminosity(uint16_t *broadband, uint16_t *ir) {
// Wait x ms for ADC to complete // Wait x ms for ADC to complete
switch (_tsl2561IntegrationTime) { switch (_tsl2561IntegrationTime) {
case TSL2561_INTEGRATIONTIME_13MS: case TSL2561_INTEGRATIONTIME_13MS:
os_delay_us(14000); //systickDelay(14); ets_delay_us(14000); //systickDelay(14);
break; break;
case TSL2561_INTEGRATIONTIME_101MS: case TSL2561_INTEGRATIONTIME_101MS:
os_delay_us(102000); //systickDelay(102); ets_delay_us(102000); //systickDelay(102);
break; break;
default: default:
os_delay_us(404000); //systickDelay(404); ets_delay_us(404000); //systickDelay(404);
break; break;
} }
......
--defsym=strcmp=ets_strcmp --defsym=ets_strcmp=strcmp
--defsym=strcpy=ets_strcpy --defsym=ets_strcpy=strcpy
--defsym=strlen=ets_strlen --defsym=ets_strlen=strlen
--defsym=strncmp=ets_strncmp --defsym=ets_strncmp=strncmp
--defsym=strncpy=ets_strncpy --defsym=ets_strncpy=strncpy
--defsym=strstr=ets_strstr --defsym=ets_strstr=strstr
--defsym=memcmp=ets_memcmp --defsym=ets_memcmp=memcmp
--defsym=memcpy=ets_memcpy --defsym=ets_memcpy=memcpy
--defsym=memmove=ets_memmove --defsym=ets_memmove=memmove
--defsym=memset=ets_memset --defsym=ets_memset=memset
--defsym=ets_vsprintf=vsprintf
/* These symbols aren't listed by the RTOS rom linker file */
PROVIDE ( _xtos_set_exception_handler = 0x40000454 );
PROVIDE ( uart_baudrate_detect = 0x40003924 );
PROVIDE ( UartDev = 0x3fffde10 );
PROVIDE ( gpio_pin_intr_state_set = 0x40004d90 );
PROVIDE ( gpio_register_get = 0x40004d5c );
PROVIDE ( gpio_register_set = 0x40004d04 );
PROVIDE ( gpio_input_get = 0x40004cf0 );
PROVIDE ( ets_get_cpu_frequency = 0x40002f0c );
PROVIDE ( ets_str2macaddr = 0x40002af8 );
PROVIDE ( ets_intr_lock = 0x40000f74 );
PROVIDE ( ets_intr_unlock = 0x40000f80 );
PROVIDE ( ets_isr_attach = 0x40000f88 );
PROVIDE ( ets_isr_mask = 0x40000f98 );
PROVIDE ( ets_isr_unmask = 0x40000fa8 );
...@@ -71,6 +71,23 @@ SECTIONS ...@@ -71,6 +71,23 @@ SECTIONS
_dport0_data_end = ABSOLUTE(.); _dport0_data_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr } >dport0_0_seg :dport0_0_phdr
.data : ALIGN(4)
{
_data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
_data_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.irom0.text : ALIGN(0x1000) .irom0.text : ALIGN(0x1000)
{ {
_irom0_text_start = ABSOLUTE(.); _irom0_text_start = ABSOLUTE(.);
...@@ -78,7 +95,7 @@ SECTIONS ...@@ -78,7 +95,7 @@ SECTIONS
*(.clientcert.flash) *(.clientcert.flash)
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text) *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
*(.literal.* .text.*) *(.literal.* .text.*)
*(.rodata*) */.output/eagle*.a:*.o(.rodata*) /* only NodeMCU rodata, for now */
*(.sdk.version) *(.sdk.version)
/* Link-time arrays containing the defs for the included modules */ /* Link-time arrays containing the defs for the included modules */
...@@ -99,26 +116,15 @@ SECTIONS ...@@ -99,26 +116,15 @@ SECTIONS
_flash_used_end = ABSOLUTE(.); _flash_used_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr =0xffffffff } >irom0_0_seg :irom0_0_phdr =0xffffffff
.data : ALIGN(4)
{
_data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
_data_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.rodata : ALIGN(4) .rodata : ALIGN(4)
{ {
_rodata_start = ABSOLUTE(.); _rodata_start = ABSOLUTE(.);
/* Some stuff in the RTOS libmain uses rodata while flash isn't mapped,
* so said rodata has to reside in RAM. For now we know libmain does this,
* as well as "something else". Hopefully we can narrow that down */
*libmain.a:*.o(.rodata*)
*/lib/lib*.a:*.o(.rodata*) /* rest of SDK rodata, for now */
*(.gnu.linkonce.r.*) *(.gnu.linkonce.r.*)
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.); __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
*(.xt_except_table) *(.xt_except_table)
...@@ -127,10 +133,12 @@ SECTIONS ...@@ -127,10 +133,12 @@ SECTIONS
*(.gnu.version_r) *(.gnu.version_r)
*(.eh_frame) *(.eh_frame)
/* C++ constructor and destructor tables, properly ordered: */ /* C++ constructor and destructor tables, properly ordered: */
__init_array_start = ABSOLUTE(.);
KEEP (*crtbegin.o(.ctors)) KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*))) KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors)) KEEP (*(.ctors))
__init_array_end = ABSOLUTE(.);
KEEP (*crtbegin.o(.dtors)) KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*))) KEEP (*(SORT(.dtors.*)))
...@@ -151,6 +159,13 @@ SECTIONS ...@@ -151,6 +159,13 @@ SECTIONS
_rodata_end = ABSOLUTE(.); _rodata_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr } >dram0_0_seg :dram0_0_phdr
.UserExceptionVector.literal : AT(LOADADDR(.rodata) + (ADDR(.UserExceptionVector.literal) - ADDR(.rodata))) ALIGN(4)
{
_UserExceptionVector_literal_start = ABSOLUTE(.);
*(.UserExceptionVector.literal)
_UserExceptionVector_literal_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.bss ALIGN(8) (NOLOAD) : ALIGN(4) .bss ALIGN(8) (NOLOAD) : ALIGN(4)
{ {
. = ALIGN (8); . = ALIGN (8);
......
Subproject commit efd2819870ea5ae1a7a617f043b3fc6698ada22f
#ifndef _OVERRIDE_C_TYPES_H_ #ifndef _OVERRIDE_C_TYPES_H_
#define _OVERRIDE_C_TYPES_H_ #define _OVERRIDE_C_TYPES_H_
#include_next "c_types.h" #include_next "espressif/c_types.h"
typedef long long int64_t; typedef long long int64_t;
typedef int8_t sint8_t; typedef int8_t sint8_t;
......
...@@ -2,7 +2,10 @@ ...@@ -2,7 +2,10 @@
#define _SDK_OVERRIDE_EAGLE_SOC_H_ #define _SDK_OVERRIDE_EAGLE_SOC_H_
#include_next "eagle_soc.h" #include_next "esp8266/eagle_soc.h"
#define GPIO_AS_PIN_SOURCE 0
#define SIGMA_AS_PIN_SOURCE (~GPIO_AS_PIN_SOURCE)
#define GPIO_SIGMA_DELTA 0x00000068 //defined in gpio register.xls #define GPIO_SIGMA_DELTA 0x00000068 //defined in gpio register.xls
...@@ -29,4 +32,97 @@ ...@@ -29,4 +32,97 @@
#define GPIO_SIGMA_DELTA_PRESCALE_SET(x) (((x) << GPIO_SIGMA_DELTA_PRESCALE_LSB) & GPIO_SIGMA_DELTA_PRESCALE_MASK) #define GPIO_SIGMA_DELTA_PRESCALE_SET(x) (((x) << GPIO_SIGMA_DELTA_PRESCALE_LSB) & GPIO_SIGMA_DELTA_PRESCALE_MASK)
//Peripheral device base address define{{
#define PERIPHS_DPORT_BASEADDR 0x3ff00000
#define PERIPHS_GPIO_BASEADDR 0x60000300
#define PERIPHS_TIMER_BASEDDR 0x60000600
#define PERIPHS_RTC_BASEADDR 0x60000700
#define PERIPHS_IO_MUX 0x60000800
//}}
// TIMER reg {{
#define RTC_REG_READ(addr) READ_PERI_REG(PERIPHS_TIMER_BASEDDR + addr)
#define RTC_REG_WRITE(addr, val) WRITE_PERI_REG(PERIPHS_TIMER_BASEDDR + addr, val)
#define RTC_CLR_REG_MASK(reg, mask) CLEAR_PERI_REG_MASK(PERIPHS_TIMER_BASEDDR +reg, mask)
/* Returns the current time according to the timer timer. */
#define NOW() RTC_REG_READ(FRC2_COUNT_ADDRESS)
//load initial_value to timer1
#define FRC1_LOAD_ADDRESS 0x00
//timer1's counter value(count from initial_value to 0)
#define FRC1_COUNT_ADDRESS 0x04
#define FRC1_CTRL_ADDRESS 0x08
//clear timer1's interrupt when write this address
#define FRC1_INT_ADDRESS 0x0c
#define FRC1_INT_CLR_MASK 0x00000001
//timer2's counter value(count from initial_value to 0)
#define FRC2_COUNT_ADDRESS 0x24
// }}
#define RTC_REG_READ(addr) READ_PERI_REG(PERIPHS_TIMER_BASEDDR + addr)
#define RTC_REG_WRITE(addr, val) WRITE_PERI_REG(PERIPHS_TIMER_BASEDDR + addr, val)
#define PERIPHS_IO_MUX_CONF_U (PERIPHS_IO_MUX + 0x00)
#define SPI0_CLK_EQU_SYS_CLK BIT8
#define SPI1_CLK_EQU_SYS_CLK BIT9
#define PERIPHS_IO_MUX_MTDI_U (PERIPHS_IO_MUX + 0x04)
#define FUNC_GPIO12 3
#define PERIPHS_IO_MUX_MTCK_U (PERIPHS_IO_MUX + 0x08)
#define FUNC_GPIO13 3
#define PERIPHS_IO_MUX_MTMS_U (PERIPHS_IO_MUX + 0x0C)
#define FUNC_GPIO14 3
#define PERIPHS_IO_MUX_MTDO_U (PERIPHS_IO_MUX + 0x10)
#define FUNC_GPIO15 3
#define FUNC_U0RTS 4
#define PERIPHS_IO_MUX_U0RXD_U (PERIPHS_IO_MUX + 0x14)
#define FUNC_GPIO3 3
#define PERIPHS_IO_MUX_U0TXD_U (PERIPHS_IO_MUX + 0x18)
#define FUNC_U0TXD 0
#define FUNC_GPIO1 3
#define PERIPHS_IO_MUX_SD_CLK_U (PERIPHS_IO_MUX + 0x1c)
#define FUNC_SDCLK 0
#define FUNC_SPICLK 1
#define PERIPHS_IO_MUX_SD_DATA0_U (PERIPHS_IO_MUX + 0x20)
#define FUNC_SDDATA0 0
#define FUNC_SPIQ 1
#define FUNC_U1TXD 4
#define PERIPHS_IO_MUX_SD_DATA1_U (PERIPHS_IO_MUX + 0x24)
#define FUNC_SDDATA1 0
#define FUNC_SPID 1
#define FUNC_U1RXD 4
#define FUNC_SDDATA1_U1RXD 7
#define PERIPHS_IO_MUX_SD_DATA2_U (PERIPHS_IO_MUX + 0x28)
#define FUNC_SDDATA2 0
#define FUNC_SPIHD 1
#define FUNC_GPIO9 3
#define PERIPHS_IO_MUX_SD_DATA3_U (PERIPHS_IO_MUX + 0x2c)
#define FUNC_SDDATA3 0
#define FUNC_SPIWP 1
#define FUNC_GPIO10 3
#define PERIPHS_IO_MUX_SD_CMD_U (PERIPHS_IO_MUX + 0x30)
#define FUNC_SDCMD 0
#define FUNC_SPICS0 1
#define PERIPHS_IO_MUX_GPIO0_U (PERIPHS_IO_MUX + 0x34)
#define FUNC_GPIO0 0
#define PERIPHS_IO_MUX_GPIO2_U (PERIPHS_IO_MUX + 0x38)
#define FUNC_GPIO2 0
#define FUNC_U1TXD_BK 2
#define FUNC_U0TXD_BK 4
#define PERIPHS_IO_MUX_GPIO4_U (PERIPHS_IO_MUX + 0x3C)
#define FUNC_GPIO4 0
#define PERIPHS_IO_MUX_GPIO5_U (PERIPHS_IO_MUX + 0x40)
#define FUNC_GPIO5 0
#endif #endif
#ifndef _SDK_OVERRIDES_ESPCONN_H
#define _SDK_OVERRIDES_ESPCONN_H
#define reserve reverse
#include "espressif/espconn.h"
#endif
#ifndef _SDK_OVERRIDES_ESP_SYSTEM_H_
#define _SDK_OVERRIDES_ESP_SYSTEM_H_
void system_soft_wdt_feed(void);
#include_next "esp_system.h"
#endif
#ifndef SDK_OVERRIDES_INCLUDE_ETS_SYS_H_ #ifndef SDK_OVERRIDES_INCLUDE_ETS_SYS_H_
#define SDK_OVERRIDES_INCLUDE_ETS_SYS_H_ #define SDK_OVERRIDES_INCLUDE_ETS_SYS_H_
#include_next "ets_sys.h" #include "c_types.h"
#include "os_type.h"
#include "espressif/esp_timer.h"
#include "../libc/c_stdarg.h" // FIXME, these need to change/go together with the task implementation
typedef uint32_t os_signal_t;
typedef uint32_t os_event_t;
typedef uint32_t os_param_t;
int ets_sprintf(char *str, const char *format, ...) __attribute__ ((format (printf, 2, 3))); #include "freertos/portmacro.h"
#include_next "esp8266/ets_sys.h"
int ets_vsprintf (char *d, const char *s, va_list ap);
#define ets_vsprintf vsprintf
#define ETS_FRC_TIMER1_INTR_ATTACH(fn,arg) _xt_isr_attach(ETS_FRC_TIMER1_INUM, fn, arg)
//#define ETS_FRC_TIMER1_NMI_INTR_ATTACH(fn) NmiTimSetFunc(fn)
#define ETS_GPIO_INTR_ATTACH(fn,arg) _xt_isr_attach(ETS_GPIO_INUM, fn, arg)
#define ETS_UART_INTR_ATTACH(fn,arg) _xt_isr_attach(ETS_UART_INUM, fn, arg)
#define ETS_SPI_INTR_ATTACH(fn,arg) _xt_isr_attach(ETS_SPI_INUM, fn, arg)
#define ETS_UART_INTR_ENABLE() _xt_isr_unmask(1 << ETS_UART_INUM)
#define ETS_UART_INTR_DISABLE() _xt_isr_mask(1 << ETS_UART_INUM)
#define ETS_GPIO_INTR_ENABLE() _xt_isr_unmask(1 << ETS_GPIO_INUM)
#define ETS_GPIO_INTR_DISABLE() _xt_isr_mask(1 << ETS_GPIO_INUM)
#define ETS_SPI_INTR_ENABLE() _xt_isr_unmask(1 << ETS_SPI_INUM)
#define ETS_SPI_INTR_DISABLE() _xt_isr_mask(1 << ETS_SPI_INUM)
#define ETS_FRC1_INTR_ENABLE() _xt_isr_unmask(1 << ETS_FRC_TIMER1_INUM)
#define ETS_FRC1_INTR_DISABLE() _xt_isr_mask(1 << ETS_FRC_TIMER1_INUM)
#endif /* SDK_OVERRIDES_INCLUDE_ETS_SYS_H_ */ #endif /* SDK_OVERRIDES_INCLUDE_ETS_SYS_H_ */
/*
* copyright (c) Espressif System 2010
*
*/
#ifndef _GPIO_H_
#define _GPIO_H_
#define GPIO_PIN_ADDR(i) (GPIO_PIN0_ADDRESS + i*4)
#define GPIO_ID_IS_PIN_REGISTER(reg_id) \
((reg_id >= GPIO_ID_PIN0) && (reg_id <= GPIO_ID_PIN(GPIO_PIN_COUNT-1)))
#define GPIO_REGID_TO_PINIDX(reg_id) ((reg_id) - GPIO_ID_PIN0)
typedef enum {
GPIO_PIN_INTR_DISABLE = 0,
GPIO_PIN_INTR_POSEDGE = 1,
GPIO_PIN_INTR_NEGEDGE = 2,
GPIO_PIN_INTR_ANYEDGE = 3,
GPIO_PIN_INTR_LOLEVEL = 4,
GPIO_PIN_INTR_HILEVEL = 5
} GPIO_INT_TYPE;
#define GPIO_OUTPUT_SET(gpio_no, bit_value) \
gpio_output_set((bit_value)<<gpio_no, ((~(bit_value))&0x01)<<gpio_no, 1<<gpio_no,0)
#define GPIO_DIS_OUTPUT(gpio_no) gpio_output_set(0,0,0, 1<<gpio_no)
#define GPIO_INPUT_GET(gpio_no) ((gpio_input_get()>>gpio_no)&BIT0)
/* GPIO interrupt handler, registered through gpio_intr_handler_register */
typedef void (* gpio_intr_handler_fn_t)(uint32 intr_mask, void *arg);
/*
* Initialize GPIO. This includes reading the GPIO Configuration DataSet
* to initialize "output enables" and pin configurations for each gpio pin.
* Must be called once during startup.
*/
void gpio_init(void);
/*
* Change GPIO pin output by setting, clearing, or disabling pins.
* In general, it is expected that a bit will be set in at most one
* of these masks. If a bit is clear in all masks, the output state
* remains unchanged.
*
* There is no particular ordering guaranteed; so if the order of
* writes is significant, calling code should divide a single call
* into multiple calls.
*/
void gpio_output_set(uint32 set_mask,
uint32 clear_mask,
uint32 enable_mask,
uint32 disable_mask);
/*
* Sample the value of GPIO input pins and returns a bitmask.
*/
uint32 gpio_input_get(void);
/*
* Set the specified GPIO register to the specified value.
* This is a very general and powerful interface that is not
* expected to be used during normal operation. It is intended
* mainly for debug, or for unusual requirements.
*/
void gpio_register_set(uint32 reg_id, uint32 value);
/* Get the current value of the specified GPIO register. */
uint32 gpio_register_get(uint32 reg_id);
/*
* Register an application-specific interrupt handler for GPIO pin
* interrupts. Once the interrupt handler is called, it will not
* be called again until after a call to gpio_intr_ack. Any GPIO
* interrupts that occur during the interim are masked.
*
* The application-specific handler is called with a mask of
* pending GPIO interrupts. After processing pin interrupts, the
* application-specific handler may wish to use gpio_intr_pending
* to check for any additional pending interrupts before it returns.
*/
void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg);
/* Determine which GPIO interrupts are pending. */
uint32 gpio_intr_pending(void);
/*
* Acknowledge GPIO interrupts.
* Intended to be called from the gpio_intr_handler_fn.
*/
void gpio_intr_ack(uint32 ack_mask);
void gpio_pin_wakeup_enable(uint32 i, GPIO_INT_TYPE intr_state);
void gpio_pin_wakeup_disable();
void gpio_pin_intr_state_set(uint32 i, GPIO_INT_TYPE intr_state);
#endif // _GPIO_H_
#ifndef _SDK_OVERRIDES_LWIP_NETIF_H_
#define _SDK_OVERRIDES_LWIP_NETIF_H_
struct netif;
#include_next "lwip/netif.h"
#endif
#ifndef _SDK_OVERRIDE_MEM_H_ #ifndef _SDK_OVERRIDE_MEM_H_
#define _SDK_OVERRIDE_MEM_H_ #define _SDK_OVERRIDE_MEM_H_
void *pvPortMalloc (size_t sz, const char *, unsigned); #include "freertos/FreeRTOS.h"
void vPortFree (void *p, const char *, unsigned); void *pvPortZalloc (size_t sz);
void *pvPortZalloc (size_t sz, const char *, unsigned); void *pvPortRealloc (void *p, size_t sz);
void *pvPortRealloc (void *p, size_t n, const char *, unsigned);
#include_next "mem.h" #define os_zalloc pvPortZalloc
#define os_free vPortFree
#define os_malloc pvPortMalloc
#include_next "lwip/mem.h"
#endif #endif
#ifndef _SDK_OVERRIDES_OS_TYPE_H_
#define _SDK_OVERRIDES_OS_TYPE_H_
#define ETSTimer os_timer_t
#define ETSTimerFunc os_timer_func_t
#endif
...@@ -2,18 +2,25 @@ ...@@ -2,18 +2,25 @@
#define _SDK_OVERRIDE_OSAPI_H_ #define _SDK_OVERRIDE_OSAPI_H_
#include "rom.h" #include "rom.h"
void ets_timer_arm_new (ETSTimer *a, int b, int c, int isMstimer); #include "user_config.h"
int atoi(const char *nptr);
int os_printf(const char *format, ...) __attribute__ ((format (printf, 1, 2)));
int os_printf_plus(const char *format, ...) __attribute__ ((format (printf, 1, 2)));
unsigned int uart_baudrate_detect(unsigned int uart_no, unsigned int async);
void NmiTimSetFunc(void (*func)(void));
void call_user_start(void); void call_user_start(void);
#include_next "osapi.h" #define os_memcmp memcmp
#define os_memcpy memcpy
#define os_memmove memmove
#define os_memset memset
#define os_strcat strcat
#define os_strchr strchr
#define os_strcmp strcmp
#define os_strcpy strcpy
#define os_strlen strlen
#define os_strncmp strncmp
#define os_strncpy strncpy
#define os_strstr strstr
#define os_sprintf sprintf
#define os_printf_plus printf
#include <string.h>
#endif #endif
/* Important: we use the same include guard as the spi_flash.h in the
* toolchain, to prevent it from being pulled in and messing things up! */
#ifndef SPI_FLASH_H
#define SPI_FLASH_H
#include "espressif/spi_flash.h"
#endif
#ifndef SDK_OVERRIDES_INCLUDE_USER_INTERFACE_H_ #ifndef SDK_OVERRIDES_INCLUDE_USER_INTERFACE_H_
#define SDK_OVERRIDES_INCLUDE_USER_INTERFACE_H_ #define SDK_OVERRIDES_INCLUDE_USER_INTERFACE_H_
#include_next "user_interface.h" #define ets_timer_arm_new(tmr, ms, rpt, isms) os_timer_arm(tmr,ms,rpt)
//#include_next "user_interface.h"
#include "espressif/esp_system.h"
#include "espressif/esp_misc.h"
#include "espressif/esp_wifi.h"
#include "espressif/esp_sta.h"
#include "espressif/esp_softap.h"
#include "espressif/esp_timer.h"
// FIXME
static inline void system_set_os_print(uint8 onoff) { (void)onoff; }
static inline void system_init_done_cb(void *cb) { (void)cb; }
bool wifi_softap_deauth(uint8 mac[6]); bool wifi_softap_deauth(uint8 mac[6]);
......
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