Commit 7b83bbb2 authored by Arnim Läuger's avatar Arnim Läuger Committed by GitHub
Browse files

Merge pull request #1519 from nodemcu/dev

Next 1.5.4.1 master drop
parents 8e48483c d96d7f23
...@@ -7,7 +7,7 @@ Use one of the two templates below and delete the rest. ...@@ -7,7 +7,7 @@ Use one of the two templates below and delete the rest.
### Actual behavior ### Actual behavior
### Test code ### Test code
Provide a minimal and isolated test which will reproduce the problem. Provide a [Minimal, Complete, and Verifiable example](http://stackoverflow.com/help/mcve) which will reproduce the problem.
```Lua ```Lua
-- add code here -- add code here
``` ```
......
...@@ -2,10 +2,9 @@ Fixes #\<GitHub-issue-number\>. ...@@ -2,10 +2,9 @@ Fixes #\<GitHub-issue-number\>.
Make sure all boxes are checked (add x inside the brackets) when you submit your contribution, remove this sentence before doing so. Make sure all boxes are checked (add x inside the brackets) when you submit your contribution, remove this sentence before doing so.
- [ ] This PR is compliant with the [contributing guidelines](https://github.com/nodemcu/nodemcu-firmware/blob/dev/CONTRIBUTING.md) (if not, please describe why). - [ ] This PR is for the `dev` branch rather than for `master`.
- [ ] This PR is compliant with the [other contributing guidelines](https://github.com/nodemcu/nodemcu-firmware/blob/dev/CONTRIBUTING.md) as well (if not, please describe why).
- [ ] I have thoroughly tested my contribution. - [ ] I have thoroughly tested my contribution.
- [ ] The code changes are reflected in the documentation at `docs/en/*`. - [ ] The code changes are reflected in the documentation at `docs/en/*`.
\<Description of and rational behind this PR\> \<Description of and rational behind this PR\>
\ No newline at end of file
Committers supporting this PR: leave blank
\ No newline at end of file
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
The following is a set of guidelines for contributing to NodeMCU on GitHub. These are just guidelines, not rules, use your best judgment and feel free to propose changes to this document in a pull request. The following is a set of guidelines for contributing to NodeMCU on GitHub. These are just guidelines, not rules, use your best judgment and feel free to propose changes to this document in a pull request.
It is appreciated but optional if you raise an issue _before_ you start changing NodeMCU, discussing the proposed change; emphasising that the you are proposing to develop the patch yourself, and outling the strategy for implementation. This type of discussion is what we should be doing on the issues list and it is better to do this before or in parallel to developing the patch rather than having "you should have done it this way" type of feedback on the PR itself. It is appreciated but optional if you raise an issue _before_ you start changing NodeMCU, discussing the proposed change; emphasing that the you are proposing to develop the patch yourself, and outlining the strategy for implementation. This type of discussion is what we should be doing on the issues list and it is better to do this before or in parallel to developing the patch rather than having "you should have done it this way" type of feedback on the PR itself.
### Table Of Contents ### Table Of Contents
...@@ -17,7 +17,7 @@ It is appreciated but optional if you raise an issue _before_ you start changing ...@@ -17,7 +17,7 @@ It is appreciated but optional if you raise an issue _before_ you start changing
## Development environment setup ## Development environment setup
Use the platform and tools you feel most comfortable with. There are no constraints imposed by this project. You have (at least) two options to set up the toolchain to build the NodeMCU firmware: Use the platform and tools you feel most comfortable with. There are no constraints imposed by this project. You have (at least) two options to set up the toolchain to build the NodeMCU firmware:
- [Full-fledged Linux enviroment](http://www.esp8266.com/wiki/doku.php?id=toolchain#how_to_setup_a_vm_to_host_your_toolchain), either physical or virtual. - [Full-fledged Linux environment](http://www.esp8266.com/wiki/doku.php?id=toolchain#how_to_setup_a_vm_to_host_your_toolchain), either physical or virtual.
- [Docker image](https://hub.docker.com/r/marcelstoer/nodemcu-build/) which allows to run the build inside the container as if you were running a build script on your local machine. - [Docker image](https://hub.docker.com/r/marcelstoer/nodemcu-build/) which allows to run the build inside the container as if you were running a build script on your local machine.
## Writing Documentation ## Writing Documentation
...@@ -32,7 +32,7 @@ There are essentially only two things to keep in mind if you're contributing a P ...@@ -32,7 +32,7 @@ There are essentially only two things to keep in mind if you're contributing a P
If you also want to verify that all is well with your Markdown files you can install Python-based [MkDocs](http://www.mkdocs.org/), which is used by RTD to build the static HTML files, and run `mkdocs serve` in the root of your NodeMCU firmware directory. If you also want to verify that all is well with your Markdown files you can install Python-based [MkDocs](http://www.mkdocs.org/), which is used by RTD to build the static HTML files, and run `mkdocs serve` in the root of your NodeMCU firmware directory.
A note on Markdown *syntax*. As Mkdocs is Python-based it's no surprise it uses a [Python Markdown implementation](https://pythonhosted.org/Markdown/). The good news is that it sticks pretty closely to John Gruber's Markdown and also [supports tables and fenced code blocks](http://www.mkdocs.org/user-guide/writing-your-docs/#markdown-extensions) just like GitHub does. A note on Markdown *syntax*. As MkDocs is Python-based it's no surprise it uses a [Python Markdown implementation](https://pythonhosted.org/Markdown/). The good news is that it sticks pretty closely to John Gruber's Markdown and also [supports tables and fenced code blocks](http://www.mkdocs.org/user-guide/writing-your-docs/#markdown-extensions) just like GitHub does.
A collection of doc-writing hints and tips is maintained on the [wiki](https://github.com/nodemcu/nodemcu-firmware/wiki/Notes-about-writing-docs). A collection of doc-writing hints and tips is maintained on the [wiki](https://github.com/nodemcu/nodemcu-firmware/wiki/Notes-about-writing-docs).
...@@ -40,7 +40,7 @@ If you're interested in some NodeMCU history you're welcome to read [issue #774] ...@@ -40,7 +40,7 @@ If you're interested in some NodeMCU history you're welcome to read [issue #774]
## Working with Git and GitHub ## Working with Git and GitHub
*Pull requests for new features and major fixes should be opened against the `dev` branch.* *Pull requests for new features and fixes should be opened against the `dev` branch.*
Avoid intermediate merge commits. [Rebase](https://www.atlassian.com/git/tutorials/merging-vs-rebasing) your feature branch onto `dev` to pull updates and verify your local changes against them before placing the pull request. Avoid intermediate merge commits. [Rebase](https://www.atlassian.com/git/tutorials/merging-vs-rebasing) your feature branch onto `dev` to pull updates and verify your local changes against them before placing the pull request.
...@@ -52,12 +52,12 @@ Avoid intermediate merge commits. [Rebase](https://www.atlassian.com/git/tutoria ...@@ -52,12 +52,12 @@ Avoid intermediate merge commits. [Rebase](https://www.atlassian.com/git/tutoria
1. `git checkout <branch-name>` 1. `git checkout <branch-name>`
1. Make changes to the code base and commit them using e.g. `git commit -a -m 'Look ma, I did it'` 1. Make changes to the code base and commit them using e.g. `git commit -a -m 'Look ma, I did it'`
1. When you're done: 1. When you're done:
1. [Squash your commits](http://www.andrewconnell.com/blog/squash-multiple-git-commits-into-one) into one. There are [several ways](http://stackoverflow.com/a/5201642/131929) of doing this. 1. [Squash your commits](http://www.andrewconnell.com/blog/squash-multiple-git-commits-into-one). There are [several ways](http://stackoverflow.com/a/5201642/131929) of doing this.
1. Bring your fork up-to-date with the NodeMCU upstream repo ([see below](#keeping-your-fork-in-sync)). Then rebase your branch on `dev` running `git rebase dev`. 1. Bring your fork up-to-date with the NodeMCU upstream repo ([see below](#keeping-your-fork-in-sync)). Then rebase your branch on `dev` running `git rebase dev`.
1. `git push` 1. `git push`
1. [Create a pull request](https://help.github.com/articles/creating-a-pull-request/) (PR) on GitHub. 1. [Create a pull request](https://help.github.com/articles/creating-a-pull-request/) (PR) on GitHub.
This is just one way of doing things. If you're proficient in Git matters you're free to choose your own. If you want to read more then the [GitHub chapter in the Git book](http://git-scm.com/book/en/v2/GitHub-Contributing-to-a-Project#The-GitHub-Flow) is a way to start. [GitHub's own documenation](https://help.github.com/categories/collaborating/) contains a wealth of information as well. This is just one way of doing things. If you're proficient in Git matters you're free to choose your own. If you want to read more then the [GitHub chapter in the Git book](http://git-scm.com/book/en/v2/GitHub-Contributing-to-a-Project#The-GitHub-Flow) is a way to start. [GitHub's own documentation](https://help.github.com/categories/collaborating/) contains a wealth of information as well.
### Keeping your fork in sync ### Keeping your fork in sync
You need to sync your fork with the NodeMCU upstream repository from time to time, latest before you rebase (see flow above). You need to sync your fork with the NodeMCU upstream repository from time to time, latest before you rebase (see flow above).
......
...@@ -24,6 +24,13 @@ SDK_DIR:=$(TOP_DIR)/sdk/esp_iot_sdk_v$(SDK_VER) ...@@ -24,6 +24,13 @@ SDK_DIR:=$(TOP_DIR)/sdk/esp_iot_sdk_v$(SDK_VER)
CCFLAGS:= -I$(TOP_DIR)/sdk-overrides/include -I$(SDK_DIR)/include CCFLAGS:= -I$(TOP_DIR)/sdk-overrides/include -I$(SDK_DIR)/include
LDFLAGS:= -L$(SDK_DIR)/lib -L$(SDK_DIR)/ld $(LDFLAGS) LDFLAGS:= -L$(SDK_DIR)/lib -L$(SDK_DIR)/ld $(LDFLAGS)
ifdef DEBUG
CCFLAGS += -ggdb -O0
LDFLAGS += -ggdb
else
CCFLAGS += -Os
endif
############################################################# #############################################################
# Select compile # Select compile
# #
...@@ -38,11 +45,11 @@ ifeq ($(OS),Windows_NT) ...@@ -38,11 +45,11 @@ ifeq ($(OS),Windows_NT)
CPP = xt-cpp CPP = xt-cpp
OBJCOPY = xt-objcopy OBJCOPY = xt-objcopy
#MAKE = xt-make #MAKE = xt-make
CCFLAGS += -Os --rename-section .text=.irom0.text --rename-section .literal=.irom0.literal CCFLAGS += --rename-section .text=.irom0.text --rename-section .literal=.irom0.literal
else else
# It is gcc, may be cygwin # It is gcc, may be cygwin
# Can we use -fdata-sections? # Can we use -fdata-sections?
CCFLAGS += -Os -ffunction-sections -fno-jump-tables -fdata-sections CCFLAGS += -ffunction-sections -fno-jump-tables -fdata-sections
AR = xtensa-lx106-elf-ar AR = xtensa-lx106-elf-ar
CC = xtensa-lx106-elf-gcc CC = xtensa-lx106-elf-gcc
NM = xtensa-lx106-elf-nm NM = xtensa-lx106-elf-nm
...@@ -69,7 +76,7 @@ else ...@@ -69,7 +76,7 @@ else
else else
ESPPORT = $(COMPORT) ESPPORT = $(COMPORT)
endif endif
CCFLAGS += -Os -ffunction-sections -fno-jump-tables -fdata-sections CCFLAGS += -ffunction-sections -fno-jump-tables -fdata-sections
AR = xtensa-lx106-elf-ar AR = xtensa-lx106-elf-ar
CC = xtensa-lx106-elf-gcc CC = xtensa-lx106-elf-gcc
NM = xtensa-lx106-elf-nm NM = xtensa-lx106-elf-nm
...@@ -231,11 +238,22 @@ clobber: $(SPECIAL_CLOBBER) ...@@ -231,11 +238,22 @@ clobber: $(SPECIAL_CLOBBER)
$(foreach d, $(SUBDIRS), $(MAKE) -C $(d) clobber;) $(foreach d, $(SUBDIRS), $(MAKE) -C $(d) clobber;)
$(RM) -r $(ODIR) $(RM) -r $(ODIR)
flash: flash:
@echo "use one of the following targets to flash the firmware"
@echo " make flash512k - for ESP with 512kB flash size"
@echo " make flash4m - for ESP with 4MB flash size"
flash512k:
$(MAKE) -e FLASHOPTIONS="-fm qio -fs 4m -ff 40m" flashinternal
flash4m:
$(MAKE) -e FLASHOPTIONS="-fm dio -fs 32m -ff 40m" flashinternal
flashinternal:
ifndef PDIR ifndef PDIR
$(MAKE) -C ./app flash $(MAKE) -C ./app flashinternal
else else
$(ESPTOOL) --port $(ESPPORT) write_flash 0x00000 $(FIRMWAREDIR)0x00000.bin 0x10000 $(FIRMWAREDIR)0x10000.bin $(ESPTOOL) --port $(ESPPORT) write_flash $(FLASHOPTIONS) 0x00000 $(FIRMWAREDIR)0x00000.bin 0x10000 $(FIRMWAREDIR)0x10000.bin
endif endif
.subdirs: .subdirs:
...@@ -255,7 +273,7 @@ endif ...@@ -255,7 +273,7 @@ endif
.PHONY: spiffs-image-remove .PHONY: spiffs-image-remove
spiffs-image-remove: spiffs-image-remove:
$(MAKE) -C tools remove-image $(MAKE) -C tools remove-image spiffsimg/spiffsimg
.PHONY: spiffs-image .PHONY: spiffs-image
......
...@@ -42,7 +42,10 @@ SUBDIRS= \ ...@@ -42,7 +42,10 @@ SUBDIRS= \
dhtlib \ dhtlib \
tsl2561 \ tsl2561 \
net \ net \
http http \
fatfs \
esp-gdbstub \
websocket
endif # } PDIR endif # } PDIR
...@@ -82,11 +85,14 @@ COMPONENTS_eagle.app.v6 = \ ...@@ -82,11 +85,14 @@ COMPONENTS_eagle.app.v6 = \
ucglib/ucglib.a \ ucglib/ucglib.a \
smart/smart.a \ smart/smart.a \
spiffs/spiffs.a \ spiffs/spiffs.a \
fatfs/libfatfs.a \
cjson/libcjson.a \ cjson/libcjson.a \
crypto/libcrypto.a \ crypto/libcrypto.a \
dhtlib/libdhtlib.a \ dhtlib/libdhtlib.a \
tsl2561/tsl2561lib.a \ tsl2561/tsl2561lib.a \
http/libhttp.a \ http/libhttp.a \
websocket/libwebsocket.a \
esp-gdbstub/libgdbstub.a \
net/libnodemcu_net.a \ net/libnodemcu_net.a \
modules/libmodules.a \ modules/libmodules.a \
......
...@@ -2,19 +2,14 @@ ...@@ -2,19 +2,14 @@
#include "../lua/lauxlib.h" #include "../lua/lauxlib.h"
#include <c_stdlib.h> #include <c_stdlib.h>
static lua_State *gL;
static const char errfmt[] = "cjson %salloc: out of mem (%d bytes)"; static const char errfmt[] = "cjson %salloc: out of mem (%d bytes)";
void cjson_mem_setlua (lua_State *L)
{
gL = L;
}
void *cjson_mem_malloc (uint32_t sz) void *cjson_mem_malloc (uint32_t sz)
{ {
void *p = (void*)c_malloc (sz); void *p = (void*)c_malloc (sz);
if (!p && gL) lua_State *L = lua_getstate();
luaL_error (gL, errfmt, "m", sz); if (!p)
luaL_error (L, errfmt, "m", sz);
return p; return p;
} }
...@@ -22,7 +17,8 @@ void *cjson_mem_malloc (uint32_t sz) ...@@ -22,7 +17,8 @@ void *cjson_mem_malloc (uint32_t sz)
void *cjson_mem_realloc (void *o, uint32_t sz) void *cjson_mem_realloc (void *o, uint32_t sz)
{ {
void *p = (void*)c_realloc (o, sz); void *p = (void*)c_realloc (o, sz);
if (!p && gL) lua_State *L = lua_getstate();
luaL_error (gL, errfmt, "re", sz); if (!p)
luaL_error (L, errfmt, "re", sz);
return p; return p;
} }
...@@ -3,8 +3,6 @@ ...@@ -3,8 +3,6 @@
#include "../lua/lua.h" #include "../lua/lua.h"
void cjson_mem_setlua (lua_State *L);
void *cjson_mem_malloc (uint32_t sz); void *cjson_mem_malloc (uint32_t sz);
void *cjson_mem_realloc (void *p, uint32_t sz); void *cjson_mem_realloc (void *p, uint32_t sz);
......
...@@ -155,7 +155,6 @@ typedef struct ...@@ -155,7 +155,6 @@ typedef struct
typedef struct coap_luser_entry coap_luser_entry; typedef struct coap_luser_entry coap_luser_entry;
struct coap_luser_entry{ struct coap_luser_entry{
lua_State *L;
// int ref; // int ref;
// char name[MAX_SEGMENTS_SIZE+1]; // +1 for string '\0' // char name[MAX_SEGMENTS_SIZE+1]; // +1 for string '\0'
const char *name; const char *name;
......
...@@ -37,6 +37,7 @@ static int handle_get_variable(const coap_endpoint_t *ep, coap_rw_buffer_t *scra ...@@ -37,6 +37,7 @@ static int handle_get_variable(const coap_endpoint_t *ep, coap_rw_buffer_t *scra
const coap_option_t *opt; const coap_option_t *opt;
uint8_t count; uint8_t count;
int n; int n;
lua_State *L = lua_getstate();
if (NULL != (opt = coap_findOptions(inpkt, COAP_OPTION_URI_PATH, &count))) if (NULL != (opt = coap_findOptions(inpkt, COAP_OPTION_URI_PATH, &count)))
{ {
if ((count != ep->path->count ) && (count != ep->path->count + 1)) // +1 for /f/[function], /v/[variable] if ((count != ep->path->count ) && (count != ep->path->count + 1)) // +1 for /f/[function], /v/[variable]
...@@ -58,19 +59,17 @@ static int handle_get_variable(const coap_endpoint_t *ep, coap_rw_buffer_t *scra ...@@ -58,19 +59,17 @@ static int handle_get_variable(const coap_endpoint_t *ep, coap_rw_buffer_t *scra
NODE_DBG("/v1/v/"); NODE_DBG("/v1/v/");
NODE_DBG((char *)h->name); NODE_DBG((char *)h->name);
NODE_DBG(" match.\n"); NODE_DBG(" match.\n");
if(h->L == NULL)
return coap_make_response(scratch, outpkt, NULL, 0, id_hi, id_lo, &inpkt->tok, COAP_RSPCODE_NOT_FOUND, COAP_CONTENTTYPE_NONE);
if(c_strlen(h->name)) if(c_strlen(h->name))
{ {
n = lua_gettop(h->L); n = lua_gettop(L);
lua_getglobal(h->L, h->name); lua_getglobal(L, h->name);
if (!lua_isnumber(h->L, -1) && !lua_isstring(h->L, -1)) { if (!lua_isnumber(L, -1) && !lua_isstring(L, -1)) {
NODE_DBG ("should be a number or string.\n"); NODE_DBG ("should be a number or string.\n");
lua_settop(h->L, n); lua_settop(L, n);
return coap_make_response(scratch, outpkt, NULL, 0, id_hi, id_lo, &inpkt->tok, COAP_RSPCODE_NOT_FOUND, COAP_CONTENTTYPE_NONE); return coap_make_response(scratch, outpkt, NULL, 0, id_hi, id_lo, &inpkt->tok, COAP_RSPCODE_NOT_FOUND, COAP_CONTENTTYPE_NONE);
} else { } else {
const char *res = lua_tostring(h->L,-1); const char *res = lua_tostring(L,-1);
lua_settop(h->L, n); lua_settop(L, n);
return coap_make_response(scratch, outpkt, (const uint8_t *)res, c_strlen(res), id_hi, id_lo, &inpkt->tok, COAP_RSPCODE_CONTENT, h->content_type); return coap_make_response(scratch, outpkt, (const uint8_t *)res, c_strlen(res), id_hi, id_lo, &inpkt->tok, COAP_RSPCODE_CONTENT, h->content_type);
} }
} }
...@@ -94,6 +93,7 @@ static int handle_post_function(const coap_endpoint_t *ep, coap_rw_buffer_t *scr ...@@ -94,6 +93,7 @@ static int handle_post_function(const coap_endpoint_t *ep, coap_rw_buffer_t *scr
const coap_option_t *opt; const coap_option_t *opt;
uint8_t count; uint8_t count;
int n; int n;
lua_State *L = lua_getstate();
if (NULL != (opt = coap_findOptions(inpkt, COAP_OPTION_URI_PATH, &count))) if (NULL != (opt = coap_findOptions(inpkt, COAP_OPTION_URI_PATH, &count)))
{ {
if ((count != ep->path->count ) && (count != ep->path->count + 1)) // +1 for /f/[function], /v/[variable] if ((count != ep->path->count ) && (count != ep->path->count + 1)) // +1 for /f/[function], /v/[variable]
...@@ -116,37 +116,34 @@ static int handle_post_function(const coap_endpoint_t *ep, coap_rw_buffer_t *scr ...@@ -116,37 +116,34 @@ static int handle_post_function(const coap_endpoint_t *ep, coap_rw_buffer_t *scr
NODE_DBG((char *)h->name); NODE_DBG((char *)h->name);
NODE_DBG(" match.\n"); NODE_DBG(" match.\n");
if(h->L == NULL)
return coap_make_response(scratch, outpkt, NULL, 0, id_hi, id_lo, &inpkt->tok, COAP_RSPCODE_NOT_FOUND, COAP_CONTENTTYPE_NONE);
if(c_strlen(h->name)) if(c_strlen(h->name))
{ {
n = lua_gettop(h->L); n = lua_gettop(L);
lua_getglobal(h->L, h->name); lua_getglobal(L, h->name);
if (lua_type(h->L, -1) != LUA_TFUNCTION) { if (lua_type(L, -1) != LUA_TFUNCTION) {
NODE_DBG ("should be a function\n"); NODE_DBG ("should be a function\n");
lua_settop(h->L, n); lua_settop(L, n);
return coap_make_response(scratch, outpkt, NULL, 0, id_hi, id_lo, &inpkt->tok, COAP_RSPCODE_NOT_FOUND, COAP_CONTENTTYPE_NONE); return coap_make_response(scratch, outpkt, NULL, 0, id_hi, id_lo, &inpkt->tok, COAP_RSPCODE_NOT_FOUND, COAP_CONTENTTYPE_NONE);
} else { } else {
lua_pushlstring(h->L, inpkt->payload.p, inpkt->payload.len); // make sure payload.p is filled with '\0' after payload.len, or use lua_pushlstring lua_pushlstring(L, inpkt->payload.p, inpkt->payload.len); // make sure payload.p is filled with '\0' after payload.len, or use lua_pushlstring
lua_call(h->L, 1, 1); lua_call(L, 1, 1);
if (!lua_isnil(h->L, -1)){ /* get return? */ if (!lua_isnil(L, -1)){ /* get return? */
if( lua_isstring(h->L, -1) ) // deal with the return string if( lua_isstring(L, -1) ) // deal with the return string
{ {
size_t len = 0; size_t len = 0;
const char *ret = luaL_checklstring( h->L, -1, &len ); const char *ret = luaL_checklstring( L, -1, &len );
if(len > MAX_PAYLOAD_SIZE){ if(len > MAX_PAYLOAD_SIZE){
lua_settop(h->L, n); lua_settop(L, n);
luaL_error( h->L, "return string:<MAX_PAYLOAD_SIZE" ); luaL_error( L, "return string:<MAX_PAYLOAD_SIZE" );
return coap_make_response(scratch, outpkt, NULL, 0, id_hi, id_lo, &inpkt->tok, COAP_RSPCODE_NOT_FOUND, COAP_CONTENTTYPE_NONE); return coap_make_response(scratch, outpkt, NULL, 0, id_hi, id_lo, &inpkt->tok, COAP_RSPCODE_NOT_FOUND, COAP_CONTENTTYPE_NONE);
} }
NODE_DBG((char *)ret); NODE_DBG((char *)ret);
NODE_DBG("\n"); NODE_DBG("\n");
lua_settop(h->L, n); lua_settop(L, n);
return coap_make_response(scratch, outpkt, ret, len, id_hi, id_lo, &inpkt->tok, COAP_RSPCODE_CONTENT, COAP_CONTENTTYPE_TEXT_PLAIN); return coap_make_response(scratch, outpkt, ret, len, id_hi, id_lo, &inpkt->tok, COAP_RSPCODE_CONTENT, COAP_CONTENTTYPE_TEXT_PLAIN);
} }
} else { } else {
lua_settop(h->L, n); lua_settop(L, n);
return coap_make_response(scratch, outpkt, NULL, 0, id_hi, id_lo, &inpkt->tok, COAP_RSPCODE_CONTENT, COAP_CONTENTTYPE_TEXT_PLAIN); return coap_make_response(scratch, outpkt, NULL, 0, id_hi, id_lo, &inpkt->tok, COAP_RSPCODE_CONTENT, COAP_CONTENTTYPE_TEXT_PLAIN);
} }
} }
...@@ -198,10 +195,10 @@ static int handle_get_id(const coap_endpoint_t *ep, coap_rw_buffer_t *scratch, c ...@@ -198,10 +195,10 @@ static int handle_get_id(const coap_endpoint_t *ep, coap_rw_buffer_t *scratch, c
return coap_make_response(scratch, outpkt, (const uint8_t *)(&id), sizeof(uint32_t), id_hi, id_lo, &inpkt->tok, COAP_RSPCODE_CONTENT, COAP_CONTENTTYPE_TEXT_PLAIN); return coap_make_response(scratch, outpkt, (const uint8_t *)(&id), sizeof(uint32_t), id_hi, id_lo, &inpkt->tok, COAP_RSPCODE_CONTENT, COAP_CONTENTTYPE_TEXT_PLAIN);
} }
coap_luser_entry var_head = {NULL,NULL,NULL,0}; coap_luser_entry var_head = {NULL,NULL,0};
coap_luser_entry *variable_entry = &var_head; coap_luser_entry *variable_entry = &var_head;
coap_luser_entry func_head = {NULL,NULL,NULL,0}; coap_luser_entry func_head = {NULL,NULL,0};
coap_luser_entry *function_entry = &func_head; coap_luser_entry *function_entry = &func_head;
const coap_endpoint_t endpoints[] = const coap_endpoint_t endpoints[] =
......
...@@ -41,6 +41,7 @@ STD_CFLAGS=-std=gnu11 -Wimplicit ...@@ -41,6 +41,7 @@ STD_CFLAGS=-std=gnu11 -Wimplicit
INCLUDES := $(INCLUDES) -I $(PDIR)include INCLUDES := $(INCLUDES) -I $(PDIR)include
INCLUDES += -I ./ INCLUDES += -I ./
INCLUDES += -I ../libc INCLUDES += -I ../libc
INCLUDES += -I ../platform
PDIR := ../$(PDIR) PDIR := ../$(PDIR)
sinclude $(PDIR)Makefile sinclude $(PDIR)Makefile
...@@ -27,6 +27,7 @@ ...@@ -27,6 +27,7 @@
* SUCH DAMAGE. * SUCH DAMAGE.
* *
*/ */
#include "vfs.h"
#include "digests.h" #include "digests.h"
#include "user_config.h" #include "user_config.h"
#include "rom.h" #include "rom.h"
...@@ -155,31 +156,22 @@ int ICACHE_FLASH_ATTR crypto_fhash (const digest_mech_info_t *mi, ...@@ -155,31 +156,22 @@ int ICACHE_FLASH_ATTR crypto_fhash (const digest_mech_info_t *mi,
} }
int ICACHE_FLASH_ATTR crypto_hmac (const digest_mech_info_t *mi, void crypto_hmac_begin (void *ctx, const digest_mech_info_t *mi,
const char *data, size_t data_len, const char *key, size_t key_len, uint8_t *k_opad)
const char *key, size_t key_len,
uint8_t *digest)
{ {
if (!mi)
return EINVAL;
void *ctx = (void *)os_malloc (mi->ctx_size);
if (!ctx)
return ENOMEM;
// If key too long, it needs to be hashed before use // If key too long, it needs to be hashed before use
char tmp[mi->digest_size];
if (key_len > mi->block_size) if (key_len > mi->block_size)
{ {
mi->create (ctx);
mi->update (ctx, key, key_len); mi->update (ctx, key, key_len);
mi->finalize (digest, ctx); mi->finalize (tmp, ctx);
key = digest; key = tmp;
key_len = mi->digest_size; key_len = mi->digest_size;
mi->create (ctx); // refresh
} }
const size_t bs = mi->block_size; const size_t bs = mi->block_size;
uint8_t k_ipad[bs]; uint8_t k_ipad[bs];
uint8_t k_opad[bs];
os_memset (k_ipad, 0x36, bs); os_memset (k_ipad, 0x36, bs);
os_memset (k_opad, 0x5c, bs); os_memset (k_opad, 0x5c, bs);
...@@ -190,16 +182,42 @@ int ICACHE_FLASH_ATTR crypto_hmac (const digest_mech_info_t *mi, ...@@ -190,16 +182,42 @@ int ICACHE_FLASH_ATTR crypto_hmac (const digest_mech_info_t *mi,
k_opad[i] ^= key[i]; k_opad[i] ^= key[i];
} }
mi->create (ctx);
mi->update (ctx, k_ipad, bs); mi->update (ctx, k_ipad, bs);
mi->update (ctx, data, data_len); }
void crypto_hmac_finalize (void *ctx, const digest_mech_info_t *mi,
const uint8_t *k_opad, uint8_t *digest)
{
mi->finalize (digest, ctx); mi->finalize (digest, ctx);
mi->create (ctx); mi->create (ctx);
mi->update (ctx, k_opad, bs); mi->update (ctx, k_opad, mi->block_size);
mi->update (ctx, digest, mi->digest_size); mi->update (ctx, digest, mi->digest_size);
mi->finalize (digest, ctx); mi->finalize (digest, ctx);
}
os_free (ctx);
int crypto_hmac (const digest_mech_info_t *mi,
const char *data, size_t data_len,
const char *key, size_t key_len,
uint8_t *digest)
{
if (!mi)
return EINVAL;
struct {
uint8_t ctx[mi->ctx_size];
uint8_t k_opad[mi->block_size];
} *tmp = os_malloc (sizeof (*tmp));
if (!tmp)
return ENOMEM;
mi->create (tmp->ctx);
crypto_hmac_begin (tmp->ctx, mi, key, key_len, tmp->k_opad);
mi->update (tmp->ctx, data, data_len);
crypto_hmac_finalize (tmp->ctx, mi, tmp->k_opad, digest);
os_free (tmp);
return 0; return 0;
} }
...@@ -6,7 +6,7 @@ ...@@ -6,7 +6,7 @@
typedef void (*create_ctx_fn)(void *ctx); typedef void (*create_ctx_fn)(void *ctx);
typedef void (*update_ctx_fn)(void *ctx, const uint8_t *msg, int len); typedef void (*update_ctx_fn)(void *ctx, const uint8_t *msg, int len);
typedef void (*finalize_ctx_fn)(uint8_t *digest, void *ctx); typedef void (*finalize_ctx_fn)(uint8_t *digest, void *ctx);
typedef size_t ( *read_fn )(int fd, void *ptr, size_t len); typedef sint32_t ( *read_fn )(int fd, void *ptr, size_t len);
/** /**
* Description of a message digest mechanism. * Description of a message digest mechanism.
...@@ -66,7 +66,35 @@ int crypto_hash (const digest_mech_info_t *mi, const char *data, size_t data_len ...@@ -66,7 +66,35 @@ int crypto_hash (const digest_mech_info_t *mi, const char *data, size_t data_len
int crypto_fhash (const digest_mech_info_t *mi, read_fn read, int readarg, uint8_t *digest); int crypto_fhash (const digest_mech_info_t *mi, read_fn read, int readarg, uint8_t *digest);
/** /**
* Generate a HMAC signature. * Commence calculating a HMAC signature.
*
* Once this fuction returns successfully, the @c ctx may be updated with
* data in multiple passes uses @c mi->update(), before being finalized via
* @c crypto_hmac_finalize().
*
* @param ctx A created context for the given mech @c mi.
* @param mi A mech from @c crypto_digest_mech().
* @param key The key bytes to use.
* @param key_len Number of bytes the @c key comprises.
* @param k_opad Buffer of size @c mi->block_size bytes to store the second
* round of key material in.
* Must be passed to @c crypto_hmac_finalize().
*/
void crypto_hmac_begin (void *ctx, const digest_mech_info_t *mi, const char *key, size_t key_len, uint8_t *k_opad);
/**
* Finalizes calculating a HMAC signature.
* @param ctx The created context used with @c crypto_hmac_begin().
* @param mi The mech used with @c crypto_hmac_begin().
* @param k_opad Second round of keying material, obtained
* from @c crypto_hmac_begin().
* @param digest Output buffer, must be at least @c mi->digest_size in size.
*/
void crypto_hmac_finalize (void *ctx, const digest_mech_info_t *mi, const uint8_t *k_opad, uint8_t *digest);
/**
* Generate a HMAC signature in one pass.
* Implemented in terms of @c crypto_hmac_begin() / @c crypto_hmac_end().
* @param mi A mech from @c crypto_digest_mech(). A null pointer @c mi * @param mi A mech from @c crypto_digest_mech(). A null pointer @c mi
* is harmless, but will of course result in an error return. * is harmless, but will of course result in an error return.
* @param data The data to generate a signature for. * @param data The data to generate a signature for.
......
#include "driver/spi.h" #include "driver/spi.h"
typedef union {
uint32 word[2];
uint64 dword;
} spi_buf_t;
static uint32_t spi_clkdiv[2];
/****************************************************************************** /******************************************************************************
* FunctionName : spi_lcd_mode_init * FunctionName : spi_lcd_mode_init
...@@ -59,6 +66,45 @@ void spi_lcd_9bit_write(uint8 spi_no,uint8 high_bit,uint8 low_8bit) ...@@ -59,6 +66,45 @@ void spi_lcd_9bit_write(uint8 spi_no,uint8 high_bit,uint8 low_8bit)
SET_PERI_REG_MASK(SPI_CMD(spi_no), SPI_USR); //transmission start SET_PERI_REG_MASK(SPI_CMD(spi_no), SPI_USR); //transmission start
} }
/******************************************************************************
* FunctionName : spi_set_clkdiv
* Description : Set the clock divider
* Parameters : uint8 spi_no - SPI module number, Only "SPI" and "HSPI" are valid
* uint32 clock_div - new clock divider
* Returns : uint32 - previous clock divider
*******************************************************************************/
uint32_t spi_set_clkdiv(uint8 spi_no, uint32_t clock_div)
{
uint32_t tmp_clkdiv;
if (spi_no > 1) return 0; //handle invalid input number
tmp_clkdiv = spi_clkdiv[spi_no];
if (clock_div > 1) {
uint8 i, k;
i = (clock_div / 40) ? (clock_div / 40) : 1;
k = clock_div / i;
WRITE_PERI_REG(SPI_CLOCK(spi_no),
(((i - 1) & SPI_CLKDIV_PRE) << SPI_CLKDIV_PRE_S) |
(((k - 1) & SPI_CLKCNT_N) << SPI_CLKCNT_N_S) |
((((k + 1) / 2 - 1) & SPI_CLKCNT_H) << SPI_CLKCNT_H_S) |
(((k - 1) & SPI_CLKCNT_L) << SPI_CLKCNT_L_S)); //clear bit 31,set SPI clock div
} else {
WRITE_PERI_REG(SPI_CLOCK(spi_no), SPI_CLK_EQU_SYSCLK); // 80Mhz speed
}
if(spi_no==SPI){
WRITE_PERI_REG(PERIPHS_IO_MUX, 0x005 | (clock_div <= 1 ? 0x100 : 0));
}
else if(spi_no==HSPI){
WRITE_PERI_REG(PERIPHS_IO_MUX, 0x105 | (clock_div <= 1 ? 0x200 : 0));
}
spi_clkdiv[spi_no] = clock_div;
return tmp_clkdiv;
}
/****************************************************************************** /******************************************************************************
* FunctionName : spi_master_init * FunctionName : spi_master_init
* Description : SPI master initial function for common byte units transmission * Description : SPI master initial function for common byte units transmission
...@@ -96,28 +142,15 @@ void spi_master_init(uint8 spi_no, unsigned cpol, unsigned cpha, uint32_t clock_ ...@@ -96,28 +142,15 @@ void spi_master_init(uint8 spi_no, unsigned cpol, unsigned cpha, uint32_t clock_
//clear Dual or Quad lines transmission mode //clear Dual or Quad lines transmission mode
CLEAR_PERI_REG_MASK(SPI_CTRL(spi_no), SPI_QIO_MODE|SPI_DIO_MODE|SPI_DOUT_MODE|SPI_QOUT_MODE); CLEAR_PERI_REG_MASK(SPI_CTRL(spi_no), SPI_QIO_MODE|SPI_DIO_MODE|SPI_DOUT_MODE|SPI_QOUT_MODE);
if (clock_div > 1) { spi_set_clkdiv(spi_no, clock_div);
uint8 i, k;
i = (clock_div / 40) ? (clock_div / 40) : 1;
k = clock_div / i;
WRITE_PERI_REG(SPI_CLOCK(spi_no),
(((i - 1) & SPI_CLKDIV_PRE) << SPI_CLKDIV_PRE_S) |
(((k - 1) & SPI_CLKCNT_N) << SPI_CLKCNT_N_S) |
((((k + 1) / 2 - 1) & SPI_CLKCNT_H) << SPI_CLKCNT_H_S) |
(((k - 1) & SPI_CLKCNT_L) << SPI_CLKCNT_L_S)); //clear bit 31,set SPI clock div
} else {
WRITE_PERI_REG(SPI_CLOCK(spi_no), SPI_CLK_EQU_SYSCLK); // 80Mhz speed
}
if(spi_no==SPI){ if(spi_no==SPI){
WRITE_PERI_REG(PERIPHS_IO_MUX, 0x005 | (clock_div <= 1 ? 0x100 : 0));
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, 1);//configure io to spi mode PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, 1);//configure io to spi mode
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CMD_U, 1);//configure io to spi mode PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CMD_U, 1);//configure io to spi mode
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA0_U, 1);//configure io to spi mode PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA0_U, 1);//configure io to spi mode
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA1_U, 1);//configure io to spi mode PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA1_U, 1);//configure io to spi mode
} }
else if(spi_no==HSPI){ else if(spi_no==HSPI){
WRITE_PERI_REG(PERIPHS_IO_MUX, 0x105 | (clock_div <= 1 ? 0x200 : 0));
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 2);//configure io to spi mode PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 2);//configure io to spi mode
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 2);//configure io to spi mode PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 2);//configure io to spi mode
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 2);//configure io to spi mode PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 2);//configure io to spi mode
...@@ -125,6 +158,44 @@ void spi_master_init(uint8 spi_no, unsigned cpol, unsigned cpha, uint32_t clock_ ...@@ -125,6 +158,44 @@ void spi_master_init(uint8 spi_no, unsigned cpol, unsigned cpha, uint32_t clock_
} }
} }
void spi_mast_byte_order(uint8 spi_no, uint8 order)
{
if(spi_no > 1)
return;
if (order == SPI_ORDER_MSB) {
SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_RD_BYTE_ORDER | SPI_WR_BYTE_ORDER);
} else if (order == SPI_ORDER_LSB) {
CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_RD_BYTE_ORDER | SPI_WR_BYTE_ORDER);
}
}
/******************************************************************************
* FunctionName : spi_mast_blkset
* Description : Copy a block of data to the MOSI FIFO
* Parameters : uint8 spi_no - SPI module number, Only "SPI" and "HSPI" are valid
* size_t bitlen - number of bits to copy, multiple of 8
* uint8 *data - pointer to data buffer
*******************************************************************************/
void spi_mast_blkset(uint8 spi_no, size_t bitlen, const uint8 *data)
{
while(READ_PERI_REG(SPI_CMD(spi_no)) & SPI_USR);
os_memcpy((void *)SPI_W0(spi_no), (const void *)data, bitlen >> 3);
}
/******************************************************************************
* FunctionName : spi_mast_blkget
* Description : Copy a block of data from the MISO FIFO
* Parameters : uint8 spi_no - SPI module number, Only "SPI" and "HSPI" are valid
* size_t bitlen - number of bits to copy, multiple of 8
* uint8 *data - pointer to data buffer
*******************************************************************************/
void spi_mast_blkget(uint8 spi_no, size_t bitlen, uint8 *data)
{
while(READ_PERI_REG(SPI_CMD(spi_no)) & SPI_USR);
os_memcpy((void *)data, (void *)SPI_W0(spi_no), bitlen >> 3);
}
/****************************************************************************** /******************************************************************************
* FunctionName : spi_mast_set_mosi * FunctionName : spi_mast_set_mosi
* Description : Enter provided data into MOSI buffer. * Description : Enter provided data into MOSI buffer.
...@@ -137,48 +208,36 @@ void spi_master_init(uint8 spi_no, unsigned cpol, unsigned cpha, uint32_t clock_ ...@@ -137,48 +208,36 @@ void spi_master_init(uint8 spi_no, unsigned cpol, unsigned cpha, uint32_t clock_
*******************************************************************************/ *******************************************************************************/
void spi_mast_set_mosi(uint8 spi_no, uint16 offset, uint8 bitlen, uint32 data) void spi_mast_set_mosi(uint8 spi_no, uint16 offset, uint8 bitlen, uint32 data)
{ {
uint8 wn, wn_offset, wn_bitlen; uint8 wn, shift;
uint32 wn_data; spi_buf_t spi_buf;
if (spi_no > 1) if (spi_no > 1)
return; // handle invalid input number return; // handle invalid input number
if (bitlen > 32) if (bitlen > 32)
return; // handle invalid input number return; // handle invalid input number
while(READ_PERI_REG(SPI_CMD(spi_no)) & SPI_USR);
// determine which SPI_Wn register is addressed // determine which SPI_Wn register is addressed
wn = offset >> 5; wn = offset >> 5;
if (wn > 15) if (wn > 15) {
return; // out of range return; // out of range
wn_offset = offset & 0x1f;
if (32 - wn_offset < bitlen)
{
// splitting required
wn_bitlen = 32 - wn_offset;
wn_data = data >> (bitlen - wn_bitlen);
} }
else
{ while(READ_PERI_REG(SPI_CMD(spi_no)) & SPI_USR);
wn_bitlen = bitlen;
wn_data = data; // transfer Wn to buf
spi_buf.word[1] = READ_PERI_REG(SPI_W0(spi_no) + wn*4);
if (wn < 15) {
spi_buf.word[0] = READ_PERI_REG(SPI_W0(spi_no) + (wn+1)*4);
} }
do shift = 64 - (offset & 0x1f) - bitlen;
{ spi_buf.dword &= ~((1ULL << bitlen)-1 << shift);
// write payload data to SPI_Wn spi_buf.dword |= (uint64)data << shift;
SET_PERI_REG_BITS(REG_SPI_BASE(spi_no) +0x40 + wn*4, BIT(wn_bitlen) - 1, wn_data, 32 - (wn_offset + wn_bitlen));
if (wn < 15) {
// prepare writing of dangling data part WRITE_PERI_REG(SPI_W0(spi_no) + (wn+1)*4, spi_buf.word[0]);
wn += 1; }
wn_offset = 0; WRITE_PERI_REG(SPI_W0(spi_no) + wn*4, spi_buf.word[1]);
if (wn <= 15)
bitlen -= wn_bitlen;
else
bitlen = 0; // force abort
wn_bitlen = bitlen;
wn_data = data;
} while (bitlen > 0);
return; return;
} }
...@@ -194,46 +253,30 @@ void spi_mast_set_mosi(uint8 spi_no, uint16 offset, uint8 bitlen, uint32 data) ...@@ -194,46 +253,30 @@ void spi_mast_set_mosi(uint8 spi_no, uint16 offset, uint8 bitlen, uint32 data)
*******************************************************************************/ *******************************************************************************/
uint32 spi_mast_get_miso(uint8 spi_no, uint16 offset, uint8 bitlen) uint32 spi_mast_get_miso(uint8 spi_no, uint16 offset, uint8 bitlen)
{ {
uint8 wn, wn_offset, wn_bitlen; uint8 wn;
uint32 wn_data = 0; spi_buf_t spi_buf;
uint32 result;
if (spi_no > 1) if (spi_no > 1)
return 0; // handle invalid input number return 0; // handle invalid input number
while(READ_PERI_REG(SPI_CMD(spi_no)) & SPI_USR);
// determine which SPI_Wn register is addressed // determine which SPI_Wn register is addressed
wn = offset >> 5; wn = offset >> 5;
if (wn > 15) if (wn > 15)
return 0; // out of range return 0; // out of range
wn_offset = offset & 0x1f;
if (bitlen > (32 - wn_offset)) while(READ_PERI_REG(SPI_CMD(spi_no)) & SPI_USR);
{
// splitting required // transfer Wn to buf
wn_bitlen = 32 - wn_offset; spi_buf.word[1] = READ_PERI_REG(SPI_W0(spi_no) + wn*4);
} if (wn < 15) {
else spi_buf.word[0] = READ_PERI_REG(SPI_W0(spi_no) + (wn+1)*4);
{
wn_bitlen = bitlen;
} }
do result = (uint32)(spi_buf.dword >> (64 - ((offset & 0x1f) + bitlen)));
{ result &= (1UL << bitlen)-1;
wn_data |= (READ_PERI_REG(REG_SPI_BASE(spi_no) +0x40 + wn*4) >> (32 - (wn_offset + wn_bitlen))) & (BIT(wn_bitlen) - 1);
return result;
// prepare reading of dangling data part
wn_data <<= bitlen - wn_bitlen;
wn += 1;
wn_offset = 0;
if (wn <= 15)
bitlen -= wn_bitlen;
else
bitlen = 0; // force abort
wn_bitlen = bitlen;
} while (bitlen > 0);
return wn_data;
} }
/****************************************************************************** /******************************************************************************
......
...@@ -36,6 +36,8 @@ extern UartDevice UartDev; ...@@ -36,6 +36,8 @@ extern UartDevice UartDev;
static os_timer_t autobaud_timer; static os_timer_t autobaud_timer;
static void (*alt_uart0_tx)(char txchar);
LOCAL void ICACHE_RAM_ATTR LOCAL void ICACHE_RAM_ATTR
uart0_rx_intr_handler(void *para); uart0_rx_intr_handler(void *para);
...@@ -125,6 +127,11 @@ uart0_alt(uint8 on) ...@@ -125,6 +127,11 @@ uart0_alt(uint8 on)
STATUS ICACHE_FLASH_ATTR STATUS ICACHE_FLASH_ATTR
uart_tx_one_char(uint8 uart, uint8 TxChar) uart_tx_one_char(uint8 uart, uint8 TxChar)
{ {
if (uart == 0 && alt_uart0_tx) {
(*alt_uart0_tx)(TxChar);
return OK;
}
while (true) while (true)
{ {
uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT<<UART_TXFIFO_CNT_S); uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT<<UART_TXFIFO_CNT_S);
...@@ -339,3 +346,7 @@ uart_setup(uint8 uart_no) ...@@ -339,3 +346,7 @@ uart_setup(uint8 uart_no)
uart_config(uart_no); uart_config(uart_no);
ETS_UART_INTR_ENABLE(); ETS_UART_INTR_ENABLE();
} }
void ICACHE_FLASH_ATTR uart_set_alt_output_uart0(void (*fn)(char)) {
alt_uart0_tx = fn;
}
ESPRESSIF MIT License
Copyright (c) 2015 <ESPRESSIF SYSTEMS (SHANGHAI) PTE LTD>
Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case, it is free of charge, to any person obtaining a copy of this software and associated documentation files (the “Software”), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED “AS IS”, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
乐鑫 MIT 许可证
版权 (c) 2015 <乐鑫信息科技(上海)有限公司>
该许可证授权仅限于乐鑫信息科技 ESP8266 产品的应用开发。在此情况下,该许可证免费授权任何获得该软件及其相关文档(统称为“软件”)的人无限制地经营该软件,包括无限制的使用、复制、修改、合并、出版发行、散布、再授权、及贩售软件及软件副本的权利。被授权人在享受这些权利的同时,需服从下面的条件:
在软件和软件的所有副本中都必须包含以上的版权声明和授权声明。
该软件按本来的样子提供,没有任何明确或暗含的担保,包括但不仅限于关于试销性、适合某一特定用途和非侵权的保证。作者和版权持有人在任何情况下均不就由软件或软件使用引起的以合同形式、民事侵权或其它方式提出的任何索赔、损害或其它责任负责。
#############################################################
# Required variables for each makefile
# Discard this section from all parent makefiles
# Expected variables (with automatic defaults):
# CSRCS (all "C" files in the dir)
# SUBDIRS (all subdirs with a Makefile)
# GEN_LIBS - list of libs to be generated ()
# GEN_IMAGES - list of images to be generated ()
# COMPONENTS_xxx - a list of libs/objs in the form
# subdir/lib to be extracted and rolled up into
# a generated lib/image xxx.a ()
#
ifndef PDIR
GEN_LIBS = libgdbstub.a
endif
#############################################################
# Configuration i.e. compile options etc.
# Target specific stuff (defines etc.) goes in here!
# Generally values applying to a tree are captured in the
# makefile at its root level - these are then overridden
# for a subtree within the makefile rooted therein
#
#DEFINES +=
#############################################################
# Recursion Magic - Don't touch this!!
#
# Each subtree potentially has an include directory
# corresponding to the common APIs applicable to modules
# rooted at that subtree. Accordingly, the INCLUDE PATH
# of a module can only contain the include directories up
# its parent path, and not its siblings
#
# Required for each makefile to inherit from the parent
#
INCLUDES += -I $(PDIR)include
INCLUDES += -I ./
INCLUDES += -I ../../include/ets
PDIR := ../$(PDIR)
sinclude $(PDIR)Makefile
#ifndef GDBSTUB_CFG_H
#define GDBSTUB_CFG_H
/*
Enable this define if you're using the RTOS SDK. It will use a custom exception handler instead of the HAL
and do some other magic to make everything work and compile under FreeRTOS.
*/
#ifndef GDBSTUB_FREERTOS
#define GDBSTUB_FREERTOS 0
#endif
/*
Enable this to make the exception and debugging handlers switch to a private stack. This will use
up 1K of RAM, but may be useful if you're debugging stack or stack pointer corruption problems. It's
normally disabled because not many situations need it. If for some reason the GDB communication
stops when you run into an error in your code, try enabling this.
*/
#ifndef GDBSTUB_USE_OWN_STACK
#define GDBSTUB_USE_OWN_STACK 0
#endif
/*
If this is defined, gdbstub will break the program when you press Ctrl-C in gdb. it does this by
hooking the UART interrupt. Unfortunately, this means receiving stuff over the serial port won't
work for your program anymore. This will fail if your program sets an UART interrupt handler after
the gdbstub_init call.
*/
#ifndef GDBSTUB_CTRLC_BREAK
#define GDBSTUB_CTRLC_BREAK 0
#endif
/*
Enabling this will redirect console output to GDB. This basically means that printf/os_printf output
will show up in your gdb session, which is useful if you use gdb to do stuff. It also means that if
you use a normal terminal, you can't read the printfs anymore.
*/
#ifndef GDBSTUB_REDIRECT_CONSOLE_OUTPUT
#define GDBSTUB_REDIRECT_CONSOLE_OUTPUT 0
#endif
/*
Enable this if you want the GDB stub to wait for you to attach GDB before running. It does this by
breaking in the init routine; use the gdb 'c' command (continue) to start the program.
*/
#ifndef GDBSTUB_BREAK_ON_INIT
#define GDBSTUB_BREAK_ON_INIT 0
#endif
/*
Function attributes for function types.
Gdbstub functions are placed in flash or IRAM using attributes, as defined here. The gdbinit function
(and related) can always be in flash, because it's called in the normal code flow. The rest of the
gdbstub functions can be in flash too, but only if there's no chance of them being called when the
flash somehow is disabled (eg during SPI operations or flash write/erase operations). If the routines
are called when the flash is disabled (eg due to a Ctrl-C at the wrong time), the ESP8266 will most
likely crash.
*/
#define ATTR_GDBINIT ICACHE_FLASH_ATTR
#ifndef ATTR_GDBFN
#define ATTR_GDBFN ICACHE_RAM_ATTR
#endif
#endif
/******************************************************************************
* Copyright 2015 Espressif Systems
*
* Description: Assembly routines for the gdbstub
*
* License: ESPRESSIF MIT License
*******************************************************************************/
#include "gdbstub-cfg.h"
#include <xtensa/config/specreg.h>
#include <xtensa/config/core-isa.h>
#include <xtensa/corebits.h>
#define DEBUG_PC (EPC + XCHAL_DEBUGLEVEL)
#define DEBUG_EXCSAVE (EXCSAVE + XCHAL_DEBUGLEVEL)
#define DEBUG_PS (EPS + XCHAL_DEBUGLEVEL)
.global gdbstub_savedRegs
#if GDBSTUB_USE_OWN_STACK
.global gdbstub_exceptionStack
#endif
.text
.literal_position
.text
.align 4
/*
The savedRegs struct:
uint32_t pc;
uint32_t ps;
uint32_t sar;
uint32_t vpri;
uint32_t a0;
uint32_t a[14]; //a2..a15
uint32_t litbase;
uint32_t sr176;
uint32_t sr208;
uint32_t a1;
uint32_t reason;
*/
/*
This is the debugging exception routine; it's called by the debugging vector
We arrive here with all regs intact except for a2. The old contents of A2 are saved
into the DEBUG_EXCSAVE special function register. EPC is the original PC.
*/
gdbstub_debug_exception_entry:
/*
//Minimum no-op debug exception handler, for debug
rsr a2,DEBUG_PC
addi a2,a2,3
wsr a2,DEBUG_PC
xsr a2, DEBUG_EXCSAVE
rfi XCHAL_DEBUGLEVEL
*/
//Save all regs to structure
movi a2, gdbstub_savedRegs
s32i a0, a2, 0x10
s32i a1, a2, 0x58
rsr a0, DEBUG_PS
s32i a0, a2, 0x04
rsr a0, DEBUG_EXCSAVE //was R2
s32i a0, a2, 0x14
s32i a3, a2, 0x18
s32i a4, a2, 0x1c
s32i a5, a2, 0x20
s32i a6, a2, 0x24
s32i a7, a2, 0x28
s32i a8, a2, 0x2c
s32i a9, a2, 0x30
s32i a10, a2, 0x34
s32i a11, a2, 0x38
s32i a12, a2, 0x3c
s32i a13, a2, 0x40
s32i a14, a2, 0x44
s32i a15, a2, 0x48
rsr a0, SAR
s32i a0, a2, 0x08
rsr a0, LITBASE
s32i a0, a2, 0x4C
rsr a0, 176
s32i a0, a2, 0x50
rsr a0, 208
s32i a0, a2, 0x54
rsr a0, DEBUGCAUSE
s32i a0, a2, 0x5C
rsr a4, DEBUG_PC
s32i a4, a2, 0x00
#if GDBSTUB_USE_OWN_STACK
//Move to our own stack
movi a1, exceptionStack+255*4
#endif
//If ICOUNT is -1, disable it by setting it to 0, otherwise we will keep triggering on the same instruction.
rsr a2, ICOUNT
movi a3, -1
bne a2, a3, noIcountReset
movi a3, 0
wsr a3, ICOUNT
noIcountReset:
rsr a2, ps
addi a2, a2, -PS_EXCM_MASK
wsr a2, ps
rsync
//Call into the C code to do the actual handling.
call0 gdbstub_handle_debug_exception
DebugExceptionExit:
rsr a2, ps
addi a2, a2, PS_EXCM_MASK
wsr a2, ps
rsync
//Restore registers from the gdbstub_savedRegs struct
movi a2, gdbstub_savedRegs
l32i a0, a2, 0x00
wsr a0, DEBUG_PC
// l32i a0, a2, 0x54
// wsr a0, 208
l32i a0, a2, 0x50
//wsr a0, 176 //Some versions of gcc do not understand this...
.byte 0x00, 176, 0x13 //so we hand-assemble the instruction.
l32i a0, a2, 0x4C
wsr a0, LITBASE
l32i a0, a2, 0x08
wsr a0, SAR
l32i a15, a2, 0x48
l32i a14, a2, 0x44
l32i a13, a2, 0x40
l32i a12, a2, 0x3c
l32i a11, a2, 0x38
l32i a10, a2, 0x34
l32i a9, a2, 0x30
l32i a8, a2, 0x2c
l32i a7, a2, 0x28
l32i a6, a2, 0x24
l32i a5, a2, 0x20
l32i a4, a2, 0x1c
l32i a3, a2, 0x18
l32i a0, a2, 0x14
wsr a0, DEBUG_EXCSAVE //was R2
l32i a0, a2, 0x04
wsr a0, DEBUG_PS
l32i a1, a2, 0x58
l32i a0, a2, 0x10
//Read back vector-saved a2 value, put back address of this routine.
movi a2, gdbstub_debug_exception_entry
xsr a2, DEBUG_EXCSAVE
//All done. Return to where we came from.
rfi XCHAL_DEBUGLEVEL
#if GDBSTUB_FREERTOS
/*
FreeRTOS exception handling code. For some reason or another, we can't just hook the main exception vector: it
seems FreeRTOS uses that for something else too (interrupts). FreeRTOS has its own fatal exception handler, and we
hook that. Unfortunately, that one is called from a few different places (eg directly in the DoubleExceptionVector)
so the precise location of the original register values are somewhat of a mystery when we arrive here...
As a 'solution', we'll just decode the most common case of the user_fatal_exception_handler being called from
the user exception handler vector:
- excsave1 - orig a0
- a1: stack frame:
sf+16: orig a1
sf+8: ps
sf+4: epc
sf+12: orig a0
sf: magic no?
*/
.global gdbstub_handle_user_exception
.global gdbstub_user_exception_entry
.align 4
gdbstub_user_exception_entry:
//Save all regs to structure
movi a0, gdbstub_savedRegs
s32i a1, a0, 0x14 //was a2
s32i a3, a0, 0x18
s32i a4, a0, 0x1c
s32i a5, a0, 0x20
s32i a6, a0, 0x24
s32i a7, a0, 0x28
s32i a8, a0, 0x2c
s32i a9, a0, 0x30
s32i a10, a0, 0x34
s32i a11, a0, 0x38
s32i a12, a0, 0x3c
s32i a13, a0, 0x40
s32i a14, a0, 0x44
s32i a15, a0, 0x48
rsr a2, SAR
s32i a2, a0, 0x08
rsr a2, LITBASE
s32i a2, a0, 0x4C
rsr a2, 176
s32i a2, a0, 0x50
rsr a2, 208
s32i a2, a0, 0x54
rsr a2, EXCCAUSE
s32i a2, a0, 0x5C
//Get the rest of the regs from the stack struct
l32i a3, a1, 12
s32i a3, a0, 0x10
l32i a3, a1, 16
s32i a3, a0, 0x58
l32i a3, a1, 8
s32i a3, a0, 0x04
l32i a3, a1, 4
s32i a3, a0, 0x00
#if GDBSTUB_USE_OWN_STACK
movi a1, exceptionStack+255*4
#endif
rsr a2, ps
addi a2, a2, -PS_EXCM_MASK
wsr a2, ps
rsync
call0 gdbstub_handle_user_exception
UserExceptionExit:
/*
Okay, from here on, it Does Not Work. There's not really any continuing from an exception in the
FreeRTOS case; there isn't any effort put in reversing the mess the exception code made yet. Maybe this
is still something we need to implement later, if there's any demand for it, or maybe we should modify
FreeRTOS to allow this in the future. (Which will then kill backwards compatibility... hmmm.)
*/
j UserExceptionExit
.global gdbstub_handle_uart_int
.global gdbstub_uart_entry
.align 4
gdbstub_uart_entry:
//On entry, the stack frame is at SP+16.
//This is a small stub to present that as the first arg to the gdbstub_handle_uart function.
movi a2, 16
add a2, a2, a1
movi a3, gdbstub_handle_uart_int
jx a3
#endif
.global gdbstub_save_extra_sfrs_for_exception
.align 4
//The Xtensa OS HAL does not save all the special function register things. This bit of assembly
//fills the gdbstub_savedRegs struct with them.
gdbstub_save_extra_sfrs_for_exception:
movi a2, gdbstub_savedRegs
rsr a3, LITBASE
s32i a3, a2, 0x4C
rsr a3, 176
s32i a3, a2, 0x50
rsr a3, 208
s32i a3, a2, 0x54
rsr a3, EXCCAUSE
s32i a3, a2, 0x5C
ret
.global gdbstub_init_debug_entry
.global _DebugExceptionVector
.align 4
gdbstub_init_debug_entry:
//This puts the following 2 instructions into the debug exception vector:
// xsr a2, DEBUG_EXCSAVE
// jx a2
movi a2, _DebugExceptionVector
movi a3, 0xa061d220
s32i a3, a2, 0
movi a3, 0x00000002
s32i a3, a2, 4
//Tell the just-installed debug vector where to go.
movi a2, gdbstub_debug_exception_entry
wsr a2, DEBUG_EXCSAVE
ret
//Set up ICOUNT register to step one single instruction
.global gdbstub_icount_ena_single_step
.align 4
gdbstub_icount_ena_single_step:
movi a3, XCHAL_DEBUGLEVEL //Only count steps in non-debug mode
movi a2, -2
wsr a3, ICOUNTLEVEL
wsr a2, ICOUNT
isync
ret
//These routines all assume only one breakpoint and watchpoint is available, which
//is the case for the ESP8266 Xtensa core.
.global gdbstub_set_hw_breakpoint
gdbstub_set_hw_breakpoint:
//a2 - addr, a3 - len (unused here)
rsr a4, IBREAKENABLE
bbsi a4, 0, return_w_error
wsr a2, IBREAKA
movi a2, 1
wsr a2, IBREAKENABLE
isync
movi a2, 1
ret
.global gdbstub_del_hw_breakpoint
gdbstub_del_hw_breakpoint:
//a2 - addr
rsr a5, IBREAKENABLE
bbci a5, 0, return_w_error
rsr a3, IBREAKA
bne a3, a2, return_w_error
movi a2,0
wsr a2, IBREAKENABLE
isync
movi a2, 1
ret
.global gdbstub_set_hw_watchpoint
//a2 - addr, a3 - mask, a4 - type (1=read, 2=write, 3=access)
gdbstub_set_hw_watchpoint:
//Check if any of the masked address bits are set. If so, that is an error.
movi a5,0x0000003F
xor a5, a5, a3
bany a2, a5, return_w_error
//Check if watchpoint already is set
rsr a5, DBREAKC
movi a6, 0xC0000000
bany a6, a5, return_w_error
//Set watchpoint
wsr a2, DBREAKA
//Combine type and mask
movi a6, 0x3F
and a3, a3, a6
slli a4, a4, 30
or a3, a3, a4
wsr a3, DBREAKC
// movi a2, 1
mov a2, a3
isync
ret
.global gdbstub_del_hw_watchpoint
//a2 - addr
gdbstub_del_hw_watchpoint:
//See if the address matches
rsr a3, DBREAKA
bne a3, a2, return_w_error
//See if the bp actually is set
rsr a3, DBREAKC
movi a2, 0xC0000000
bnone a3, a2, return_w_error
//Disable bp
movi a2,0
wsr a2,DBREAKC
movi a2,1
isync
ret
return_w_error:
movi a2, 0
ret
//Breakpoint, with an attempt at a functional function prologue and epilogue...
.global gdbstub_do_break_breakpoint_addr
.global gdbstub_do_break
.align 4
gdbstub_do_break:
addi a1, a1, -16
s32i a15, a1, 12
mov a15, a1
gdbstub_do_break_breakpoint_addr:
break 0,0
mov a1, a15
l32i a15, a1, 12
addi a1, a1, 16
ret
#ifndef GDBSTUB_ENTRY_H
#define GDBSTUB_ENTRY_H
#ifdef __cplusplus
extern "C" {
#endif
void gdbstub_init_debug_entry();
void gdbstub_do_break();
void gdbstub_icount_ena_single_step();
void gdbstub_save_extra_sfrs_for_exception();
void gdbstub_uart_entry();
int gdbstub_set_hw_breakpoint(int addr, int len);
int gdbstub_set_hw_watchpoint(int addr, int len, int type);
int gdbstub_del_hw_breakpoint(int addr);
int gdbstub_del_hw_watchpoint(int addr);
extern void* gdbstub_do_break_breakpoint_addr;
#ifdef __cplusplus
{
#endif
#endif
\ No newline at end of file
/******************************************************************************
* Copyright 2015 Espressif Systems
*
* Description: A stub to make the ESP8266 debuggable by GDB over the serial
* port.
*
* License: ESPRESSIF MIT License
*******************************************************************************/
#include "gdbstub.h"
#include "ets_sys.h"
#include "eagle_soc.h"
#include "c_types.h"
#include "gpio.h"
#include "xtensa/corebits.h"
#include "driver/uart.h"
#include "gdbstub.h"
#include "gdbstub-entry.h"
#include "gdbstub-cfg.h"
//From xtruntime-frames.h
struct XTensa_exception_frame_s {
uint32_t pc;
uint32_t ps;
uint32_t sar;
uint32_t vpri;
uint32_t a0;
uint32_t a[14]; //a2..a15
//These are added manually by the exception code; the HAL doesn't set these on an exception.
uint32_t litbase;
uint32_t sr176;
uint32_t sr208;
uint32_t a1;
//'reason' is abused for both the debug and the exception vector: if bit 7 is set,
//this contains an exception reason, otherwise it contains a debug vector bitmap.
uint32_t reason;
};
struct XTensa_rtos_int_frame_s {
uint32_t exitPtr;
uint32_t pc;
uint32_t ps;
uint32_t a[16];
uint32_t sar;
};
#if GDBSTUB_FREERTOS
/*
Definitions for FreeRTOS. This redefines some os_* functions to use their non-os* counterparts. It
also sets up some function pointers for ROM functions that aren't in the FreeRTOS ld files.
*/
#include <string.h>
#include <stdio.h>
void _xt_isr_attach(int inum, void *fn);
void _xt_isr_unmask(int inum);
void os_install_putc1(void (*p)(char c));
#define os_printf(...) printf(__VA_ARGS__)
#define os_memcpy(a,b,c) memcpy(a,b,c)
typedef void wdtfntype();
static wdtfntype *ets_wdt_disable=(wdtfntype *)0x400030f0;
static wdtfntype *ets_wdt_enable=(wdtfntype *)0x40002fa0;
#else
/*
OS-less SDK defines. Defines some headers for things that aren't in the include files, plus
the xthal stack frame struct.
*/
#include "osapi.h"
#include "user_interface.h"
//void _xtos_set_exception_handler(int cause, void (exhandler)(struct XTensa_exception_frame_s *frame));
int os_printf_plus(const char *format, ...) __attribute__ ((format (printf, 1, 2)));
extern void xthal_set_intenable(int);
#endif
#define EXCEPTION_GDB_SP_OFFSET 0x100
//We need some UART register defines.
#define ETS_UART_INUM 5
#define REG_UART_BASE( i ) (0x60000000+(i)*0xf00)
#define UART_STATUS( i ) (REG_UART_BASE( i ) + 0x1C)
#define UART_RXFIFO_CNT 0x000000FF
#define UART_RXFIFO_CNT_S 0
#define UART_TXFIFO_CNT 0x000000FF
#define UART_TXFIFO_CNT_S 16
#define UART_FIFO( i ) (REG_UART_BASE( i ) + 0x0)
//#define UART_INT_ENA(i) (REG_UART_BASE(i) + 0xC)
//#define UART_INT_CLR(i) (REG_UART_BASE(i) + 0x10)
#define UART_RXFIFO_TOUT_INT_ENA (BIT(8))
#define UART_RXFIFO_FULL_INT_ENA (BIT(0))
#define UART_RXFIFO_TOUT_INT_CLR (BIT(8))
#define UART_RXFIFO_FULL_INT_CLR (BIT(0))
//Length of buffer used to reserve GDB commands. Has to be at least able to fit the G command, which
//implies a minimum size of about 190 bytes.
#define PBUFLEN 256
//Length of gdb stdout buffer, for console redirection
#define OBUFLEN 32
//The asm stub saves the Xtensa registers here when a debugging exception happens.
struct XTensa_exception_frame_s gdbstub_savedRegs;
#if GDBSTUB_USE_OWN_STACK
//This is the debugging exception stack.
int exceptionStack[256];
#endif
static unsigned char cmd[PBUFLEN]; //GDB command input buffer
static char chsum; //Running checksum of the output packet
static unsigned char obuf[OBUFLEN]; //GDB stdout buffer
static int obufpos=0; //Current position in the buffer
static int32_t singleStepPs=-1; //Stores ps when single-stepping instruction. -1 when not in use.
//Small function to feed the hardware watchdog. Needed to stop the ESP from resetting
//due to a watchdog timeout while reading a command.
static void ATTR_GDBFN keepWDTalive() {
uint64_t *wdtval=(uint64_t*)0x3ff21048;
uint64_t *wdtovf=(uint64_t*)0x3ff210cc;
int *wdtctl=(int*)0x3ff210c8;
*wdtovf=*wdtval+1600000;
*wdtctl|=(1<<31);
}
//Receive a char from the uart. Uses polling and feeds the watchdog.
static int ATTR_GDBFN gdbRecvChar() {
int i;
while (((READ_PERI_REG(UART_STATUS(0))>>UART_RXFIFO_CNT_S)&UART_RXFIFO_CNT)==0) {
keepWDTalive();
}
i=READ_PERI_REG(UART_FIFO(0));
return i;
}
//Send a char to the uart.
static void ATTR_GDBFN gdbSendChar(char c) {
while (((READ_PERI_REG(UART_STATUS(0))>>UART_TXFIFO_CNT_S)&UART_TXFIFO_CNT)>=126) ;
WRITE_PERI_REG(UART_FIFO(0), c);
}
//Send the start of a packet; reset checksum calculation.
static void ATTR_GDBFN gdbPacketStart() {
chsum=0;
gdbSendChar('$');
}
//Send a char as part of a packet
static void ATTR_GDBFN gdbPacketChar(char c) {
if (c=='#' || c=='$' || c=='}' || c=='*') {
gdbSendChar('}');
gdbSendChar(c^0x20);
chsum+=(c^0x20)+'}';
} else {
gdbSendChar(c);
chsum+=c;
}
}
//Send a string as part of a packet
static void ATTR_GDBFN gdbPacketStr(char *c) {
while (*c!=0) {
gdbPacketChar(*c);
c++;
}
}
//Send a hex val as part of a packet. 'bits'/4 dictates the number of hex chars sent.
static void ATTR_GDBFN gdbPacketHex(int val, int bits) {
char hexChars[]="0123456789abcdef";
int i;
for (i=bits; i>0; i-=4) {
gdbPacketChar(hexChars[(val>>(i-4))&0xf]);
}
}
//Finish sending a packet.
static void ATTR_GDBFN gdbPacketEnd() {
gdbSendChar('#');
gdbPacketHex(chsum, 8);
}
//Error states used by the routines that grab stuff from the incoming gdb packet
#define ST_ENDPACKET -1
#define ST_ERR -2
#define ST_OK -3
#define ST_CONT -4
//Grab a hex value from the gdb packet. Ptr will get positioned on the end
//of the hex string, as far as the routine has read into it. Bits/4 indicates
//the max amount of hex chars it gobbles up. Bits can be -1 to eat up as much
//hex chars as possible.
static long ATTR_GDBFN gdbGetHexVal(unsigned char **ptr, int bits) {
int i;
int no;
unsigned int v=0;
char c;
no=bits/4;
if (bits==-1) no=64;
for (i=0; i<no; i++) {
c=**ptr;
(*ptr)++;
if (c>='0' && c<='9') {
v<<=4;
v|=(c-'0');
} else if (c>='A' && c<='F') {
v<<=4;
v|=(c-'A')+10;
} else if (c>='a' && c<='f') {
v<<=4;
v|=(c-'a')+10;
} else if (c=='#') {
if (bits==-1) {
(*ptr)--;
return v;
}
return ST_ENDPACKET;
} else {
if (bits==-1) {
(*ptr)--;
return v;
}
return ST_ERR;
}
}
return v;
}
//Swap an int into the form gdb wants it
static int ATTR_GDBFN iswap(int i) {
int r;
r=((i>>24)&0xff);
r|=((i>>16)&0xff)<<8;
r|=((i>>8)&0xff)<<16;
r|=((i>>0)&0xff)<<24;
return r;
}
//Read a byte from the ESP8266 memory.
static unsigned char ATTR_GDBFN readbyte(unsigned int p) {
int *i=(int*)(p&(~3));
if (p<0x20000000 || p>=0x60000000) return -1;
return *i>>((p&3)*8);
}
//Write a byte to the ESP8266 memory.
static void ATTR_GDBFN writeByte(unsigned int p, unsigned char d) {
int *i=(int*)(p&(~3));
if (p<0x20000000 || p>=0x60000000) return;
if ((p&3)==0) *i=(*i&0xffffff00)|(d<<0);
if ((p&3)==1) *i=(*i&0xffff00ff)|(d<<8);
if ((p&3)==2) *i=(*i&0xff00ffff)|(d<<16);
if ((p&3)==3) *i=(*i&0x00ffffff)|(d<<24);
}
//Returns 1 if it makes sense to write to addr p
static int ATTR_GDBFN validWrAddr(int p) {
if (p>=0x3ff00000 && p<0x40000000) return 1;
if (p>=0x40100000 && p<0x40140000) return 1;
if (p>=0x60000000 && p<0x60002000) return 1;
return 0;
}
/*
Register file in the format lx106 gdb port expects it.
Inspired by gdb/regformats/reg-xtensa.dat from
https://github.com/jcmvbkbc/crosstool-NG/blob/lx106-g%2B%2B/overlays/xtensa_lx106.tar
As decoded by Cesanta.
*/
struct regfile {
uint32_t a[16];
uint32_t pc;
uint32_t sar;
uint32_t litbase;
uint32_t sr176;
uint32_t sr208;
uint32_t ps;
};
//Send the reason execution is stopped to GDB.
static void ATTR_GDBFN sendReason() {
#if 0
char *reason=""; //default
#endif
//exception-to-signal mapping
char exceptionSignal[]={4,31,11,11,2,6,8,0,6,7,0,0,7,7,7,7};
int i=0;
gdbPacketStart();
gdbPacketChar('T');
if (gdbstub_savedRegs.reason==0xff) {
gdbPacketHex(2, 8); //sigint
} else if (gdbstub_savedRegs.reason&0x80) {
//We stopped because of an exception. Convert exception code to a signal number and send it.
i=gdbstub_savedRegs.reason&0x7f;
if (i<sizeof(exceptionSignal)) gdbPacketHex(exceptionSignal[i], 8); else gdbPacketHex(11, 8);
} else {
//We stopped because of a debugging exception.
gdbPacketHex(5, 8); //sigtrap
//Current Xtensa GDB versions don't seem to request this, so let's leave it off.
#if 0
if (gdbstub_savedRegs.reason&(1<<0)) reason="break";
if (gdbstub_savedRegs.reason&(1<<1)) reason="hwbreak";
if (gdbstub_savedRegs.reason&(1<<2)) reason="watch";
if (gdbstub_savedRegs.reason&(1<<3)) reason="swbreak";
if (gdbstub_savedRegs.reason&(1<<4)) reason="swbreak";
gdbPacketStr(reason);
gdbPacketChar(':');
//ToDo: watch: send address
#endif
}
gdbPacketEnd();
}
//Handle a command as received from GDB.
static int ATTR_GDBFN gdbHandleCommand(unsigned char *cmd, int len) {
//Handle a command
int i, j, k;
unsigned char *data=cmd+1;
if (cmd[0]=='g') { //send all registers to gdb
gdbPacketStart();
gdbPacketHex(iswap(gdbstub_savedRegs.a0), 32);
gdbPacketHex(iswap(gdbstub_savedRegs.a1), 32);
for (i=2; i<16; i++) gdbPacketHex(iswap(gdbstub_savedRegs.a[i-2]), 32);
gdbPacketHex(iswap(gdbstub_savedRegs.pc), 32);
gdbPacketHex(iswap(gdbstub_savedRegs.sar), 32);
gdbPacketHex(iswap(gdbstub_savedRegs.litbase), 32);
gdbPacketHex(iswap(gdbstub_savedRegs.sr176), 32);
gdbPacketHex(0, 32);
gdbPacketHex(iswap(gdbstub_savedRegs.ps), 32);
gdbPacketEnd();
} else if (cmd[0]=='G') { //receive content for all registers from gdb
gdbstub_savedRegs.a0=iswap(gdbGetHexVal(&data, 32));
gdbstub_savedRegs.a1=iswap(gdbGetHexVal(&data, 32));
for (i=2; i<16; i++) gdbstub_savedRegs.a[i-2]=iswap(gdbGetHexVal(&data, 32));
gdbstub_savedRegs.pc=iswap(gdbGetHexVal(&data, 32));
gdbstub_savedRegs.sar=iswap(gdbGetHexVal(&data, 32));
gdbstub_savedRegs.litbase=iswap(gdbGetHexVal(&data, 32));
gdbstub_savedRegs.sr176=iswap(gdbGetHexVal(&data, 32));
gdbGetHexVal(&data, 32);
gdbstub_savedRegs.ps=iswap(gdbGetHexVal(&data, 32));
gdbPacketStart();
gdbPacketStr("OK");
gdbPacketEnd();
} else if (cmd[0]=='m') { //read memory to gdb
i=gdbGetHexVal(&data, -1);
data++;
j=gdbGetHexVal(&data, -1);
gdbPacketStart();
for (k=0; k<j; k++) {
gdbPacketHex(readbyte(i++), 8);
}
gdbPacketEnd();
} else if (cmd[0]=='M') { //write memory from gdb
i=gdbGetHexVal(&data, -1); //addr
data++; //skip ,
j=gdbGetHexVal(&data, -1); //length
data++; //skip :
if (validWrAddr(i) && validWrAddr(i+j)) {
for (k=0; k<j; k++) {
writeByte(i, gdbGetHexVal(&data, 8));
i++;
}
//Make sure caches are up-to-date. Procedure according to Xtensa ISA document, ISYNC inst desc.
asm volatile("ISYNC\nISYNC\n");
gdbPacketStart();
gdbPacketStr("OK");
gdbPacketEnd();
} else {
//Trying to do a software breakpoint on a flash proc, perhaps?
gdbPacketStart();
gdbPacketStr("E01");
gdbPacketEnd();
}
} else if (cmd[0]=='?') { //Reply with stop reason
sendReason();
// } else if (strncmp(cmd, "vCont?", 6)==0) {
// gdbPacketStart();
// gdbPacketStr("vCont;c;s");
// gdbPacketEnd();
} else if (strncmp((char*)cmd, "vCont;c", 7)==0 || cmd[0]=='c') { //continue execution
return ST_CONT;
} else if (strncmp((char*)cmd, "vCont;s", 7)==0 || cmd[0]=='s') { //single-step instruction
//Single-stepping can go wrong if an interrupt is pending, especially when it is e.g. a task switch:
//the ICOUNT register will overflow in the task switch code. That is why we disable interupts when
//doing single-instruction stepping.
singleStepPs=gdbstub_savedRegs.ps;
gdbstub_savedRegs.ps=(gdbstub_savedRegs.ps & ~0xf)|(XCHAL_DEBUGLEVEL-1);
gdbstub_icount_ena_single_step();
return ST_CONT;
} else if (cmd[0]=='q') { //Extended query
if (strncmp((char*)&cmd[1], "Supported", 9)==0) { //Capabilities query
gdbPacketStart();
gdbPacketStr("swbreak+;hwbreak+;PacketSize=255");
gdbPacketEnd();
} else {
//We don't support other queries.
gdbPacketStart();
gdbPacketEnd();
return ST_ERR;
}
} else if (cmd[0]=='Z') { //Set hardware break/watchpoint.
data+=2; //skip 'x,'
i=gdbGetHexVal(&data, -1);
data++; //skip ','
j=gdbGetHexVal(&data, -1);
gdbPacketStart();
if (cmd[1]=='1') { //Set breakpoint
if (gdbstub_set_hw_breakpoint(i, j)) {
gdbPacketStr("OK");
} else {
gdbPacketStr("E01");
}
} else if (cmd[1]=='2' || cmd[1]=='3' || cmd[1]=='4') { //Set watchpoint
int access=0;
int mask=0;
if (cmd[1]=='2') access=2; //write
if (cmd[1]=='3') access=1; //read
if (cmd[1]=='4') access=3; //access
if (j==1) mask=0x3F;
if (j==2) mask=0x3E;
if (j==4) mask=0x3C;
if (j==8) mask=0x38;
if (j==16) mask=0x30;
if (j==32) mask=0x20;
if (j==64) mask=0x00;
if (mask!=0 && gdbstub_set_hw_watchpoint(i,mask, access)) {
gdbPacketStr("OK");
} else {
gdbPacketStr("E01");
}
}
gdbPacketEnd();
} else if (cmd[0]=='z') { //Clear hardware break/watchpoint
data+=2; //skip 'x,'
i=gdbGetHexVal(&data, -1);
data++; //skip ','
j=gdbGetHexVal(&data, -1);
gdbPacketStart();
if (cmd[1]=='1') { //hardware breakpoint
if (gdbstub_del_hw_breakpoint(i)) {
gdbPacketStr("OK");
} else {
gdbPacketStr("E01");
}
} else if (cmd[1]=='2' || cmd[1]=='3' || cmd[1]=='4') { //hardware watchpoint
if (gdbstub_del_hw_watchpoint(i)) {
gdbPacketStr("OK");
} else {
gdbPacketStr("E01");
}
}
gdbPacketEnd();
} else {
//We don't recognize or support whatever GDB just sent us.
gdbPacketStart();
gdbPacketEnd();
return ST_ERR;
}
return ST_OK;
}
//Lower layer: grab a command packet and check the checksum
//Calls gdbHandleCommand on the packet if the checksum is OK
//Returns ST_OK on success, ST_ERR when checksum fails, a
//character if it is received instead of the GDB packet
//start char.
static int ATTR_GDBFN gdbReadCommand() {
unsigned char c;
unsigned char chsum=0, rchsum;
unsigned char sentchs[2];
int p=0;
unsigned char *ptr;
c=gdbRecvChar();
if (c!='$') return c;
while(1) {
c=gdbRecvChar();
if (c=='#') { //end of packet, checksum follows
cmd[p]=0;
break;
}
chsum+=c;
if (c=='$') {
//Wut, restart packet?
chsum=0;
p=0;
continue;
}
if (c=='}') { //escape the next char
c=gdbRecvChar();
chsum+=c;
c^=0x20;
}
cmd[p++]=c;
if (p>=PBUFLEN) return ST_ERR;
}
//A # has been received. Get and check the received chsum.
sentchs[0]=gdbRecvChar();
sentchs[1]=gdbRecvChar();
ptr=&sentchs[0];
rchsum=gdbGetHexVal(&ptr, 8);
// os_printf("c %x r %x\n", chsum, rchsum);
if (rchsum!=chsum) {
gdbSendChar('-');
return ST_ERR;
} else {
gdbSendChar('+');
return gdbHandleCommand(cmd, p);
}
}
//Get the value of one of the A registers
static unsigned int ATTR_GDBFN getaregval(int reg) {
if (reg==0) return gdbstub_savedRegs.a0;
if (reg==1) return gdbstub_savedRegs.a1;
return gdbstub_savedRegs.a[reg-2];
}
//Set the value of one of the A registers
static void ATTR_GDBFN setaregval(int reg, unsigned int val) {
os_printf("%x -> %x\n", val, reg);
if (reg==0) gdbstub_savedRegs.a0=val;
if (reg==1) gdbstub_savedRegs.a1=val;
gdbstub_savedRegs.a[reg-2]=val;
}
//Emulate the l32i/s32i instruction we're stopped at.
static void ATTR_GDBFN emulLdSt() {
unsigned char i0=readbyte(gdbstub_savedRegs.pc);
unsigned char i1=readbyte(gdbstub_savedRegs.pc+1);
unsigned char i2=readbyte(gdbstub_savedRegs.pc+2);
int *p;
if ((i0&0xf)==2 && (i1&0xf0)==0x20) {
//l32i
p=(int*)getaregval(i1&0xf)+(i2*4);
setaregval(i0>>4, *p);
gdbstub_savedRegs.pc+=3;
} else if ((i0&0xf)==0x8) {
//l32i.n
p=(int*)getaregval(i1&0xf)+((i1>>4)*4);
setaregval(i0>>4, *p);
gdbstub_savedRegs.pc+=2;
} else if ((i0&0xf)==2 && (i1&0xf0)==0x60) {
//s32i
p=(int*)getaregval(i1&0xf)+(i2*4);
*p=getaregval(i0>>4);
gdbstub_savedRegs.pc+=3;
} else if ((i0&0xf)==0x9) {
//s32i.n
p=(int*)getaregval(i1&0xf)+((i1>>4)*4);
*p=getaregval(i0>>4);
gdbstub_savedRegs.pc+=2;
} else {
os_printf("GDBSTUB: No l32i/s32i instruction: %x %x %x. Huh?", i2, i1, i0);
}
}
//We just caught a debug exception and need to handle it. This is called from an assembly
//routine in gdbstub-entry.S
void ATTR_GDBFN gdbstub_handle_debug_exception() {
ets_wdt_disable();
if (singleStepPs!=-1) {
//We come here after single-stepping an instruction. Interrupts are disabled
//for the single step. Re-enable them here.
gdbstub_savedRegs.ps=(gdbstub_savedRegs.ps&~0xf)|(singleStepPs&0xf);
singleStepPs=-1;
}
sendReason();
xthal_set_intenable(0);
while(gdbReadCommand()!=ST_CONT);
if ((gdbstub_savedRegs.reason&0x84)==0x4) {
//We stopped due to a watchpoint. We can't re-execute the current instruction
//because it will happily re-trigger the same watchpoint, so we emulate it
//while we're still in debugger space.
emulLdSt();
} else if ((gdbstub_savedRegs.reason&0x88)==0x8) {
//We stopped due to a BREAK instruction. Skip over it.
//Check the instruction first; gdb may have replaced it with the original instruction
//if it's one of the breakpoints it set.
if (readbyte(gdbstub_savedRegs.pc+2)==0 &&
(readbyte(gdbstub_savedRegs.pc+1)&0xf0)==0x40 &&
(readbyte(gdbstub_savedRegs.pc)&0x0f)==0x00) {
gdbstub_savedRegs.pc+=3;
}
} else if ((gdbstub_savedRegs.reason&0x90)==0x10) {
//We stopped due to a BREAK.N instruction. Skip over it, after making sure the instruction
//actually is a BREAK.N
if ((readbyte(gdbstub_savedRegs.pc+1)&0xf0)==0xf0 &&
readbyte(gdbstub_savedRegs.pc)==0x2d) {
gdbstub_savedRegs.pc+=3;
}
}
ets_wdt_enable();
}
#if GDBSTUB_FREERTOS
//Freetos exception. This routine is called by an assembly routine in gdbstub-entry.S
void ATTR_GDBFN gdbstub_handle_user_exception() {
ets_wdt_disable();
gdbstub_savedRegs.reason|=0x80; //mark as an exception reason
sendReason();
while(gdbReadCommand()!=ST_CONT);
ets_wdt_enable();
}
#else
//Non-OS exception handler. Gets called by the Xtensa HAL.
static void ATTR_GDBFN gdb_exception_handler(struct XTensa_exception_frame_s *frame) {
//Save the extra registers the Xtensa HAL doesn't save
gdbstub_save_extra_sfrs_for_exception();
//Copy registers the Xtensa HAL did save to gdbstub_savedRegs
os_memcpy(&gdbstub_savedRegs, frame, 19*4);
//Credits go to Cesanta for this trick. A1 seems to be destroyed, but because it
//has a fixed offset from the address of the passed frame, we can recover it.
gdbstub_savedRegs.a1=(uint32_t)frame+EXCEPTION_GDB_SP_OFFSET;
gdbstub_savedRegs.reason|=0x80; //mark as an exception reason
ets_wdt_disable();
sendReason();
xthal_set_intenable(0);
while(gdbReadCommand()!=ST_CONT);
ets_wdt_enable();
//Copy any changed registers back to the frame the Xtensa HAL uses.
os_memcpy(frame, &gdbstub_savedRegs, 19*4);
}
#endif
static void ATTR_GDBFN gdb_flush_output_buffer() {
if (obufpos > 0) {
int i;
gdbPacketStart();
gdbPacketChar('O');
for (i=0; i<obufpos; i++) gdbPacketHex(obuf[i], 8);
gdbPacketEnd();
obufpos=0;
}
}
//Replacement putchar1 routine. Instead of spitting out the character directly, it will buffer up to
//OBUFLEN characters (or up to a \n, whichever comes earlier) and send it out as a gdb stdout packet.
static void ATTR_GDBFN gdb_semihost_putchar1(char c) {
obuf[obufpos++]=c;
if (c=='\n' || obufpos==OBUFLEN) {
gdb_flush_output_buffer();
}
}
#if !GDBSTUB_FREERTOS
//The OS-less SDK uses the Xtensa HAL to handle exceptions. We can use those functions to catch any
//fatal exceptions and invoke the debugger when this happens.
static void ATTR_GDBINIT install_exceptions() {
int i;
int exno[]={EXCCAUSE_ILLEGAL, EXCCAUSE_SYSCALL, EXCCAUSE_INSTR_ERROR, EXCCAUSE_LOAD_STORE_ERROR,
EXCCAUSE_DIVIDE_BY_ZERO, EXCCAUSE_UNALIGNED, EXCCAUSE_INSTR_DATA_ERROR, EXCCAUSE_LOAD_STORE_DATA_ERROR,
EXCCAUSE_INSTR_ADDR_ERROR, EXCCAUSE_LOAD_STORE_ADDR_ERROR, EXCCAUSE_INSTR_PROHIBITED,
EXCCAUSE_LOAD_PROHIBITED, EXCCAUSE_STORE_PROHIBITED};
for (i=0; i<(sizeof(exno)/sizeof(exno[0])); i++) {
_xtos_set_exception_handler(exno[i], (exception_handler_fn) gdb_exception_handler);
}
}
#else
//FreeRTOS doesn't use the Xtensa HAL for exceptions, but uses its own fatal exception handler.
//We use a small hack to replace that with a jump to our own handler, which then has the task of
//decyphering and re-instating the registers the FreeRTOS code left.
extern void user_fatal_exception_handler();
extern void gdbstub_user_exception_entry();
static void ATTR_GDBINIT install_exceptions() {
//Replace the user_fatal_exception_handler by a jump to our own code
int *ufe=(int*)user_fatal_exception_handler;
//This mess encodes as a relative jump instruction to user_fatal_exception_handler
*ufe=((((int)gdbstub_user_exception_entry-(int)user_fatal_exception_handler)-4)<<6)|6;
}
#endif
#if GDBSTUB_CTRLC_BREAK
#if !GDBSTUB_FREERTOS
static void ATTR_GDBFN uart_hdlr(void *arg, void *frame) {
int doDebug=0, fifolen=0;
//Save the extra registers the Xtensa HAL doesn't save
gdbstub_save_extra_sfrs_for_exception();
fifolen=(READ_PERI_REG(UART_STATUS(0))>>UART_RXFIFO_CNT_S)&UART_RXFIFO_CNT;
while (fifolen!=0) {
if ((READ_PERI_REG(UART_FIFO(0)) & 0xFF)==0x3) doDebug=1; //Check if any of the chars is control-C. Throw away rest.
fifolen--;
}
WRITE_PERI_REG(UART_INT_CLR(0), UART_RXFIFO_FULL_INT_CLR|UART_RXFIFO_TOUT_INT_CLR);
if (doDebug) {
//Copy registers the Xtensa HAL did save to gdbstub_savedRegs
os_memcpy(&gdbstub_savedRegs, frame, 19*4);
gdbstub_savedRegs.a1=(uint32_t)frame+EXCEPTION_GDB_SP_OFFSET;
gdbstub_savedRegs.reason=0xff; //mark as user break reason
ets_wdt_disable();
sendReason();
xthal_set_intenable(0);
while(gdbReadCommand()!=ST_CONT);
ets_wdt_enable();
//Copy any changed registers back to the frame the Xtensa HAL uses.
os_memcpy(frame, &gdbstub_savedRegs, 19*4);
}
}
static void ATTR_GDBINIT install_uart_hdlr() {
ets_isr_attach(ETS_UART_INUM, uart_hdlr, NULL);
SET_PERI_REG_MASK(UART_INT_ENA(0), UART_RXFIFO_FULL_INT_ENA|UART_RXFIFO_TOUT_INT_ENA);
ets_isr_unmask((1<<ETS_UART_INUM)); //enable uart interrupt
}
#else
void ATTR_GDBFN gdbstub_handle_uart_int(struct XTensa_rtos_int_frame_s *frame) {
int doDebug=0, fifolen=0, x;
fifolen=(READ_PERI_REG(UART_STATUS(0))>>UART_RXFIFO_CNT_S)&UART_RXFIFO_CNT;
while (fifolen!=0) {
if ((READ_PERI_REG(UART_FIFO(0)) & 0xFF)==0x3) doDebug=1; //Check if any of the chars is control-C. Throw away rest.
fifolen--;
}
WRITE_PERI_REG(UART_INT_CLR(0), UART_RXFIFO_FULL_INT_CLR|UART_RXFIFO_TOUT_INT_CLR);
if (doDebug) {
//Copy registers the Xtensa HAL did save to gdbstub_savedRegs
gdbstub_savedRegs.pc=frame->pc;
gdbstub_savedRegs.ps=frame->ps;
gdbstub_savedRegs.sar=frame->sar;
gdbstub_savedRegs.a0=frame->a[0];
gdbstub_savedRegs.a1=frame->a[1];
for (x=2; x<16; x++) gdbstub_savedRegs.a[x-2]=frame->a[x];
// gdbstub_savedRegs.a1=(uint32_t)frame+EXCEPTION_GDB_SP_OFFSET;
gdbstub_savedRegs.reason=0xff; //mark as user break reason
// ets_wdt_disable();
sendReason();
while(gdbReadCommand()!=ST_CONT);
// ets_wdt_enable();
//Copy any changed registers back to the frame the Xtensa HAL uses.
frame->pc=gdbstub_savedRegs.pc;
frame->ps=gdbstub_savedRegs.ps;
frame->sar=gdbstub_savedRegs.sar;
frame->a[0]=gdbstub_savedRegs.a0;
frame->a[1]=gdbstub_savedRegs.a1;
for (x=2; x<16; x++) frame->a[x]=gdbstub_savedRegs.a[x-2];
}
}
static void ATTR_GDBINIT install_uart_hdlr() {
_xt_isr_attach(ETS_UART_INUM, gdbstub_uart_entry);
SET_PERI_REG_MASK(UART_INT_ENA(0), UART_RXFIFO_FULL_INT_ENA|UART_RXFIFO_TOUT_INT_ENA);
_xt_isr_unmask((1<<ETS_UART_INUM)); //enable uart interrupt
}
#endif
#endif
void ATTR_GDBINIT gdbstub_redirect_output(int enable) {
if (enable) {
os_install_putc1(gdb_semihost_putchar1);
uart_set_alt_output_uart0(gdb_semihost_putchar1);
} else {
gdb_flush_output_buffer();
os_install_putc1(uart0_putc);
}
}
//gdbstub initialization routine.
void ATTR_GDBINIT gdbstub_init() {
#if GDBSTUB_REDIRECT_CONSOLE_OUTPUT
os_install_putc1(gdb_semihost_putchar1);
#endif
#if GDBSTUB_CTRLC_BREAK
install_uart_hdlr();
#endif
install_exceptions();
gdbstub_init_debug_entry();
#if GDBSTUB_BREAK_ON_INIT
gdbstub_do_break();
#endif
}
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