Skip to content
GitLab
Menu
Projects
Groups
Snippets
Loading...
Help
Help
Support
Community forum
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
Menu
Open sidebar
ruanhaishen
Nodemcu Firmware
Commits
b62fae91
Commit
b62fae91
authored
Aug 10, 2017
by
Terry Ellison
Committed by
GitHub
Aug 10, 2017
Browse files
Merge pull request #2055 from nodemcu/dev
2.1.0-follow-up master drop
parents
c8ac5cfb
fee5608c
Changes
52
Hide whitespace changes
Inline
Side-by-side
Makefile
View file @
b62fae91
...
...
@@ -188,7 +188,8 @@ endef
$(BINODIR)/%.bin
:
$(IMAGEODIR)/%.out
@
mkdir
-p
$(BINODIR)
$(ESPTOOL)
elf2image
$<
-o
$(FIRMWAREDIR)
@
$(NM)
$<
|
grep
-w
U
&&
{
echo
"Firmware has undefined (but unused) symbols!"
;
exit
1
;
}
||
true
$(ESPTOOL)
elf2image
--flash_mode
dio
--flash_freq
40m
$<
-o
$(FIRMWAREDIR)
#############################################################
# Rules base
...
...
app/Makefile
View file @
b62fae91
...
...
@@ -48,7 +48,8 @@ SUBDIRS= \
websocket
\
swTimer
\
misc
\
pm
\
pm
\
sjson
\
endif
# } PDIR
...
...
@@ -94,14 +95,15 @@ COMPONENTS_eagle.app.v6 = \
dhtlib/libdhtlib.a
\
tsl2561/tsl2561lib.a
\
http/libhttp.a
\
pm/libpm.a
\
pm/libpm.a
\
websocket/libwebsocket.a
\
esp-gdbstub/libgdbstub.a
\
net/libnodemcu_net.a
\
mbedtls/libmbedtls.a
\
mbedtls/libmbedtls.a
\
modules/libmodules.a
\
swTimer/libswtimer.a
\
misc/libmisc.a
\
misc/libmisc.a
\
sjson/libsjson.a
\
# Inspect the modules library and work out which modules need to be linked.
...
...
app/crypto/sha2.c
View file @
b62fae91
...
...
@@ -32,6 +32,8 @@
*
*/
/* ESP8266-specific tweaks by Johny Mattsson <jmattsson@dius.com.au> */
#include "user_config.h"
#ifdef SHA2_ENABLE
...
...
@@ -491,7 +493,14 @@ void ICACHE_FLASH_ATTR SHA256_Update(SHA256_CTX* context, const sha2_byte *data,
}
while
(
len
>=
SHA256_BLOCK_LENGTH
)
{
/* Process as many complete blocks as we can */
SHA256_Transform
(
context
,
(
sha2_word32
*
)
data
);
if
((
int
)
data
&
(
sizeof
(
sha2_word32
)
-
1
))
{
// have to bounce via buffer, otherwise we'll hit unaligned load exception
MEMCPY_BCOPY
(
context
->
buffer
,
data
,
SHA256_BLOCK_LENGTH
);
SHA256_Transform
(
context
,
(
sha2_word32
*
)
context
->
buffer
);
}
else
SHA256_Transform
(
context
,
(
sha2_word32
*
)
data
);
context
->
bitcount
+=
SHA256_BLOCK_LENGTH
<<
3
;
len
-=
SHA256_BLOCK_LENGTH
;
data
+=
SHA256_BLOCK_LENGTH
;
...
...
@@ -782,7 +791,14 @@ void ICACHE_FLASH_ATTR SHA512_Update(SHA512_CTX* context, const sha2_byte *data,
}
while
(
len
>=
SHA512_BLOCK_LENGTH
)
{
/* Process as many complete blocks as we can */
SHA512_Transform
(
context
,
(
sha2_word64
*
)
data
);
if
((
int
)
data
&
(
sizeof
(
sha2_word64
)
-
1
))
{
// have to bounce via buffer, otherwise we'll hit unaligned load exception
MEMCPY_BCOPY
(
context
->
buffer
,
data
,
SHA512_BLOCK_LENGTH
);
SHA512_Transform
(
context
,
(
sha2_word64
*
)
context
->
buffer
);
}
else
SHA512_Transform
(
context
,
(
sha2_word64
*
)
data
);
ADDINC128
(
context
->
bitcount
,
SHA512_BLOCK_LENGTH
<<
3
);
len
-=
SHA512_BLOCK_LENGTH
;
data
+=
SHA512_BLOCK_LENGTH
;
...
...
app/http/httpclient.c
View file @
b62fae91
...
...
@@ -451,20 +451,33 @@ static void ICACHE_FLASH_ATTR http_timeout_callback( void *arg )
struct
espconn
*
conn
=
(
struct
espconn
*
)
arg
;
if
(
conn
==
NULL
)
{
HTTPCLIENT_DEBUG
(
"Connection is NULL"
);
return
;
}
if
(
conn
->
reverse
==
NULL
)
{
HTTPCLIENT_DEBUG
(
"Connection request data (reverse) is NULL"
);
return
;
}
request_args_t
*
req
=
(
request_args_t
*
)
conn
->
reverse
;
HTTPCLIENT_DEBUG
(
"Calling disconnect"
);
/* Call disconnect */
sint8
result
;
#ifdef CLIENT_SSL_ENABLE
if
(
req
->
secure
)
espconn_secure_disconnect
(
conn
);
result
=
espconn_secure_disconnect
(
conn
);
else
#endif
espconn_disconnect
(
conn
);
result
=
espconn_disconnect
(
conn
);
if
(
result
==
ESPCONN_OK
||
result
==
ESPCONN_INPROGRESS
)
return
;
else
{
/* not connected; execute the callback ourselves. */
HTTPCLIENT_DEBUG
(
"manually Calling disconnect callback due to error %d"
,
result
);
http_disconnect_callback
(
arg
);
}
}
...
...
app/include/lwip/app/dhcpserver.h
View file @
b62fae91
...
...
@@ -21,9 +21,7 @@ typedef struct dhcps_msg {
uint8_t
chaddr
[
16
];
uint8_t
sname
[
64
];
uint8_t
file
[
128
];
// Recommendation from Espressif:
// To avoid crash in DHCP big packages modify option length from 312 to MTU - IPHEAD(20) - UDPHEAD(8) - DHCPHEAD(236).
uint8_t
options
[
IP_FRAG_MAX_MTU
-
20
-
8
-
236
];
uint8_t
options
[
312
];
}
dhcps_msg
;
#ifndef LWIP_OPEN_SRC
...
...
app/include/rtc/rtctime.h
View file @
b62fae91
...
...
@@ -62,6 +62,7 @@ struct rtc_tm{
void
TEXT_SECTION_ATTR
rtctime_early_startup
(
void
);
void
rtctime_late_startup
(
void
);
void
rtctime_adjust_rate
(
int
rate
);
void
rtctime_gettimeofday
(
struct
rtc_timeval
*
tv
);
void
rtctime_settimeofday
(
const
struct
rtc_timeval
*
tv
);
bool
rtctime_have_time
(
void
);
...
...
app/include/rtc/rtctime_internal.h
View file @
b62fae91
...
...
@@ -32,6 +32,11 @@
* @author Johny Mattsson <jmattsson@dius.com.au>
*/
/*
* It is vital that this file is only included once in the entire
* system.
*/
#ifndef _RTCTIME_INTERNAL_H_
#define _RTCTIME_INTERNAL_H_
...
...
@@ -181,6 +186,17 @@
#define CPU_DEFAULT_MHZ 80
#define CPU_BOOTUP_MHZ 52
#ifdef RTC_DEBUG_ENABLED
#define RTC_DBG(...) do { if (rtc_dbg_enabled == 'R') { dbg_printf(__VA_ARGS__); } } while (0)
static
bool
rtc_dbg_enabled
;
#define RTC_DBG_ENABLED() rtc_dbg_enabled = 'R'
#define RTC_DBG_NOT_ENABLED() rtc_dbg_enabled = 0
#else
#define RTC_DBG(...)
#define RTC_DBG_ENABLED()
#define RTC_DBG_NOT_ENABLED()
#endif
// RTCTIME storage
#define RTC_TIME_MAGIC_POS (RTC_TIME_BASE+0)
#define RTC_CYCLEOFFSETL_POS (RTC_TIME_BASE+1)
...
...
@@ -190,8 +206,22 @@
#define RTC_CALIBRATION_POS (RTC_TIME_BASE+5)
#define RTC_SLEEPTOTALUS_POS (RTC_TIME_BASE+6)
#define RTC_SLEEPTOTALCYCLES_POS (RTC_TIME_BASE+7)
#define RTC_TODOFFSETUS_POS (RTC_TIME_BASE+8)
#define RTC_LASTTODUS_POS (RTC_TIME_BASE+9)
//#define RTC_TODOFFSETUS_POS (RTC_TIME_BASE+8)
//#define RTC_LASTTODUS_POS (RTC_TIME_BASE+9)
#define RTC_USRATE_POS (RTC_TIME_BASE+8)
static
uint32_t
rtc_time_magic
;
static
uint64_t
rtc_cycleoffset
;
static
uint32_t
rtc_lastsourceval
;
static
uint32_t
rtc_sourcecycleunits
;
static
uint32_t
rtc_calibration
;
static
uint32_t
rtc_sleeptotalus
;
static
uint32_t
rtc_sleeptotalcycles
;
static
uint64_t
rtc_usatlastrate
;
static
uint64_t
rtc_rateadjustedus
;
static
uint32_t
rtc_todoffsetus
;
static
uint32_t
rtc_lasttodus
;
static
uint32_t
rtc_usrate
;
struct
rtc_timeval
...
...
@@ -200,13 +230,79 @@ struct rtc_timeval
uint32_t
tv_usec
;
};
static
inline
uint64_t
rtc_time_get_now_us_adjusted
();
static
void
bbram_load
()
{
rtc_time_magic
=
rtc_mem_read
(
RTC_TIME_MAGIC_POS
);
rtc_cycleoffset
=
rtc_mem_read64
(
RTC_CYCLEOFFSETL_POS
);
rtc_lastsourceval
=
rtc_mem_read
(
RTC_LASTSOURCEVAL_POS
);
rtc_sourcecycleunits
=
rtc_mem_read
(
RTC_SOURCECYCLEUNITS_POS
);
rtc_calibration
=
rtc_mem_read
(
RTC_CALIBRATION_POS
);
rtc_sleeptotalus
=
rtc_mem_read
(
RTC_SLEEPTOTALUS_POS
);
rtc_sleeptotalcycles
=
rtc_mem_read
(
RTC_SLEEPTOTALCYCLES_POS
);
rtc_usrate
=
rtc_mem_read
(
RTC_USRATE_POS
);
}
static
inline
uint32_t
rtc_time_get_magic
(
void
)
{
return
rtc_mem_read
(
RTC_TIME_MAGIC_POS
);
static
void
bbram_save
()
{
RTC_DBG
(
"bbram_save
\n
"
);
rtc_mem_write
(
RTC_TIME_MAGIC_POS
,
rtc_time_magic
);
rtc_mem_write64
(
RTC_CYCLEOFFSETL_POS
,
rtc_cycleoffset
);
rtc_mem_write
(
RTC_LASTSOURCEVAL_POS
,
rtc_lastsourceval
);
rtc_mem_write
(
RTC_SOURCECYCLEUNITS_POS
,
rtc_sourcecycleunits
);
rtc_mem_write
(
RTC_CALIBRATION_POS
,
rtc_calibration
);
rtc_mem_write
(
RTC_SLEEPTOTALUS_POS
,
rtc_sleeptotalus
);
rtc_mem_write
(
RTC_SLEEPTOTALCYCLES_POS
,
rtc_sleeptotalcycles
);
rtc_mem_write
(
RTC_USRATE_POS
,
rtc_usrate
);
}
static
inline
uint64_t
div2080
(
uint64_t
n
)
{
n
=
n
>>
5
;
uint64_t
t
=
n
>>
7
;
uint64_t
q
=
t
+
(
t
>>
1
)
+
(
t
>>
2
);
q
+=
q
>>
3
;
q
+=
q
>>
12
;
q
+=
q
>>
24
;
q
+=
q
>>
48
;
uint32_t
r
=
(
uint32_t
)
n
-
(
uint32_t
)
q
*
65
;
uint32_t
off
=
(
r
-
(
r
>>
6
))
>>
6
;
q
=
q
+
off
;
return
q
;
}
static
uint32_t
div1m
(
uint32_t
*
rem
,
unsigned
long
long
n
)
{
// 0 -> 0002000000000000 sub
// 0 >> 5 - 0 >> 19 + [-1] -> 00020fffc0000000 add
// 0 >> 9 - 0 >> 6 + [-1] -> 000208ffc0000000 add
// 2 >> 12 - 2 >> 23 -> 000000208bea0080 sub
uint64_t
q1
=
(
n
>>
5
)
-
(
n
>>
19
)
+
n
;
uint64_t
q2
=
q1
+
(
n
>>
9
)
-
(
n
>>
6
);
uint64_t
q3
=
(
q2
>>
12
)
-
(
q2
>>
23
);
uint64_t
q
=
q1
-
n
+
q2
-
q3
;
q
=
q
>>
20
;
uint32_t
r
=
(
uint32_t
)
n
-
(
uint32_t
)
q
*
1000000
;
if
(
r
>=
1000000
)
{
r
-=
1000000
;
q
++
;
}
*
rem
=
r
;
return
q
;
}
static
inline
uint64_t
rtc_time_get_now_us_adjusted
();
#define rtc_time_get_magic() rtc_time_magic
static
inline
bool
rtc_time_check_sleep_magic
(
void
)
{
uint32_t
magic
=
rtc_time_get_magic
();
...
...
@@ -225,9 +321,11 @@ static inline bool rtc_time_check_magic(void)
return
(
magic
==
RTC_TIME_MAGIC_FRC2
||
magic
==
RTC_TIME_MAGIC_CCOUNT
||
magic
==
RTC_TIME_MAGIC_SLEEP
);
}
static
inline
void
rtc_time_set_magic
(
uint32_t
new_magic
)
static
void
rtc_time_set_magic
(
uint32_t
new_magic
)
{
rtc_mem_write
(
RTC_TIME_MAGIC_POS
,
new_magic
);
RTC_DBG
(
"Set magic to %08x
\n
"
,
new_magic
);
rtc_time_magic
=
new_magic
;
bbram_save
();
}
static
inline
void
rtc_time_set_sleep_magic
(
void
)
...
...
@@ -249,7 +347,7 @@ static inline void rtc_time_set_frc2_magic(void)
static
inline
void
rtc_time_unset_magic
(
void
)
{
rtc_
mem_write
(
RTC_TIME_MAGIC_POS
,
0
);
rtc_
time_set_magic
(
0
);
}
static
inline
uint32_t
rtc_time_read_raw
(
void
)
...
...
@@ -281,16 +379,16 @@ static inline uint64_t rtc_time_source_offset(void)
case
RTC_TIME_MAGIC_FRC2
:
raw
=
rtc_time_read_raw_frc2
();
break
;
default:
return
0
;
// We are not in a position to offer time
}
uint32_t
multiplier
=
rtc_
mem_read
(
RTC_SOURCECYCLEUNITS_POS
)
;
uint32_t
previous
=
rtc_
mem_read
(
RTC_LASTSOURCEVAL_POS
)
;
uint32_t
multiplier
=
rtc_
sourcecycleunits
;
uint32_t
previous
=
rtc_
lastsourceval
;
if
(
raw
<
previous
)
{
// We had a rollover.
uint64_t
to_add
=
(
1ULL
<<
32
)
*
multiplier
;
uint64_t
base
=
rtc_
mem_read64
(
RTC_CYCLEOFFSETL_POS
)
;
uint64_t
base
=
rtc_
cycleoffset
;
if
(
base
)
rtc_
mem_write64
(
RTC_CYCLEOFFSETL_POS
,
base
+
to_add
)
;
rtc_
cycleoffset
=
base
+
to_add
;
}
rtc_
mem_write
(
RTC_LASTSOURCEVAL_POS
,
raw
)
;
rtc_
lastsourceval
=
raw
;
return
((
uint64_t
)
raw
)
*
multiplier
;
}
...
...
@@ -298,7 +396,7 @@ static inline uint64_t rtc_time_unix_unitcycles(void)
{
// Note: The order of these two must be maintained, as the first call might change the outcome of the second
uint64_t
offset
=
rtc_time_source_offset
();
uint64_t
base
=
rtc_
mem_read64
(
RTC_CYCLEOFFSETL_POS
)
;
uint64_t
base
=
rtc_
cycleoffset
;
if
(
!
base
)
return
0
;
// No known time
...
...
@@ -308,17 +406,22 @@ static inline uint64_t rtc_time_unix_unitcycles(void)
static
inline
uint64_t
rtc_time_unix_us
(
void
)
{
#if UNITCYCLE_MHZ == 2080
return
div2080
(
rtc_time_unix_unitcycles
());
#else
#error UNITCYCLE_MHZ has an odd value
return
rtc_time_unix_unitcycles
()
/
UNITCYCLE_MHZ
;
#endif
}
static
inline
void
rtc_time_register_time_reached
(
uint32_t
s
,
uint32_t
us
)
{
rtc_
mem_write
(
RTC_LASTTODUS_POS
,
us
)
;
rtc_
lasttodus
=
us
;
}
static
inline
uint32_t
rtc_time_us_since_time_reached
(
uint32_t
s
,
uint32_t
us
)
{
uint32_t
lastus
=
rtc_
mem_read
(
RTC_LASTTODUS_POS
)
;
uint32_t
lastus
=
rtc_
lasttodus
;
if
(
us
<
lastus
)
us
+=
1000000
;
return
us
-
lastus
;
...
...
@@ -334,14 +437,14 @@ static inline bool rtc_time_calibration_is_sane(uint32_t cali)
static
inline
uint32_t
rtc_time_get_calibration
(
void
)
{
uint32_t
cal
=
rtc_time_check_magic
()
?
rtc_
mem_read
(
RTC_CALIBRATION_POS
)
:
0
;
uint32_t
cal
=
rtc_time_check_magic
()
?
rtc_
calibration
:
0
;
if
(
!
cal
)
{
// Make a first guess, most likely to be rather bad, but better then nothing.
#ifndef BOOTLOADER_CODE // This will pull in way too much of the system for the bootloader to handle.
ets_delay_us
(
200
);
cal
=
system_rtc_clock_cali_proc
();
rtc_
mem_write
(
RTC_CALIBRATION_POS
,
cal
)
;
rtc_
calibration
=
cal
;
#else
cal
=
6
<<
12
;
#endif
...
...
@@ -351,7 +454,7 @@ static inline uint32_t rtc_time_get_calibration(void)
static
inline
void
rtc_time_invalidate_calibration
(
void
)
{
rtc_
mem_write
(
RTC_CALIBRATION_POS
,
0
)
;
rtc_
calibration
=
0
;
}
static
inline
uint64_t
rtc_time_us_to_ticks
(
uint64_t
us
)
...
...
@@ -374,7 +477,7 @@ static inline uint64_t rtc_time_get_now_us_adjusted(void)
uint64_t
raw
=
rtc_time_get_now_us_raw
();
if
(
!
raw
)
return
0
;
return
raw
+
rtc_
mem_read
(
RTC_TODOFFSETUS_POS
)
;
return
raw
+
rtc_
todoffsetus
;
}
...
...
@@ -383,16 +486,16 @@ static inline void rtc_time_add_sleep_tracking(uint32_t us, uint32_t cycles)
if
(
rtc_time_check_magic
())
{
// us is the one that will grow faster...
uint32_t
us_before
=
rtc_
mem_read
(
RTC_SLEEPTOTALUS_POS
)
;
uint32_t
us_before
=
rtc_
sleeptotalus
;
uint32_t
us_after
=
us_before
+
us
;
uint32_t
cycles_after
=
rtc_
mem_read
(
RTC_SLEEPTOTALCYCLES_POS
)
+
cycles
;
uint32_t
cycles_after
=
rtc_
sleeptotalcycles
+
cycles
;
if
(
us_after
<
us_before
)
// Give up if it would cause an overflow
{
us_after
=
cycles_after
=
0xffffffff
;
}
rtc_
mem_write
(
RTC_SLEEPTOTALUS_POS
,
us_after
)
;
rtc_
mem_write
(
RTC_SLEEPTOTALCYCLES_POS
,
cycles_after
)
;
rtc_
sleeptotalus
=
us_after
;
rtc_
sleeptotalcycles
=
cycles_after
;
}
}
...
...
@@ -402,6 +505,8 @@ static void rtc_time_enter_deep_sleep_us(uint32_t us)
{
if
(
rtc_time_check_wake_magic
())
rtc_time_set_sleep_magic
();
else
bbram_save
();
rtc_reg_write
(
0
,
0
);
rtc_reg_write
(
0
,
rtc_reg_read
(
0
)
&
0xffffbfff
);
...
...
@@ -442,22 +547,23 @@ static void rtc_time_enter_deep_sleep_us(uint32_t us)
rtc_time_enter_deep_sleep_final
();
}
static
inline
void
rtc_time_deep_sleep_us
(
uint32_t
us
)
static
void
rtc_time_deep_sleep_us
(
uint32_t
us
)
{
if
(
rtc_time_check_magic
())
{
uint32_t
to_adjust
=
rtc_
mem_read
(
RTC_TODOFFSETUS_POS
)
;
uint32_t
to_adjust
=
rtc_
todoffsetus
;
if
(
to_adjust
)
{
us
+=
to_adjust
;
rtc_
mem_write
(
RTC_TODOFFSETUS_POS
,
0
)
;
rtc_
todoffsetus
=
0
;
}
uint64_t
now
=
rtc_time_get_now_us_raw
();
// Now the same as _adjusted()
if
(
now
)
{
// Need to maintain the clock first. When we wake up, counter will be 0
uint64_t
wakeup
=
now
+
us
;
uint64_t
wakeup_cycles
=
wakeup
*
UNITCYCLE_MHZ
;
rtc_mem_write64
(
RTC_CYCLEOFFSETL_POS
,
wakeup_cycles
);
// Probly should factor in the rate here TODO
rtc_cycleoffset
=
wakeup_cycles
;
}
}
rtc_time_enter_deep_sleep_us
(
us
);
...
...
@@ -476,27 +582,32 @@ static inline void rtc_time_deep_sleep_until_aligned(uint32_t align, uint32_t mi
rtc_time_deep_sleep_us
(
then
-
now
);
}
static
inline
void
rtc_time_reset
(
bool
clear_cali
)
static
void
rtc_time_reset
(
bool
clear_cali
)
{
rtc_mem_write64
(
RTC_CYCLEOFFSETL_POS
,
0
);
rtc_mem_write
(
RTC_SLEEPTOTALUS_POS
,
0
);
rtc_mem_write
(
RTC_SLEEPTOTALCYCLES_POS
,
0
);
rtc_mem_write
(
RTC_TODOFFSETUS_POS
,
0
);
rtc_mem_write
(
RTC_LASTTODUS_POS
,
0
);
rtc_mem_write
(
RTC_SOURCECYCLEUNITS_POS
,
0
);
rtc_mem_write
(
RTC_LASTSOURCEVAL_POS
,
0
);
rtc_cycleoffset
=
0
;
rtc_sleeptotalus
=
0
;
rtc_sleeptotalcycles
=
0
;
rtc_todoffsetus
=
0
;
rtc_lasttodus
=
0
;
rtc_sourcecycleunits
=
0
;
rtc_lastsourceval
=
0
;
rtc_usatlastrate
=
0
;
rtc_rateadjustedus
=
0
;
rtc_usrate
=
0
;
if
(
clear_cali
)
rtc_mem_write
(
RTC_CALIBRATION_POS
,
0
);
rtc_calibration
=
0
;
bbram_save
();
}
static
inline
bool
rtc_time_have_time
(
void
)
{
return
(
rtc_time_check_magic
()
&&
rtc_
mem_read64
(
RTC_CYCLEOFFSETL_POS
)
!=
0
);
return
(
rtc_time_check_magic
()
&&
rtc_
cycleoffset
!=
0
);
}
static
inline
void
rtc_time_select_frc2_source
()
static
void
rtc_time_select_frc2_source
()
{
// FRC2 always runs at 1/256th of the default 80MHz clock, even if the actual clock is different
uint32_t
new_multiplier
=
(
256
*
UNITCYCLE_MHZ
+
CPU_DEFAULT_MHZ
/
2
)
/
CPU_DEFAULT_MHZ
;
...
...
@@ -515,14 +626,14 @@ static inline void rtc_time_select_frc2_source()
if
(
rtc_time_have_time
())
{
uint64_t
offset
=
(
uint64_t
)
after
*
new_multiplier
;
rtc_
mem_write64
(
RTC_CYCLEOFFSETL_POS
,
now
-
offset
)
;
rtc_
mem_write
(
RTC_LASTSOURCEVAL_POS
,
after
)
;
rtc_
cycleoffset
=
now
-
offset
;
rtc_
lastsourceval
=
after
;
}
rtc_
mem_write
(
RTC_SOURCECYCLEUNITS_POS
,
new_multiplier
)
;
rtc_
mem_write
(
RTC_TIME_MAGIC_POS
,
RTC_TIME_MAGIC_FRC2
);
rtc_
sourcecycleunits
=
new_multiplier
;
rtc_
time_set_magic
(
RTC_TIME_MAGIC_FRC2
);
}
static
inline
void
rtc_time_select_ccount_source
(
uint32_t
mhz
,
bool
first
)
static
void
rtc_time_select_ccount_source
(
uint32_t
mhz
,
bool
first
)
{
uint32_t
new_multiplier
=
(
UNITCYCLE_MHZ
+
mhz
/
2
)
/
mhz
;
...
...
@@ -532,9 +643,9 @@ static inline void rtc_time_select_ccount_source(uint32_t mhz, bool first)
if
(
first
)
{
// The ccounter has been running at this rate since startup, and the offset is set accordingly
rtc_
mem_write
(
RTC_LASTSOURCEVAL_POS
,
0
)
;
rtc_
mem_write
(
RTC_SOURCECYCLEUNITS_POS
,
new_multiplier
)
;
rtc_
mem_write
(
RTC_TIME_MAGIC_POS
,
RTC_TIME_MAGIC_CCOUNT
);
rtc_
lastsourceval
=
0
;
rtc_
sourcecycleunits
=
new_multiplier
;
rtc_
time_set_magic
(
RTC_TIME_MAGIC_CCOUNT
);
return
;
}
...
...
@@ -552,11 +663,11 @@ static inline void rtc_time_select_ccount_source(uint32_t mhz, bool first)
if
(
rtc_time_have_time
())
{
uint64_t
offset
=
(
uint64_t
)
after
*
new_multiplier
;
rtc_
mem_write64
(
RTC_CYCLEOFFSETL_POS
,
now
-
offset
)
;
rtc_
mem_write
(
RTC_LASTSOURCEVAL_POS
,
after
)
;
rtc_
cycleoffset
=
now
-
offset
;
rtc_
lastsourceval
=
after
;
}
rtc_
mem_write
(
RTC_SOURCECYCLEUNITS_POS
,
new_multiplier
)
;
rtc_
mem_write
(
RTC_TIME_MAGIC_POS
,
RTC_TIME_MAGIC_CCOUNT
);
rtc_
sourcecycleunits
=
new_multiplier
;
rtc_
time_set_magic
(
RTC_TIME_MAGIC_CCOUNT
);
}
...
...
@@ -573,12 +684,9 @@ static inline void rtc_time_switch_to_system_clock(void)
rtc_time_select_frc2_source
();
}
static
inline
void
rtc_time_tmrfn
(
void
*
arg
)
{
rtc_time_source_offset
();
}
static
inline
void
rtc_time_tmrfn
(
void
*
arg
);
static
inline
void
rtc_time_install_timer
(
void
)
static
void
rtc_time_install_timer
(
void
)
{
static
ETSTimer
tmr
;
...
...
@@ -618,8 +726,10 @@ static inline void rtc_time_install_wrap_handler(void)
// This switches from MAGIC_SLEEP to MAGIC_CCOUNT, with ccount running at bootup frequency (i.e. 52MHz).
// To be called as early as possible, potententially as the first thing in an overridden entry point.
static
inline
void
rtc_time_register_bootup
(
void
)
static
void
rtc_time_register_bootup
(
void
)
{
RTC_DBG_NOT_ENABLED
();
bbram_load
();
uint32_t
reset_reason
=
rtc_get_reset_reason
();
#ifndef BOOTLOADER_CODE
static
const
bool
erase_calibration
=
true
;
...
...
@@ -634,6 +744,9 @@ static inline void rtc_time_register_bootup(void)
if
(
reset_reason
!=
2
)
// This was *not* a proper wakeup from a deep sleep. All our time keeping is f*cked!
rtc_time_reset
(
erase_calibration
);
// Possibly keep the calibration, it should still be good
rtc_time_select_ccount_source
(
CPU_BOOTUP_MHZ
,
true
);
rtc_rateadjustedus
=
rtc_usatlastrate
=
rtc_time_get_now_us_adjusted
();
rtc_todoffsetus
=
0
;
RTC_DBG_ENABLED
();
return
;
}
...
...
@@ -642,6 +755,7 @@ static inline void rtc_time_register_bootup(void)
// We did not go to sleep properly. All our time keeping is f*cked!
rtc_time_reset
(
erase_calibration
);
// Possibly keep the calibration, it should still be good
}
RTC_DBG_ENABLED
();
}
// Call this from the nodemcu entry point, i.e. just before we switch from 52MHz to 80MHz
...
...
@@ -664,12 +778,44 @@ static inline void rtc_time_prepare(void)
rtc_time_select_frc2_source
();
}
static
uint64_t
rtc_time_adjust_us_by_rate
(
uint64_t
us
,
int
force
)
{
uint64_t
usoff
=
us
-
rtc_usatlastrate
;
uint64_t
usadj
=
(
usoff
*
((
1ull
<<
32
)
+
(
int
)
rtc_usrate
))
>>
32
;
usadj
=
usadj
+
rtc_rateadjustedus
;
if
(
usoff
>
1000000000
||
force
)
{
rtc_usatlastrate
=
us
;
rtc_rateadjustedus
=
usadj
;
}
return
usadj
;
}
static
inline
void
rtc_time_set_rate
(
int32_t
rate
)
{
uint64_t
now
=
rtc_time_get_now_us_adjusted
();
rtc_time_adjust_us_by_rate
(
now
,
1
);
rtc_usrate
=
rate
;
}
static
inline
int32_t
rtc_time_get_rate
()
{
return
rtc_usrate
;
}
static
inline
void
rtc_time_tmrfn
(
void
*
arg
)
{
uint64_t
now
=
rtc_time_get_now_us_adjusted
();
rtc_time_adjust_us_by_rate
(
now
,
0
);
rtc_time_source_offset
();
}
static
inline
void
rtc_time_gettimeofday
(
struct
rtc_timeval
*
tv
)
{
uint64_t
now
=
rtc_time_get_now_us_adjusted
();
uint32_t
sec
=
now
/
1000000
;
uint32_t
usec
=
now
%
1000000
;
uint32_t
to_adjust
=
rtc_mem_read
(
RTC_TODOFFSETUS_POS
);
now
=
rtc_time_adjust_us_by_rate
(
now
,
0
);
uint32_t
usec
;
uint32_t
sec
=
div1m
(
&
usec
,
now
);
uint32_t
to_adjust
=
rtc_todoffsetus
;
if
(
to_adjust
)
{
uint32_t
us_passed
=
rtc_time_us_since_time_reached
(
sec
,
usec
);
...
...
@@ -680,9 +826,8 @@ static inline void rtc_time_gettimeofday(struct rtc_timeval* tv)
adjust
=
to_adjust
;
to_adjust
-=
adjust
;
now
-=
adjust
;
now
/
1000000
;
now
%
1000000
;
rtc_mem_write
(
RTC_TODOFFSETUS_POS
,
to_adjust
);
sec
=
div1m
(
&
usec
,
now
);
rtc_todoffsetus
=
to_adjust
;
}
}
tv
->
tv_sec
=
sec
;
...
...
@@ -690,23 +835,24 @@ static inline void rtc_time_gettimeofday(struct rtc_timeval* tv)
rtc_time_register_time_reached
(
sec
,
usec
);
}
static
inline
void
rtc_time_settimeofday
(
const
struct
rtc_timeval
*
tv
)
static
void
rtc_time_settimeofday
(
const
struct
rtc_timeval
*
tv
)
{
if
(
!
rtc_time_check_magic
())
return
;
uint32_t
sleep_us
=
rtc_
mem_read
(
RTC_SLEEPTOTALUS_POS
)
;
uint32_t
sleep_cycles
=
rtc_
mem_read
(
RTC_SLEEPTOTALCYCLES_POS
)
;
uint32_t
sleep_us
=
rtc_
sleeptotalus
;
uint32_t
sleep_cycles
=
rtc_
sleeptotalcycles
;
// At this point, the CPU clock will definitely be at the default rate (nodemcu fully booted)
uint64_t
now_esp_us
=
rtc_time_get_now_us_adjusted
();
now_esp_us
=
rtc_time_adjust_us_by_rate
(
now_esp_us
,
1
);
uint64_t
now_ntp_us
=
((
uint64_t
)
tv
->
tv_sec
)
*
1000000
+
tv
->
tv_usec
;
int64_t
diff_us
=
now_esp_us
-
now_ntp_us
;
// Store the *actual* time.
uint64_t
target_unitcycles
=
now_ntp_us
*
UNITCYCLE_MHZ
;
uint64_t
sourcecycles
=
rtc_time_source_offset
();
rtc_
mem_write64
(
RTC_CYCLEOFFSETL_POS
,
target_unitcycles
-
sourcecycles
)
;
rtc_
cycleoffset
=
target_unitcycles
-
sourcecycles
;
// calibrate sleep period based on difference between expected time and actual time
if
(
sleep_us
>
0
&&
sleep_us
<
0xffffffff
&&
...
...
@@ -715,11 +861,15 @@ static inline void rtc_time_settimeofday(const struct rtc_timeval* tv)
uint64_t
actual_sleep_us
=
sleep_us
-
diff_us
;
uint32_t
cali
=
(
actual_sleep_us
<<
12
)
/
sleep_cycles
;
if
(
rtc_time_calibration_is_sane
(
cali
))
rtc_
mem_write
(
RTC_CALIBRATION_POS
,
cali
)
;
rtc_
calibration
=
cali
;
}
rtc_mem_write
(
RTC_SLEEPTOTALUS_POS
,
0
);
rtc_mem_write
(
RTC_SLEEPTOTALCYCLES_POS
,
0
);
rtc_sleeptotalus
=
0
;
rtc_sleeptotalcycles
=
0
;
rtc_usatlastrate
=
now_ntp_us
;
rtc_rateadjustedus
=
now_ntp_us
;
rtc_usrate
=
0
;
// Deal with time adjustment if necessary
if
(
diff_us
>
0
)
// Time went backwards. Avoid that....
...
...
@@ -730,7 +880,7 @@ static inline void rtc_time_settimeofday(const struct rtc_timeval* tv)
}
else
diff_us
=
0
;
rtc_
mem_write
(
RTC_TODOFFSETUS_POS
,
diff_us
)
;
rtc_
todoffsetus
=
diff_us
;
uint32_t
now_s
=
now_ntp_us
/
1000000
;
uint32_t
now_us
=
now_ntp_us
%
1000000
;
...
...
app/include/user_config.h
View file @
b62fae91
...
...
@@ -111,12 +111,11 @@ extern void luaL_assertfail(const char *file, int line, const char *message);
//#define WIFI_SMART_ENABLE
#define WIFI_STATION_STATUS_MONITOR_ENABLE
#define WIFI_SDK_EVENT_MONITOR_ENABLE
#define WIFI_EVENT_MONITOR_DISCONNECT_REASON_LIST_ENABLE
#define ENABLE_TIMER_SUSPEND
#define PMSLEEP_ENABLE
////
#define ENABLE_TIMER_SUSPEND
//
#define PMSLEEP_ENABLE
#define STRBUF_DEFAULT_INCREMENT 32
...
...
app/include/user_modules.h
View file @
b62fae91
...
...
@@ -40,6 +40,7 @@
//#define LUA_USE_MODULES_HX711
#define LUA_USE_MODULES_I2C
//#define LUA_USE_MODULES_L3G4200D
//#define LUA_USE_MODULES_MCP4725
//#define LUA_USE_MODULES_MDNS
#define LUA_USE_MODULES_MQTT
#define LUA_USE_MODULES_NET
...
...
app/lwip/app/dhcpserver.c
View file @
b62fae91
...
...
@@ -277,6 +277,21 @@ static void ICACHE_FLASH_ATTR create_msg(struct dhcps_msg *m)
uint32
magic_cookie1
=
magic_cookie
;
os_memcpy
((
char
*
)
m
->
options
,
&
magic_cookie1
,
sizeof
(
magic_cookie1
));
}
struct
pbuf
*
dhcps_pbuf_alloc
(
u16_t
len
)
{
u16_t
mlen
=
sizeof
(
struct
dhcps_msg
);
if
(
len
>
mlen
)
{
#if DHCPS_DEBUG
DHCPS_LOG
(
"dhcps: len=%d mlen=%d"
,
len
,
mlen
);
#endif
mlen
=
len
;
}
return
pbuf_alloc
(
PBUF_TRANSPORT
,
mlen
,
PBUF_RAM
);
}
///////////////////////////////////////////////////////////////////////////////////
/*
* ����һ��OFFER
...
...
@@ -284,7 +299,7 @@ static void ICACHE_FLASH_ATTR create_msg(struct dhcps_msg *m)
* @param -- m ָ����Ҫ���͵�DHCP msg����
*/
///////////////////////////////////////////////////////////////////////////////////
static
void
ICACHE_FLASH_ATTR
send_offer
(
struct
dhcps_msg
*
m
)
static
void
ICACHE_FLASH_ATTR
send_offer
(
struct
dhcps_msg
*
m
,
u16_t
len
)
{
uint8_t
*
end
;
struct
pbuf
*
p
,
*
q
;
...
...
@@ -298,7 +313,7 @@ static void ICACHE_FLASH_ATTR send_offer(struct dhcps_msg *m)
end
=
add_offer_options
(
end
);
end
=
add_end
(
end
);
p
=
pbuf_alloc
(
PBUF_TRANSPORT
,
sizeof
(
struct
dhcps_msg
),
PBUF_RAM
);
p
=
dhcps_
pbuf_alloc
(
len
);
#if DHCPS_DEBUG
os_printf
(
"udhcp: send_offer>>p->ref = %d
\n
"
,
p
->
ref
);
#endif
...
...
@@ -344,7 +359,7 @@ static void ICACHE_FLASH_ATTR send_offer(struct dhcps_msg *m)
* @param m ָ����Ҫ���͵�DHCP msg����
*/
///////////////////////////////////////////////////////////////////////////////////
static
void
ICACHE_FLASH_ATTR
send_nak
(
struct
dhcps_msg
*
m
)
static
void
ICACHE_FLASH_ATTR
send_nak
(
struct
dhcps_msg
*
m
,
u16_t
len
)
{
u8_t
*
end
;
...
...
@@ -358,7 +373,7 @@ static void ICACHE_FLASH_ATTR send_nak(struct dhcps_msg *m)
end
=
add_msg_type
(
&
m
->
options
[
4
],
DHCPNAK
);
end
=
add_end
(
end
);
p
=
pbuf_alloc
(
PBUF_TRANSPORT
,
sizeof
(
struct
dhcps_msg
),
PBUF_RAM
);
p
=
dhcps_
pbuf_alloc
(
len
);
#if DHCPS_DEBUG
os_printf
(
"udhcp: send_nak>>p->ref = %d
\n
"
,
p
->
ref
);
#endif
...
...
@@ -404,7 +419,7 @@ static void ICACHE_FLASH_ATTR send_nak(struct dhcps_msg *m)
* @param m ָ����Ҫ���͵�DHCP msg����
*/
///////////////////////////////////////////////////////////////////////////////////
static
void
ICACHE_FLASH_ATTR
send_ack
(
struct
dhcps_msg
*
m
)
static
void
ICACHE_FLASH_ATTR
send_ack
(
struct
dhcps_msg
*
m
,
u16_t
len
)
{
u8_t
*
end
;
...
...
@@ -418,8 +433,8 @@ static void ICACHE_FLASH_ATTR send_ack(struct dhcps_msg *m)
end
=
add_msg_type
(
&
m
->
options
[
4
],
DHCPACK
);
end
=
add_offer_options
(
end
);
end
=
add_end
(
end
);
p
=
pbuf_alloc
(
PBUF_TRANSPORT
,
sizeof
(
struct
dhcps_msg
),
PBUF_RAM
);
p
=
dhcps_
pbuf_alloc
(
len
);
#if DHCPS_DEBUG
os_printf
(
"udhcp: send_ack>>p->ref = %d
\n
"
,
p
->
ref
);
#endif
...
...
@@ -602,7 +617,7 @@ static void ICACHE_FLASH_ATTR handle_dhcp(void *arg,
uint16_t
port
)
{
struct
dhcps_msg
*
pmsg_dhcps
=
NULL
;
sint16_t
tlen
=
0
;
sint16_t
tlen
=
0
,
malloc_len
;
u16_t
i
=
0
;
u16_t
dhcps_msg_cnt
=
0
;
u8_t
*
p_dhcps_msg
=
NULL
;
...
...
@@ -613,11 +628,21 @@ static void ICACHE_FLASH_ATTR handle_dhcp(void *arg,
#endif
if
(
p
==
NULL
)
return
;
pmsg_dhcps
=
(
struct
dhcps_msg
*
)
os_zalloc
(
sizeof
(
struct
dhcps_msg
));
malloc_len
=
sizeof
(
struct
dhcps_msg
);
#if DHCPS_DEBUG
DHCPS_LOG
(
"dhcps: handle_dhcp malloc_len=%d rx_len=%d"
,
malloc_len
,
p
->
tot_len
);
#endif
if
(
malloc_len
<
p
->
tot_len
)
{
malloc_len
=
p
->
tot_len
;
}
pmsg_dhcps
=
(
struct
dhcps_msg
*
)
os_malloc
(
malloc_len
);
if
(
NULL
==
pmsg_dhcps
){
pbuf_free
(
p
);
return
;
}
memset
(
pmsg_dhcps
,
0x00
,
malloc_len
);
p_dhcps_msg
=
(
u8_t
*
)
pmsg_dhcps
;
tlen
=
p
->
tot_len
;
data
=
p
->
payload
;
...
...
@@ -657,19 +682,19 @@ static void ICACHE_FLASH_ATTR handle_dhcp(void *arg,
#if DHCPS_DEBUG
os_printf
(
"dhcps: handle_dhcp-> DHCPD_STATE_OFFER
\n
"
);
#endif
send_offer
(
pmsg_dhcps
);
send_offer
(
pmsg_dhcps
,
malloc_len
);
break
;
case
DHCPS_STATE_ACK
:
//3
#if DHCPS_DEBUG
os_printf
(
"dhcps: handle_dhcp-> DHCPD_STATE_ACK
\n
"
);
#endif
send_ack
(
pmsg_dhcps
);
send_ack
(
pmsg_dhcps
,
malloc_len
);
break
;
case
DHCPS_STATE_NAK
:
//4
#if DHCPS_DEBUG
os_printf
(
"dhcps: handle_dhcp-> DHCPD_STATE_NAK
\n
"
);
#endif
send_nak
(
pmsg_dhcps
);
send_nak
(
pmsg_dhcps
,
malloc_len
);
break
;
default
:
break
;
...
...
app/modules/adxl345.c
View file @
b62fae91
...
...
@@ -12,7 +12,7 @@
static
const
uint32_t
adxl345_i2c_id
=
0
;
static
const
uint8_t
adxl345_i2c_addr
=
0x53
;
static
uint8_t
ICACHE_FLASH_ATTR
r8u
(
uint32_t
id
,
uint8_t
reg
)
{
static
uint8_t
r8u
(
uint32_t
id
,
uint8_t
reg
)
{
uint8_t
ret
;
platform_i2c_send_start
(
id
);
...
...
@@ -26,19 +26,9 @@ static uint8_t ICACHE_FLASH_ATTR r8u(uint32_t id, uint8_t reg) {
return
ret
;
}
static
int
ICACHE_FLASH_ATTR
adxl345_init
(
lua_State
*
L
)
{
uint32_t
sda
;
uint32_t
scl
;
static
int
adxl345_setup
(
lua_State
*
L
)
{
uint8_t
devid
;
sda
=
luaL_checkinteger
(
L
,
1
);
scl
=
luaL_checkinteger
(
L
,
2
);
luaL_argcheck
(
L
,
sda
>
0
&&
scl
>
0
,
1
,
"no i2c for D0"
);
platform_i2c_setup
(
adxl345_i2c_id
,
sda
,
scl
,
PLATFORM_I2C_SPEED_SLOW
);
devid
=
r8u
(
adxl345_i2c_id
,
0x00
);
if
(
devid
!=
229
)
{
...
...
@@ -55,7 +45,24 @@ static int ICACHE_FLASH_ATTR adxl345_init(lua_State* L) {
return
0
;
}
static
int
ICACHE_FLASH_ATTR
adxl345_read
(
lua_State
*
L
)
{
static
int
adxl345_init
(
lua_State
*
L
)
{
uint32_t
sda
;
uint32_t
scl
;
platform_print_deprecation_note
(
"adxl345.init() is replaced by adxl345.setup()"
,
"in the next version"
);
sda
=
luaL_checkinteger
(
L
,
1
);
scl
=
luaL_checkinteger
(
L
,
2
);
luaL_argcheck
(
L
,
sda
>
0
&&
scl
>
0
,
1
,
"no i2c for D0"
);
platform_i2c_setup
(
adxl345_i2c_id
,
sda
,
scl
,
PLATFORM_I2C_SPEED_SLOW
);
return
adxl345_setup
(
L
);
}
static
int
adxl345_read
(
lua_State
*
L
)
{
uint8_t
data
[
6
];
int
x
,
y
,
z
;
...
...
@@ -88,6 +95,8 @@ static int ICACHE_FLASH_ATTR adxl345_read(lua_State* L) {
static
const
LUA_REG_TYPE
adxl345_map
[]
=
{
{
LSTRKEY
(
"read"
),
LFUNCVAL
(
adxl345_read
)},
{
LSTRKEY
(
"setup"
),
LFUNCVAL
(
adxl345_setup
)},
/// init() is deprecated
{
LSTRKEY
(
"init"
),
LFUNCVAL
(
adxl345_init
)},
{
LNILKEY
,
LNILVAL
}
};
...
...
app/modules/am2320.c
View file @
b62fae91
...
...
@@ -84,10 +84,8 @@ static int _read(uint32_t id, void *buf, uint8_t len, uint8_t off)
return
0
;
}
static
int
am2320_
init
(
lua_State
*
L
)
static
int
am2320_
setup
(
lua_State
*
L
)
{
uint32_t
sda
;
uint32_t
scl
;
int
ret
;
struct
{
uint8_t
cmd
;
...
...
@@ -97,6 +95,24 @@ static int am2320_init(lua_State* L)
uint32_t
id
;
}
nfo
;
os_delay_us
(
1500
);
// give some time to settle things down
ret
=
_read
(
am2320_i2c_id
,
&
nfo
,
sizeof
(
nfo
)
-
2
,
0x08
);
if
(
ret
)
return
luaL_error
(
L
,
"transmission error"
);
lua_pushinteger
(
L
,
ntohs
(
nfo
.
model
));
lua_pushinteger
(
L
,
nfo
.
version
);
lua_pushinteger
(
L
,
ntohl
(
nfo
.
id
));
return
3
;
}
static
int
am2320_init
(
lua_State
*
L
)
{
uint32_t
sda
;
uint32_t
scl
;
platform_print_deprecation_note
(
"am2320.init() is replaced by am2320.setup()"
,
"in the next version"
);
if
(
!
lua_isnumber
(
L
,
1
)
||
!
lua_isnumber
(
L
,
2
))
{
return
luaL_error
(
L
,
"wrong arg range"
);
}
...
...
@@ -110,15 +126,7 @@ static int am2320_init(lua_State* L)
platform_i2c_setup
(
am2320_i2c_id
,
sda
,
scl
,
PLATFORM_I2C_SPEED_SLOW
);
os_delay_us
(
1500
);
// give some time to settle things down
ret
=
_read
(
am2320_i2c_id
,
&
nfo
,
sizeof
(
nfo
)
-
2
,
0x08
);
if
(
ret
)
return
luaL_error
(
L
,
"transmission error"
);
lua_pushinteger
(
L
,
ntohs
(
nfo
.
model
));
lua_pushinteger
(
L
,
nfo
.
version
);
lua_pushinteger
(
L
,
ntohl
(
nfo
.
id
));
return
3
;
return
am2320_setup
(
L
);
}
static
int
am2320_read
(
lua_State
*
L
)
...
...
@@ -145,8 +153,10 @@ static int am2320_read(lua_State* L)
}
static
const
LUA_REG_TYPE
am2320_map
[]
=
{
{
LSTRKEY
(
"read"
),
LFUNCVAL
(
am2320_read
)},
{
LSTRKEY
(
"init"
),
LFUNCVAL
(
am2320_init
)},
{
LSTRKEY
(
"read"
),
LFUNCVAL
(
am2320_read
)},
{
LSTRKEY
(
"setup"
),
LFUNCVAL
(
am2320_setup
)},
// init() is deprecated
{
LSTRKEY
(
"init"
),
LFUNCVAL
(
am2320_init
)},
{
LNILKEY
,
LNILVAL
}
};
...
...
app/modules/bme280.c
View file @
b62fae91
...
...
@@ -227,35 +227,25 @@ static double bme280_qfe2qnh(int32_t qfe, int32_t h) {
return
qnh
;
}
static
int
bme280_lua_init
(
lua_State
*
L
)
{
uint8_t
sda
;
uint8_t
scl
;
static
int
bme280_lua_setup
(
lua_State
*
L
)
{
uint8_t
config
;
uint8_t
ack
;
uint8_t
full_init
;
uint8_t
const
bit3
=
0
b111
;
uint8_t
const
bit2
=
0
b11
;
if
(
!
lua_isnumber
(
L
,
1
)
||
!
lua_isnumber
(
L
,
2
))
{
return
luaL_error
(
L
,
"wrong arg range"
);
}
sda
=
luaL_checkinteger
(
L
,
1
);
scl
=
luaL_checkinteger
(
L
,
2
);
bme280_mode
=
(
!
lua_isnumber
(
L
,
6
)
?
BME280_NORMAL_MODE
:
(
luaL_checkinteger
(
L
,
6
)
&
bit2
))
// 6-th parameter: power mode
|
((
!
lua_isnumber
(
L
,
4
)
?
BME280_OVERSAMP_16X
:
(
luaL_checkinteger
(
L
,
4
)
&
bit3
))
<<
2
)
// 4-th parameter: pressure oversampling
|
((
!
lua_isnumber
(
L
,
3
)
?
BME280_OVERSAMP_16X
:
(
luaL_checkinteger
(
L
,
3
)
&
bit3
))
<<
5
);
// 3-rd parameter: temperature oversampling
bme280_mode
=
(
!
lua_isnumber
(
L
,
4
)
?
BME280_NORMAL_MODE
:
(
luaL_checkinteger
(
L
,
4
)
&
bit2
))
// 4-th parameter: power mode
|
((
!
lua_isnumber
(
L
,
2
)
?
BME280_OVERSAMP_16X
:
(
luaL_checkinteger
(
L
,
2
)
&
bit3
))
<<
2
)
// 2-nd parameter: pressure oversampling
|
((
!
lua_isnumber
(
L
,
1
)
?
BME280_OVERSAMP_16X
:
(
luaL_checkinteger
(
L
,
1
)
&
bit3
))
<<
5
);
// 1-st parameter: temperature oversampling
bme280_ossh
=
(
!
lua_isnumber
(
L
,
5
))
?
BME280_OVERSAMP_16X
:
(
luaL_checkinteger
(
L
,
5
)
&
bit3
);
//
5-th
parameter: humidity oversampling
bme280_ossh
=
(
!
lua_isnumber
(
L
,
3
))
?
BME280_OVERSAMP_16X
:
(
luaL_checkinteger
(
L
,
3
)
&
bit3
);
//
3-rd
parameter: humidity oversampling
config
=
((
!
lua_isnumber
(
L
,
7
)
?
BME280_STANDBY_TIME_20_MS
:
(
luaL_checkinteger
(
L
,
7
)
&
bit3
))
<<
5
)
//
7
-th parameter: inactive duration in normal mode
|
((
!
lua_isnumber
(
L
,
8
)
?
BME280_FILTER_COEFF_16
:
(
luaL_checkinteger
(
L
,
8
)
&
bit3
))
<<
2
);
//
8
-th parameter: IIR filter
full_init
=
!
lua_isnumber
(
L
,
9
)
?
1
:
lua_tointeger
(
L
,
9
);
//
9
-th parameter: init the chip too
config
=
((
!
lua_isnumber
(
L
,
5
)
?
BME280_STANDBY_TIME_20_MS
:
(
luaL_checkinteger
(
L
,
5
)
&
bit3
))
<<
5
)
//
5
-th parameter: inactive duration in normal mode
|
((
!
lua_isnumber
(
L
,
6
)
?
BME280_FILTER_COEFF_16
:
(
luaL_checkinteger
(
L
,
6
)
&
bit3
))
<<
2
);
//
6
-th parameter: IIR filter
full_init
=
!
lua_isnumber
(
L
,
7
)
?
1
:
lua_tointeger
(
L
,
7
);
//
7
-th parameter: init the chip too
NODE_DBG
(
"mode: %x
\n
humidity oss: %x
\n
config: %x
\n
"
,
bme280_mode
,
bme280_ossh
,
config
);
platform_i2c_setup
(
bme280_i2c_id
,
sda
,
scl
,
PLATFORM_I2C_SPEED_SLOW
);
bme280_i2c_addr
=
BME280_I2C_ADDRESS1
;
platform_i2c_send_start
(
bme280_i2c_id
);
ack
=
platform_i2c_send_address
(
bme280_i2c_id
,
bme280_i2c_addr
,
PLATFORM_I2C_DIRECTION_TRANSMITTER
);
...
...
@@ -324,6 +314,30 @@ static int bme280_lua_init(lua_State* L) {
return
1
;
}
static
int
bme280_lua_init
(
lua_State
*
L
)
{
uint8_t
sda
;
uint8_t
scl
;
uint8_t
config
;
uint8_t
ack
;
uint8_t
full_init
;
platform_print_deprecation_note
(
"bme280.init() is replaced by bme280.setup()"
,
"in the next version"
);
if
(
!
lua_isnumber
(
L
,
1
)
||
!
lua_isnumber
(
L
,
2
))
{
return
luaL_error
(
L
,
"wrong arg range"
);
}
sda
=
luaL_checkinteger
(
L
,
1
);
scl
=
luaL_checkinteger
(
L
,
2
);
platform_i2c_setup
(
bme280_i2c_id
,
sda
,
scl
,
PLATFORM_I2C_SPEED_SLOW
);
// remove sda and scl parameters from stack
lua_remove
(
L
,
1
);
lua_remove
(
L
,
1
);
return
bme280_lua_setup
(
L
);
}
static
void
bme280_readoutdone
(
void
*
arg
)
{
NODE_DBG
(
"timer out
\n
"
);
...
...
@@ -481,7 +495,9 @@ static int bme280_lua_dewpoint(lua_State* L) {
}
static
const
LUA_REG_TYPE
bme280_map
[]
=
{
// init() is deprecated
{
LSTRKEY
(
"init"
),
LFUNCVAL
(
bme280_lua_init
)},
{
LSTRKEY
(
"setup"
),
LFUNCVAL
(
bme280_lua_setup
)},
{
LSTRKEY
(
"temp"
),
LFUNCVAL
(
bme280_lua_temp
)},
{
LSTRKEY
(
"baro"
),
LFUNCVAL
(
bme280_lua_baro
)},
{
LSTRKEY
(
"humi"
),
LFUNCVAL
(
bme280_lua_humi
)},
...
...
app/modules/bmp085.c
View file @
b62fae91
...
...
@@ -21,7 +21,7 @@ static struct {
int16_t
MD
;
}
bmp085_data
;
static
uint8_t
ICACHE_FLASH_ATTR
r8u
(
uint32_t
id
,
uint8_t
reg
)
{
static
uint8_t
r8u
(
uint32_t
id
,
uint8_t
reg
)
{
uint8_t
ret
;
platform_i2c_send_start
(
id
);
...
...
@@ -35,20 +35,40 @@ static uint8_t ICACHE_FLASH_ATTR r8u(uint32_t id, uint8_t reg) {
return
ret
;
}
static
uint16_t
ICACHE_FLASH_ATTR
r16u
(
uint32_t
id
,
uint8_t
reg
)
{
static
uint16_t
r16u
(
uint32_t
id
,
uint8_t
reg
)
{
uint8_t
high
=
r8u
(
id
,
reg
);
uint8_t
low
=
r8u
(
id
,
reg
+
1
);
return
(
high
<<
8
)
|
low
;
}
static
int16_t
ICACHE_FLASH_ATTR
r16
(
uint32_t
id
,
uint8_t
reg
)
{
static
int16_t
r16
(
uint32_t
id
,
uint8_t
reg
)
{
return
(
int16_t
)
r16u
(
id
,
reg
);
}
static
int
ICACHE_FLASH_ATTR
bmp085_init
(
lua_State
*
L
)
{
static
int
bmp085_setup
(
lua_State
*
L
)
{
(
void
)
L
;
bmp085_data
.
AC1
=
r16
(
bmp085_i2c_id
,
0xAA
);
bmp085_data
.
AC2
=
r16
(
bmp085_i2c_id
,
0xAC
);
bmp085_data
.
AC3
=
r16
(
bmp085_i2c_id
,
0xAE
);
bmp085_data
.
AC4
=
r16u
(
bmp085_i2c_id
,
0xB0
);
bmp085_data
.
AC5
=
r16u
(
bmp085_i2c_id
,
0xB2
);
bmp085_data
.
AC6
=
r16u
(
bmp085_i2c_id
,
0xB4
);
bmp085_data
.
B1
=
r16
(
bmp085_i2c_id
,
0xB6
);
bmp085_data
.
B2
=
r16
(
bmp085_i2c_id
,
0xB8
);
bmp085_data
.
MB
=
r16
(
bmp085_i2c_id
,
0xBA
);
bmp085_data
.
MC
=
r16
(
bmp085_i2c_id
,
0xBC
);
bmp085_data
.
MD
=
r16
(
bmp085_i2c_id
,
0xBE
);
return
0
;
}
static
int
bmp085_init
(
lua_State
*
L
)
{
uint32_t
sda
;
uint32_t
scl
;
platform_print_deprecation_note
(
"bmp085.init() is replaced by bmp085.setup()"
,
"in the next version"
);
if
(
!
lua_isnumber
(
L
,
1
)
||
!
lua_isnumber
(
L
,
2
))
{
return
luaL_error
(
L
,
"wrong arg range"
);
}
...
...
@@ -62,19 +82,7 @@ static int ICACHE_FLASH_ATTR bmp085_init(lua_State* L) {
platform_i2c_setup
(
bmp085_i2c_id
,
sda
,
scl
,
PLATFORM_I2C_SPEED_SLOW
);
bmp085_data
.
AC1
=
r16
(
bmp085_i2c_id
,
0xAA
);
bmp085_data
.
AC2
=
r16
(
bmp085_i2c_id
,
0xAC
);
bmp085_data
.
AC3
=
r16
(
bmp085_i2c_id
,
0xAE
);
bmp085_data
.
AC4
=
r16u
(
bmp085_i2c_id
,
0xB0
);
bmp085_data
.
AC5
=
r16u
(
bmp085_i2c_id
,
0xB2
);
bmp085_data
.
AC6
=
r16u
(
bmp085_i2c_id
,
0xB4
);
bmp085_data
.
B1
=
r16
(
bmp085_i2c_id
,
0xB6
);
bmp085_data
.
B2
=
r16
(
bmp085_i2c_id
,
0xB8
);
bmp085_data
.
MB
=
r16
(
bmp085_i2c_id
,
0xBA
);
bmp085_data
.
MC
=
r16
(
bmp085_i2c_id
,
0xBC
);
bmp085_data
.
MD
=
r16
(
bmp085_i2c_id
,
0xBE
);
return
0
;
return
bmp085_setup
(
L
);
}
static
uint32_t
bmp085_temperature_raw_b5
(
void
)
{
...
...
@@ -96,16 +104,16 @@ static uint32_t bmp085_temperature_raw_b5(void) {
return
X1
+
X2
;
}
static
int16_t
ICACHE_FLASH_ATTR
bmp085_temperature
(
void
)
{
static
int16_t
bmp085_temperature
(
void
)
{
return
(
bmp085_temperature_raw_b5
()
+
8
)
>>
4
;
}
static
int
ICACHE_FLASH_ATTR
bmp085_lua_temperature
(
lua_State
*
L
)
{
static
int
bmp085_lua_temperature
(
lua_State
*
L
)
{
lua_pushinteger
(
L
,
bmp085_temperature
());
return
1
;
}
static
int32_t
ICACHE_FLASH_ATTR
bmp085_pressure_raw
(
int
oss
)
{
static
int32_t
bmp085_pressure_raw
(
int
oss
)
{
int32_t
p
;
int32_t
p1
,
p2
,
p3
;
...
...
@@ -132,7 +140,7 @@ static int32_t ICACHE_FLASH_ATTR bmp085_pressure_raw(int oss) {
return
p
;
}
static
int
ICACHE_FLASH_ATTR
bmp085_lua_pressure_raw
(
lua_State
*
L
)
{
static
int
bmp085_lua_pressure_raw
(
lua_State
*
L
)
{
uint8_t
oss
=
0
;
int32_t
p
;
...
...
@@ -148,7 +156,7 @@ static int ICACHE_FLASH_ATTR bmp085_lua_pressure_raw(lua_State* L) {
return
1
;
}
static
int
ICACHE_FLASH_ATTR
bmp085_lua_pressure
(
lua_State
*
L
)
{
static
int
bmp085_lua_pressure
(
lua_State
*
L
)
{
uint8_t
oss
=
0
;
int32_t
p
;
int32_t
X1
,
X2
,
X3
,
B3
,
B4
,
B5
,
B6
,
B7
;
...
...
@@ -187,6 +195,8 @@ static const LUA_REG_TYPE bmp085_map[] = {
{
LSTRKEY
(
"temperature"
),
LFUNCVAL
(
bmp085_lua_temperature
)},
{
LSTRKEY
(
"pressure"
),
LFUNCVAL
(
bmp085_lua_pressure
)},
{
LSTRKEY
(
"pressure_raw"
),
LFUNCVAL
(
bmp085_lua_pressure_raw
)},
{
LSTRKEY
(
"setup"
),
LFUNCVAL
(
bmp085_setup
)},
// init() is deprecated
{
LSTRKEY
(
"init"
),
LFUNCVAL
(
bmp085_init
)},
{
LNILKEY
,
LNILVAL
}
};
...
...
app/modules/hmc5883l.c
View file @
b62fae91
...
...
@@ -12,7 +12,7 @@
static
const
uint32_t
hmc5883_i2c_id
=
0
;
static
const
uint8_t
hmc5883_i2c_addr
=
0x1E
;
static
uint8_t
ICACHE_FLASH_ATTR
r8u
(
uint32_t
id
,
uint8_t
reg
)
{
static
uint8_t
r8u
(
uint32_t
id
,
uint8_t
reg
)
{
uint8_t
ret
;
platform_i2c_send_start
(
id
);
...
...
@@ -26,7 +26,7 @@ static uint8_t ICACHE_FLASH_ATTR r8u(uint32_t id, uint8_t reg) {
return
ret
;
}
static
void
ICACHE_FLASH_ATTR
w8u
(
uint32_t
id
,
uint8_t
reg
,
uint8_t
val
)
{
static
void
w8u
(
uint32_t
id
,
uint8_t
reg
,
uint8_t
val
)
{
platform_i2c_send_start
(
hmc5883_i2c_id
);
platform_i2c_send_address
(
hmc5883_i2c_id
,
hmc5883_i2c_addr
,
PLATFORM_I2C_DIRECTION_TRANSMITTER
);
platform_i2c_send_byte
(
hmc5883_i2c_id
,
reg
);
...
...
@@ -34,19 +34,9 @@ static void ICACHE_FLASH_ATTR w8u(uint32_t id, uint8_t reg, uint8_t val) {
platform_i2c_send_stop
(
hmc5883_i2c_id
);
}
static
int
ICACHE_FLASH_ATTR
hmc5883_init
(
lua_State
*
L
)
{
uint32_t
sda
;
uint32_t
scl
;
static
int
hmc5883_setup
(
lua_State
*
L
)
{
uint8_t
devid_a
,
devid_b
,
devid_c
;
sda
=
luaL_checkinteger
(
L
,
1
);
scl
=
luaL_checkinteger
(
L
,
2
);
luaL_argcheck
(
L
,
sda
>
0
&&
scl
>
0
,
1
,
"no i2c for D0"
);
platform_i2c_setup
(
hmc5883_i2c_id
,
sda
,
scl
,
PLATFORM_I2C_SPEED_SLOW
);
devid_a
=
r8u
(
hmc5883_i2c_id
,
10
);
devid_b
=
r8u
(
hmc5883_i2c_id
,
11
);
devid_c
=
r8u
(
hmc5883_i2c_id
,
12
);
...
...
@@ -67,7 +57,24 @@ static int ICACHE_FLASH_ATTR hmc5883_init(lua_State* L) {
return
0
;
}
static
int
ICACHE_FLASH_ATTR
hmc5883_read
(
lua_State
*
L
)
{
static
int
hmc5883_init
(
lua_State
*
L
)
{
uint32_t
sda
;
uint32_t
scl
;
platform_print_deprecation_note
(
"hmc5883l.init() is replaced by hmc5883l.setup()"
,
"in the next version"
);
sda
=
luaL_checkinteger
(
L
,
1
);
scl
=
luaL_checkinteger
(
L
,
2
);
luaL_argcheck
(
L
,
sda
>
0
&&
scl
>
0
,
1
,
"no i2c for D0"
);
platform_i2c_setup
(
hmc5883_i2c_id
,
sda
,
scl
,
PLATFORM_I2C_SPEED_SLOW
);
return
hmc5883_setup
(
L
);
}
static
int
hmc5883_read
(
lua_State
*
L
)
{
uint8_t
data
[
6
];
int
x
,
y
,
z
;
...
...
@@ -101,6 +108,8 @@ static int ICACHE_FLASH_ATTR hmc5883_read(lua_State* L) {
static
const
LUA_REG_TYPE
hmc5883_map
[]
=
{
{
LSTRKEY
(
"read"
),
LFUNCVAL
(
hmc5883_read
)},
{
LSTRKEY
(
"setup"
),
LFUNCVAL
(
hmc5883_setup
)},
// init() is deprecated
{
LSTRKEY
(
"init"
),
LFUNCVAL
(
hmc5883_init
)},
{
LNILKEY
,
LNILVAL
}
};
...
...
app/modules/l3g4200d.c
View file @
b62fae91
...
...
@@ -12,7 +12,7 @@
static
const
uint32_t
i2c_id
=
0
;
static
const
uint8_t
i2c_addr
=
0x69
;
static
uint8_t
ICACHE_FLASH_ATTR
r8u
(
uint32_t
id
,
uint8_t
reg
)
{
static
uint8_t
r8u
(
uint32_t
id
,
uint8_t
reg
)
{
uint8_t
ret
;
platform_i2c_send_start
(
id
);
...
...
@@ -26,7 +26,7 @@ static uint8_t ICACHE_FLASH_ATTR r8u(uint32_t id, uint8_t reg) {
return
ret
;
}
static
void
ICACHE_FLASH_ATTR
w8u
(
uint32_t
id
,
uint8_t
reg
,
uint8_t
val
)
{
static
void
w8u
(
uint32_t
id
,
uint8_t
reg
,
uint8_t
val
)
{
platform_i2c_send_start
(
i2c_id
);
platform_i2c_send_address
(
i2c_id
,
i2c_addr
,
PLATFORM_I2C_DIRECTION_TRANSMITTER
);
platform_i2c_send_byte
(
i2c_id
,
reg
);
...
...
@@ -34,19 +34,9 @@ static void ICACHE_FLASH_ATTR w8u(uint32_t id, uint8_t reg, uint8_t val) {
platform_i2c_send_stop
(
i2c_id
);
}
static
int
ICACHE_FLASH_ATTR
l3g4200d_init
(
lua_State
*
L
)
{
uint32_t
sda
;
uint32_t
scl
;
static
int
l3g4200d_setup
(
lua_State
*
L
)
{
uint8_t
devid
;
sda
=
luaL_checkinteger
(
L
,
1
);
scl
=
luaL_checkinteger
(
L
,
2
);
luaL_argcheck
(
L
,
sda
>
0
&&
scl
>
0
,
1
,
"no i2c for D0"
);
platform_i2c_setup
(
i2c_id
,
sda
,
scl
,
PLATFORM_I2C_SPEED_SLOW
);
devid
=
r8u
(
i2c_id
,
0xF
);
if
(
devid
!=
0xD3
)
{
...
...
@@ -58,7 +48,24 @@ static int ICACHE_FLASH_ATTR l3g4200d_init(lua_State* L) {
return
0
;
}
static
int
ICACHE_FLASH_ATTR
l3g4200d_read
(
lua_State
*
L
)
{
static
int
l3g4200d_init
(
lua_State
*
L
)
{
uint32_t
sda
;
uint32_t
scl
;
platform_print_deprecation_note
(
"l3g4200d.init() is replaced by l3g4200d.setup()"
,
"in the next version"
);
sda
=
luaL_checkinteger
(
L
,
1
);
scl
=
luaL_checkinteger
(
L
,
2
);
luaL_argcheck
(
L
,
sda
>
0
&&
scl
>
0
,
1
,
"no i2c for D0"
);
platform_i2c_setup
(
i2c_id
,
sda
,
scl
,
PLATFORM_I2C_SPEED_SLOW
);
return
l3g4200d_setup
(
L
);
}
static
int
l3g4200d_read
(
lua_State
*
L
)
{
uint8_t
data
[
6
];
int
x
,
y
,
z
;
...
...
@@ -91,6 +98,8 @@ static int ICACHE_FLASH_ATTR l3g4200d_read(lua_State* L) {
static
const
LUA_REG_TYPE
l3g4200d_map
[]
=
{
{
LSTRKEY
(
"read"
),
LFUNCVAL
(
l3g4200d_read
)},
{
LSTRKEY
(
"setup"
),
LFUNCVAL
(
l3g4200d_setup
)},
// init() is deprecated
{
LSTRKEY
(
"init"
),
LFUNCVAL
(
l3g4200d_init
)},
{
LNILKEY
,
LNILVAL
}
};
...
...
app/modules/mcp4725.c
0 → 100644
View file @
b62fae91
/*
* Driver for Microchip MCP4725 12-bit digital to analog converter.
*/
#include "module.h"
#include "lauxlib.h"
#include "platform.h"
#include "osapi.h"
#define MCP4725_I2C_ADDR_BASE (0x60)
#define MCP4725_I2C_ADDR_A0_MASK (0x01) // user configurable
#define MCP4725_I2C_ADDR_A1_MASK (0x02) // hard wired at factory
#define MCP4725_I2C_ADDR_A2_MASK (0x04) // hard wired at factory
#define MCP4725_COMMAND_WRITE_DAC (0x40)
#define MCP4725_COMMAND_WRITE_DAC_EEPROM (0x60)
#define MCP4725_POWER_DOWN_NORMAL (0x00)
#define MCP4725_POWER_DOWN_RES_1K (0x02)
#define MCP4725_POWER_DOWN_RES_100K (0x04)
#define MCP4725_POWER_DOWN_RES_500K (0x06)
static
const
unsigned
mcp4725_i2c_id
=
0
;
static
uint8
get_address
(
lua_State
*
L
,
uint8
i2c_address
){
uint8
addr_temp
=
i2c_address
;
uint16
temp_var
=
0
;
lua_getfield
(
L
,
1
,
"A2"
);
if
(
!
lua_isnil
(
L
,
-
1
))
{
if
(
lua_isnumber
(
L
,
-
1
)
)
{
temp_var
=
lua_tonumber
(
L
,
-
1
);
if
(
temp_var
<
2
){
temp_var
=
MCP4725_I2C_ADDR_A2_MASK
&
(
temp_var
<<
2
);
addr_temp
|=
temp_var
;
}
else
return
luaL_argerror
(
L
,
1
,
"A2: Must be 0 or 1"
);
}
else
{
return
luaL_argerror
(
L
,
1
,
"A2: Must be number"
);
}
}
lua_pop
(
L
,
1
);
lua_getfield
(
L
,
1
,
"A1"
);
if
(
!
lua_isnil
(
L
,
-
1
))
{
if
(
lua_isnumber
(
L
,
-
1
)
)
{
temp_var
=
lua_tonumber
(
L
,
-
1
);
if
(
temp_var
<
2
){
temp_var
=
MCP4725_I2C_ADDR_A1_MASK
&
(
temp_var
<<
1
);
addr_temp
|=
temp_var
;
}
else
return
luaL_argerror
(
L
,
1
,
"A1: Must be 0 or 1"
);
}
else
{
return
luaL_argerror
(
L
,
1
,
"A1: Must be number"
);
}
}
lua_pop
(
L
,
1
);
lua_getfield
(
L
,
1
,
"A0"
);
if
(
!
lua_isnil
(
L
,
-
1
))
{
if
(
lua_isnumber
(
L
,
-
1
)
)
{
temp_var
=
lua_tonumber
(
L
,
-
1
);
if
(
temp_var
<
2
){
temp_var
=
MCP4725_I2C_ADDR_A0_MASK
&
(
temp_var
);
addr_temp
|=
temp_var
;
}
else
return
luaL_argerror
(
L
,
1
,
"A0: Must be 0 or 1"
);
}
else
{
return
luaL_argerror
(
L
,
1
,
"A0: Must be number"
);
}
}
lua_pop
(
L
,
1
);
return
addr_temp
;
}
static
int
mcp4725_write
(
lua_State
*
L
){
uint8
i2c_address
=
MCP4725_I2C_ADDR_BASE
;
uint16
dac_value
=
0
;
uint8
cmd_byte
=
0
;
if
(
lua_istable
(
L
,
1
))
{
i2c_address
=
get_address
(
L
,
i2c_address
);
uint16
temp_var
=
0
;
lua_getfield
(
L
,
1
,
"value"
);
if
(
!
lua_isnil
(
L
,
-
1
))
{
if
(
lua_isnumber
(
L
,
-
1
)
)
{
temp_var
=
lua_tonumber
(
L
,
-
1
);
if
(
temp_var
>=
0
&&
temp_var
<=
4095
){
dac_value
=
temp_var
<<
4
;
}
else
return
luaL_argerror
(
L
,
1
,
"value: Valid range 0-4095"
);
}
else
{
return
luaL_argerror
(
L
,
1
,
"value: Must be number"
);
}
}
else
{
return
luaL_argerror
(
L
,
1
,
"value: value is required"
);
}
lua_pop
(
L
,
1
);
lua_getfield
(
L
,
1
,
"save"
);
if
(
!
lua_isnil
(
L
,
-
1
))
{
if
(
lua_isboolean
(
L
,
-
1
)
)
{
if
(
lua_toboolean
(
L
,
-
1
)){
cmd_byte
|=
MCP4725_COMMAND_WRITE_DAC_EEPROM
;
}
else
{
cmd_byte
|=
MCP4725_COMMAND_WRITE_DAC
;
}
}
else
{
return
luaL_argerror
(
L
,
1
,
"save: must be boolean"
);
}
}
else
{
cmd_byte
|=
MCP4725_COMMAND_WRITE_DAC
;
}
lua_pop
(
L
,
1
);
lua_getfield
(
L
,
1
,
"pwrdn"
);
if
(
!
lua_isnil
(
L
,
-
1
))
{
if
(
lua_isnumber
(
L
,
-
1
)
)
{
temp_var
=
lua_tonumber
(
L
,
-
1
);
if
(
temp_var
>=
0
&&
temp_var
<=
3
){
cmd_byte
|=
temp_var
<<
1
;
}
else
{
return
luaL_argerror
(
L
,
1
,
"pwrdn: Valid range 0-3"
);
}
}
else
{
return
luaL_argerror
(
L
,
1
,
"pwrdn: Must be number"
);
}
}
lua_pop
(
L
,
1
);
}
uint8
*
dac_value_byte
=
(
uint8
*
)
&
dac_value
;
platform_i2c_send_start
(
mcp4725_i2c_id
);
platform_i2c_send_address
(
mcp4725_i2c_id
,
i2c_address
,
PLATFORM_I2C_DIRECTION_TRANSMITTER
);
platform_i2c_send_byte
(
mcp4725_i2c_id
,
cmd_byte
);
platform_i2c_send_byte
(
mcp4725_i2c_id
,
dac_value_byte
[
1
]);
platform_i2c_send_byte
(
mcp4725_i2c_id
,
dac_value_byte
[
0
]);
platform_i2c_send_stop
(
mcp4725_i2c_id
);
return
0
;
}
static
int
mcp4725_read
(
lua_State
*
L
){
uint8
i2c_address
=
MCP4725_I2C_ADDR_BASE
;
uint8
recieve_buffer
[
5
]
=
{
0
};
if
(
lua_istable
(
L
,
1
))
{
i2c_address
=
get_address
(
L
,
i2c_address
);
}
platform_i2c_send_start
(
mcp4725_i2c_id
);
platform_i2c_send_address
(
mcp4725_i2c_id
,
i2c_address
,
PLATFORM_I2C_DIRECTION_RECEIVER
);
for
(
int
i
=
0
;
i
<
5
;
i
++
){
recieve_buffer
[
i
]
=
platform_i2c_recv_byte
(
mcp4725_i2c_id
,
1
);
}
platform_i2c_send_stop
(
mcp4725_i2c_id
);
lua_pushnumber
(
L
,
(
recieve_buffer
[
0
]
&
0x06
)
>>
1
);
lua_pushnumber
(
L
,
(
recieve_buffer
[
1
]
<<
4
)
|
(
recieve_buffer
[
2
]
>>
4
));
lua_pushnumber
(
L
,
(
recieve_buffer
[
3
]
&
0x60
)
>>
5
);
lua_pushnumber
(
L
,
((
recieve_buffer
[
3
]
&
0xf
)
<<
8
)
|
recieve_buffer
[
4
]);
lua_pushnumber
(
L
,
(
recieve_buffer
[
0
]
&
0x80
)
>>
7
);
lua_pushnumber
(
L
,
(
recieve_buffer
[
0
]
&
0x40
)
>>
6
);
return
6
;
}
static
const
LUA_REG_TYPE
mcp4725_map
[]
=
{
{
LSTRKEY
(
"write"
),
LFUNCVAL
(
mcp4725_write
)
},
{
LSTRKEY
(
"read"
),
LFUNCVAL
(
mcp4725_read
)
},
{
LSTRKEY
(
"PWRDN_NONE"
),
LNUMVAL
(
MCP4725_POWER_DOWN_NORMAL
)
},
{
LSTRKEY
(
"PWRDN_1K"
),
LNUMVAL
((
MCP4725_POWER_DOWN_RES_1K
)
>>
1
)
},
{
LSTRKEY
(
"PWRDN_100K"
),
LNUMVAL
((
MCP4725_POWER_DOWN_RES_100K
)
>>
1
)
},
{
LSTRKEY
(
"PWRDN_500K"
),
LNUMVAL
((
MCP4725_POWER_DOWN_RES_500K
)
>>
1
)
},
{
LNILKEY
,
LNILVAL
}
};
NODEMCU_MODULE
(
MCP4725
,
"mcp4725"
,
mcp4725_map
,
NULL
);
app/modules/rtctime.c
View file @
b62fae91
...
...
@@ -57,6 +57,11 @@ void rtctime_late_startup (void)
rtc_time_switch_system
();
}
void
rtctime_adjust_rate
(
int
rate
)
{
rtc_time_set_rate
(
rate
);
}
void
rtctime_gettimeofday
(
struct
rtc_timeval
*
tv
)
{
rtc_time_gettimeofday
(
tv
);
...
...
@@ -66,7 +71,9 @@ void rtctime_settimeofday (const struct rtc_timeval *tv)
{
if
(
!
rtc_time_check_magic
())
rtc_time_prepare
();
int32_t
rate
=
rtc_time_get_rate
();
rtc_time_settimeofday
(
tv
);
rtc_time_set_rate
(
rate
);
}
bool
rtctime_have_time
(
void
)
...
...
@@ -131,6 +138,9 @@ static int rtctime_set (lua_State *L)
struct
rtc_timeval
tv
=
{
sec
,
usec
};
rtctime_settimeofday
(
&
tv
);
if
(
lua_isnumber
(
L
,
3
))
rtc_time_set_rate
(
lua_tonumber
(
L
,
3
));
return
0
;
}
...
...
@@ -142,7 +152,8 @@ static int rtctime_get (lua_State *L)
rtctime_gettimeofday
(
&
tv
);
lua_pushnumber
(
L
,
tv
.
tv_sec
);
lua_pushnumber
(
L
,
tv
.
tv_usec
);
return
2
;
lua_pushnumber
(
L
,
rtc_time_get_rate
());
return
3
;
}
static
void
do_sleep_opt
(
lua_State
*
L
,
int
idx
)
...
...
app/modules/sjson.c
View file @
b62fae91
...
...
@@ -11,10 +11,8 @@
#include "c_limits.h"
#endif
#define JSONSL_STATE_USER_FIELDS int lua_object_ref; int used_count;
#define JSONSL_NO_JPR
#include "jsonsl.c"
#include "json_config.h"
#include "jsonsl.h"
#define LUA_SJSONLIBNAME "sjson"
...
...
@@ -56,7 +54,9 @@ static int error_callback(jsonsl_t jsn,
char
*
at
)
{
JSN_DATA
*
data
=
(
JSN_DATA
*
)
jsn
->
data
;
data
->
error
=
jsonsl_strerror
(
err
);
if
(
!
data
->
complete
)
{
data
->
error
=
jsonsl_strerror
(
err
);
}
//fprintf(stderr, "Got error at pos %lu: %s\n", jsn->pos, jsonsl_strerror(err));
return
0
;
...
...
app/modules/sntp.c
View file @
b62fae91
...
...
@@ -254,7 +254,7 @@ static void sntp_handle_result(lua_State *L) {
int64_t
f
=
((
state
->
best
.
delta
*
PLL_A
)
>>
32
)
+
pll_increment
;
pll_increment
+=
(
state
->
best
.
delta
*
PLL_B
)
>>
32
;
sntp_dbg
(
"f=%d, increment=%d
\n
"
,
(
int32_t
)
f
,
(
int32_t
)
pll_increment
);
//
rtctime_adjust_rate((int32_t) f);
rtctime_adjust_rate
((
int32_t
)
f
);
}
else
{
rtctime_settimeofday
(
&
tv
);
}
...
...
Prev
1
2
3
Next
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
.
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment