- 04 Aug, 2015 3 commits
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Johny Mattsson authored
With platform_s_flash_read() now properly handling unaligned destination buffers, there is no need to shim SPIFFS any more.
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Johny Mattsson authored
When using the flash write API, the flash is unmapped/uncached, and as such it's not possible to source data directly from flash (e.g. string literals).
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Bernd Meyer authored
(Occurs e.g. when SPIFFS cache is disabled.) Implementation mirrors the existing handling in the write path.
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- 31 Jul, 2015 2 commits
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Johny Mattsson authored
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Johny Mattsson authored
Also made the cache on/off configurable via user_config.h. Uncached writes are not a very good idea, but for read-only deployments a further ~0.5k RAM can be gained by disabling the cache. Tweaked the file.read() workhorse to read large chunks at a time rather than use getc(), to compensate for potential unavailability of cache.
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- 26 Jul, 2015 1 commit
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Vowstar authored
Upgrade u8g module and add display bindings
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- 22 Jul, 2015 1 commit
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Vowstar authored
Lua module for TSL2561 I2C Digital Light Sensor
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- 21 Jul, 2015 3 commits
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devsaurus authored
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devsaurus authored
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Marius Schmeding authored
adding lua_module for Grove Digital Light Sensor (http://www.seeedstudio.com/wiki/Grove_-_Digital_Light_Sensor)
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- 20 Jul, 2015 3 commits
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devsaurus authored
sh1106_128x64_i2c ssd1306_64x48_i2c ssd1309_128x64_i2c ssd1327_96x96_gr_i2c uc1611_dogm240_i2c uc1611_dogxl240_i2c ld7032_60x32_hw_spi pcd8544_84x48_hw_spi pcf8812_96x65_hw_spi sh1106_128x64_hw_spi ssd1306_64x48_hw_spi ssd1309_128x64_hw_spi ssd1322_nhd31oled_bw_hw_spi ssd1322_nhd31oled_gr_hw_spi ssd1325_nhd27oled_bw_hw_spi ssd1325_nhd27oled_gr_hw_spi ssd1327_96x96_gr_hw_spi ssd1351_128x128_332_hw_spi ssd1351_128x128gh_332_hw_spi ssd1351_128x128_hicolor_hw_spi ssd1351_128x128gh_hicolor_hw_spi ssd1353_160x128_332_hw_spi ssd1353_160x128_hicolor_hw_spi st7565_64128n_hw_spi st7565_dogm128_hw_spi st7565_dogm132_hw_spi st7565_lm6059_hw_spi st7565_lm6063_hw_spi st7565_nhd_c12832_hw_spi st7565_nhd_c12864_hw_spi uc1601_c128032_hw_spi uc1608_240x128_hw_spi uc1608_240x64_hw_spi uc1610_dogxl160_bw_hw_spi uc1610_dogxl160_gr_hw_spi uc1611_dogm240_hw_spi uc1611_dogxl240_hw_spi uc1701_dogs102_hw_spi uc1701_mini12864_hw_spi
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devsaurus authored
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devsaurus authored
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- 19 Jul, 2015 2 commits
- 17 Jul, 2015 2 commits
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Vowstar authored
Updated SPIFFS to 0.3.2.
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Johny Mattsson authored
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- 16 Jul, 2015 2 commits
- 14 Jul, 2015 5 commits
- 13 Jul, 2015 1 commit
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Vowstar authored
Improved ws2812 implementation
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- 12 Jul, 2015 1 commit
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Konrad Beckmann authored
- Fixes the "first led problem" (#534 #487). - Adds support for 160MHz mode. - Optimized timings. Time to write pixels is reduced by about 25% This is useful when having a large amount of chained LEDs (>500).
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- 11 Jul, 2015 4 commits
- 10 Jul, 2015 6 commits
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Johny Mattsson authored
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Johny Mattsson authored
Integrates with the rtctime component if it's available.
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Johny Mattsson authored
The rtcfifo module uses RTC memory to store sensor samples across deep-sleeps, making it possible to batch up samples for less frequent uploads. This component uses 9 RTC memory slots for control, and a variable number of slots for sample storage (see rtcfifo.prepare() on how to control the size/location of the latter). When used together with the rtctime module, it also exposes the convenience function rtcfifo.dsleep_until_sample() which can be used to easily take readings on a regular basis without having to manually take into account time spent awake to get an accurate sleep time. The format used for storing samples is quite dense, and allows for 16 bits of data in a fixed point format (per sample).
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Johny Mattsson authored
Added Lua module rtctime to interface with it. This keeps as accurate time as is possible on the ESP8266, including across deep sleeps (provided rtctime.dsleep() is used rather than node.dsleep()). Intended to be used together with NTP for high accuracy time keeping. The API is via rtctime.{get,set}timeofday(), working from Unix epoch. Note that 160MHz CPU clock is not currently supported by the rtctime code, as it is only aware of the 52MHz boot clock and the regular 80Mhz default clock. See rtctime.h for detailed info on how this all works.
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Johny Mattsson authored
Added Lua access module named "rtcmem" for read/write of RTC user module.
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Johny Mattsson authored
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- 08 Jul, 2015 1 commit
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Johny Mattsson authored
I must've gotten distracted halfway through that copy/paste job :(
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- 06 Jul, 2015 1 commit
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devsaurus authored
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- 03 Jul, 2015 2 commits
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vowstar authored
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