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ruanhaishen
redis
Commits
66a5c1cd
Commit
66a5c1cd
authored
Sep 04, 2019
by
zhudacai 00228490
Browse files
The aarch64 architecture is support normal memory unaligned accesses,
so add the UNALIGNED_LE_CPU to the aarch64 .
parent
d7c25806
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src/siphash.c
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66a5c1cd
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@@ -58,7 +58,8 @@ int siptlw(int c) {
/* Test of the CPU is Little Endian and supports not aligned accesses.
* Two interesting conditions to speedup the function that happen to be
* in most of x86 servers. */
#if defined(__X86_64__) || defined(__x86_64__) || defined (__i386__)
#if defined(__X86_64__) || defined(__x86_64__) || defined (__i386__) \
|| defined (__aarch64__) || defined (__arm64__)
#define UNALIGNED_LE_CPU
#endif
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